JPS5685135A - Storage device - Google Patents

Storage device

Info

Publication number
JPS5685135A
JPS5685135A JP16196379A JP16196379A JPS5685135A JP S5685135 A JPS5685135 A JP S5685135A JP 16196379 A JP16196379 A JP 16196379A JP 16196379 A JP16196379 A JP 16196379A JP S5685135 A JPS5685135 A JP S5685135A
Authority
JP
Japan
Prior art keywords
transfer
memory
address
internal address
dma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16196379A
Other languages
Japanese (ja)
Other versions
JPS6338731B2 (en
Inventor
Hidekazu Kudo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16196379A priority Critical patent/JPS5685135A/en
Publication of JPS5685135A publication Critical patent/JPS5685135A/en
Publication of JPS6338731B2 publication Critical patent/JPS6338731B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE: To obtain a memory storage device with a low cost and a short DMA transfer time, by installing an internal address generating means, the means that connects the memory part designated by the above-mentioned address generating means and the external information input/outpt terminal to transfer the information, etc.
CONSTITUTION: A means if provided to secure a connection among the memory part, internal address generating means, external information input/output terminal, memory part designated by the internal address and external information input/ output terminal each and then perform the information transfer. For instance, the circuit block as shown in the diagram is formed within the memory chip for transfer of the direct memory access (DMA) which performs the transfer of the serial data between the peripheral devices and the storage device. Then the external address introduced from the CPU or the like via the terminal 15 plus the DMA address introduced via the internal address bus 14 after generated inside the chip are selected by the gate 2 which is controlled by the controlling circuit 1 to be applied to the memory group 4 via the address decoder 3.
COPYRIGHT: (C)1981,JPO&Japio
JP16196379A 1979-12-13 1979-12-13 Storage device Granted JPS5685135A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16196379A JPS5685135A (en) 1979-12-13 1979-12-13 Storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16196379A JPS5685135A (en) 1979-12-13 1979-12-13 Storage device

Publications (2)

Publication Number Publication Date
JPS5685135A true JPS5685135A (en) 1981-07-11
JPS6338731B2 JPS6338731B2 (en) 1988-08-02

Family

ID=15745392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16196379A Granted JPS5685135A (en) 1979-12-13 1979-12-13 Storage device

Country Status (1)

Country Link
JP (1) JPS5685135A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0455222U (en) * 1990-09-14 1992-05-12

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5436138A (en) * 1977-08-26 1979-03-16 Nec Corp Direct memory access system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5436138A (en) * 1977-08-26 1979-03-16 Nec Corp Direct memory access system

Also Published As

Publication number Publication date
JPS6338731B2 (en) 1988-08-02

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