FR2390007A1 - - Google Patents

Info

Publication number
FR2390007A1
FR2390007A1 FR7810337A FR7810337A FR2390007A1 FR 2390007 A1 FR2390007 A1 FR 2390007A1 FR 7810337 A FR7810337 A FR 7810337A FR 7810337 A FR7810337 A FR 7810337A FR 2390007 A1 FR2390007 A1 FR 2390007A1
Authority
FR
France
Prior art keywords
layer
silicon
depositing
photoresist material
protected region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7810337A
Other languages
English (en)
French (fr)
Other versions
FR2390007B1 (enExample
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2390007A1 publication Critical patent/FR2390007A1/fr
Application granted granted Critical
Publication of FR2390007B1 publication Critical patent/FR2390007B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10W20/01—

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
FR7810337A 1977-05-02 1978-03-31 Expired FR2390007B1 (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/793,217 US4123300A (en) 1977-05-02 1977-05-02 Integrated circuit process utilizing lift-off techniques

Publications (2)

Publication Number Publication Date
FR2390007A1 true FR2390007A1 (enExample) 1978-12-01
FR2390007B1 FR2390007B1 (enExample) 1982-05-14

Family

ID=25159410

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7810337A Expired FR2390007B1 (enExample) 1977-05-02 1978-03-31

Country Status (8)

Country Link
US (1) US4123300A (enExample)
JP (1) JPS5856267B2 (enExample)
DE (1) DE2818525A1 (enExample)
FR (1) FR2390007B1 (enExample)
GB (1) GB1600048A (enExample)
IT (1) IT1112624B (enExample)
NL (1) NL7804517A (enExample)
SE (1) SE7804921L (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0021133A3 (en) * 1979-06-06 1983-07-20 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device comprising an interconnection electrode and method of manufacturing the same

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4305760A (en) * 1978-12-22 1981-12-15 Ncr Corporation Polysilicon-to-substrate contact processing
US4240845A (en) * 1980-02-04 1980-12-23 International Business Machines Corporation Method of fabricating random access memory device
JPS56116670A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor integrated circuit device and manufacture thereof
JPS5736844A (en) * 1980-08-15 1982-02-27 Hitachi Ltd Semiconductor device
US4358326A (en) * 1980-11-03 1982-11-09 International Business Machines Corporation Epitaxially extended polycrystalline structures utilizing a predeposit of amorphous silicon with subsequent annealing
US4814285A (en) * 1985-09-23 1989-03-21 Harris Corp. Method for forming planarized interconnect level using selective deposition and ion implantation
US5075817A (en) * 1990-06-22 1991-12-24 Ramtron Corporation Trench capacitor for large scale integrated memory
US5104822A (en) * 1990-07-30 1992-04-14 Ramtron Corporation Method for creating self-aligned, non-patterned contact areas and stacked capacitors using the method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2409664A1 (de) * 1973-02-28 1974-10-17 Hitachi Ltd Ladungsueberfuehrungs-halbleiterstruktur und verfahren zu ihrer herstellung
US3847687A (en) * 1972-11-15 1974-11-12 Motorola Inc Methods of forming self aligned transistor structure having polycrystalline contacts

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4055885A (en) * 1973-02-28 1977-11-01 Hitachi, Ltd. Charge transfer semiconductor device with electrodes separated by oxide region therebetween and method for fabricating the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3847687A (en) * 1972-11-15 1974-11-12 Motorola Inc Methods of forming self aligned transistor structure having polycrystalline contacts
DE2409664A1 (de) * 1973-02-28 1974-10-17 Hitachi Ltd Ladungsueberfuehrungs-halbleiterstruktur und verfahren zu ihrer herstellung

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
EXBK/75 *
EXBK/76 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0021133A3 (en) * 1979-06-06 1983-07-20 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device comprising an interconnection electrode and method of manufacturing the same

Also Published As

Publication number Publication date
FR2390007B1 (enExample) 1982-05-14
NL7804517A (nl) 1978-11-06
IT7822794A0 (it) 1978-04-28
DE2818525A1 (de) 1978-11-09
GB1600048A (en) 1981-10-14
JPS5856267B2 (ja) 1983-12-14
SE7804921L (sv) 1978-11-03
IT1112624B (it) 1986-01-20
JPS53136494A (en) 1978-11-29
US4123300A (en) 1978-10-31

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Legal Events

Date Code Title Description
ST Notification of lapse