FR2382054A1 - Circuit de transmission de signaux d'un processeur a un ou plusieurs autres processeurs connectes a la meme ligne commune dans un systeme informatique - Google Patents

Circuit de transmission de signaux d'un processeur a un ou plusieurs autres processeurs connectes a la meme ligne commune dans un systeme informatique

Info

Publication number
FR2382054A1
FR2382054A1 FR7805035A FR7805035A FR2382054A1 FR 2382054 A1 FR2382054 A1 FR 2382054A1 FR 7805035 A FR7805035 A FR 7805035A FR 7805035 A FR7805035 A FR 7805035A FR 2382054 A1 FR2382054 A1 FR 2382054A1
Authority
FR
France
Prior art keywords
processor
computer system
signal transmission
transmission circuit
common line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7805035A
Other languages
English (en)
Other versions
FR2382054B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of FR2382054A1 publication Critical patent/FR2382054A1/fr
Application granted granted Critical
Publication of FR2382054B1 publication Critical patent/FR2382054B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Multi Processors (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Hardware Redundancy (AREA)

Abstract

Circuit destiné à transmettre des signaux d'un processeur à un ou plusieurs autres processeurs dans un système informatique. Il comporte un premier élément logique de commande destiné à produire deux signaux successifs dont un premier provoque le transfert du contenu d'un tampon émetteur SB à un tampon d'attente QB pour l'écriture dudit contenu dans une première position de ce tampon d'attente. Le signal de l'autre sortie sollicite une porte G9 faisant passer le signal prioritaire dans le tampon émetteur. Domaine d'application : systèmes informatiques.
FR7805035A 1977-02-28 1978-02-22 Circuit de transmission de signaux d'un processeur a un ou plusieurs autres processeurs connectes a la meme ligne commune dans un systeme informatique Expired FR2382054B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE7702143A SE414087B (sv) 1977-02-28 1977-02-28 Anordning i ett datorsystem vid utsendning av signaler fran en processor till en eller flera andra processorer varvid prioriterade signaler sends direkt utan tidsfordrojning och oprioriterade signalers ordningsfoljd ...

Publications (2)

Publication Number Publication Date
FR2382054A1 true FR2382054A1 (fr) 1978-09-22
FR2382054B1 FR2382054B1 (fr) 1986-02-28

Family

ID=20330566

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7805035A Expired FR2382054B1 (fr) 1977-02-28 1978-02-22 Circuit de transmission de signaux d'un processeur a un ou plusieurs autres processeurs connectes a la meme ligne commune dans un systeme informatique

Country Status (13)

Country Link
US (1) US4208714A (fr)
AU (1) AU517630B2 (fr)
BR (1) BR7801184A (fr)
CA (1) CA1113572A (fr)
ES (1) ES467339A1 (fr)
FR (1) FR2382054B1 (fr)
GB (1) GB1564689A (fr)
HU (1) HU176660B (fr)
IT (1) IT1110459B (fr)
MX (1) MX147418A (fr)
NL (1) NL7802215A (fr)
SE (1) SE414087B (fr)
YU (1) YU39412B (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4409656A (en) * 1980-03-13 1983-10-11 Her Majesty The Queen, In Right Of Canada As Represented By The Minister Of National Defense Serial data bus communication system
US4481583A (en) * 1981-10-30 1984-11-06 At&T Bell Laboratories Method for distributing resources in a time-shared system
US4463445A (en) * 1982-01-07 1984-07-31 Bell Telephone Laboratories, Incorporated Circuitry for allocating access to a demand-shared bus
US4488218A (en) * 1982-01-07 1984-12-11 At&T Bell Laboratories Dynamic priority queue occupancy scheme for access to a demand-shared bus
US4458314A (en) * 1982-01-07 1984-07-03 Bell Telephone Laboratories, Incorporated Circuitry for allocating access to a demand shared bus
US4546430A (en) * 1983-07-13 1985-10-08 Sperry Corporation Control unit busy queuing
US4602327A (en) * 1983-07-28 1986-07-22 Motorola, Inc. Bus master capable of relinquishing bus on request and retrying bus cycle
SE445861B (sv) * 1984-12-12 1986-07-21 Ellemtel Utvecklings Ab Prioritetsfordelningsanordning for datorer
US4816993A (en) * 1984-12-24 1989-03-28 Hitachi, Ltd. Parallel processing computer including interconnected operation units
JPH0778781B2 (ja) * 1986-06-02 1995-08-23 株式会社日立製作所 情報転送方法
DE3751609T2 (de) * 1986-09-01 1996-07-04 Nippon Electric Co Datenprozessor mit Hochgeschwindigkeitsdatenübertragung.
US4914653A (en) * 1986-12-22 1990-04-03 American Telephone And Telegraph Company Inter-processor communication protocol
US4965716A (en) * 1988-03-11 1990-10-23 International Business Machines Corporation Fast access priority queue for managing multiple messages at a communications node or managing multiple programs in a multiprogrammed data processor
JP2580246B2 (ja) * 1988-04-20 1997-02-12 キヤノン株式会社 データ通信装置
AU7142091A (en) * 1989-12-19 1991-07-18 E-Systems Incorporated Method and apparatus for dispersed end-entity flow control in computer networks
US6336143B1 (en) 1993-09-27 2002-01-01 International Business Machines Corporation Method and apparatus for multimedia data interchange with pacing capability in a distributed data processing system
US5603063A (en) * 1994-06-27 1997-02-11 Quantum Corporation Disk drive command queuing method using two memory devices for storing two types of commands separately first before queuing commands in the second memory device
DK176242B1 (da) * 1995-11-24 2007-04-16 Tellabs Denmark As Modtageenhed til et datatransmissionssystem
US6654837B1 (en) 1999-12-28 2003-11-25 Intel Corporation Dynamic priority external transaction system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3447135A (en) * 1966-08-18 1969-05-27 Ibm Peripheral data exchange
US3503048A (en) * 1966-03-25 1970-03-24 Ericsson Telefon Ab L M Arrangement in computers for controlling a plant consisting of a plurality of cooperating means
US3573745A (en) * 1968-12-04 1971-04-06 Bell Telephone Labor Inc Group queuing

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1249320B (fr) * 1964-12-23
US3699530A (en) * 1970-12-30 1972-10-17 Ibm Input/output system with dedicated channel buffering
US3878513A (en) * 1972-02-08 1975-04-15 Burroughs Corp Data processing method and apparatus using occupancy indications to reserve storage space for a stack
US3818461A (en) * 1972-04-10 1974-06-18 Litton Systems Inc Buffer memory system
GB1441816A (en) * 1973-07-18 1976-07-07 Int Computers Ltd Electronic digital data processing systems
US3889243A (en) * 1973-10-18 1975-06-10 Ibm Stack mechanism for a data processor
GB1467726A (en) * 1974-05-02 1977-03-23 Solartron Electronic Group Interfaces for data transmission systems
JPS5247638A (en) * 1975-10-15 1977-04-15 Toshiba Corp Information processing device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3503048A (en) * 1966-03-25 1970-03-24 Ericsson Telefon Ab L M Arrangement in computers for controlling a plant consisting of a plurality of cooperating means
US3447135A (en) * 1966-08-18 1969-05-27 Ibm Peripheral data exchange
US3573745A (en) * 1968-12-04 1971-04-06 Bell Telephone Labor Inc Group queuing

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
EXBK/76 *

Also Published As

Publication number Publication date
GB1564689A (en) 1980-04-10
AU3355678A (en) 1979-08-30
AU517630B2 (en) 1981-08-13
IT7820706A0 (it) 1978-02-28
BR7801184A (pt) 1978-10-31
FR2382054B1 (fr) 1986-02-28
MX147418A (es) 1982-12-02
YU39412B (en) 1984-12-31
SE7702143L (sv) 1978-08-29
ES467339A1 (es) 1978-11-01
US4208714A (en) 1980-06-17
CA1113572A (fr) 1981-12-01
IT1110459B (it) 1985-12-23
SE414087B (sv) 1980-07-07
YU46578A (en) 1982-06-30
HU176660B (en) 1981-04-28
NL7802215A (nl) 1978-08-30

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Legal Events

Date Code Title Description
ST Notification of lapse