JPS5491032A - Data channel device - Google Patents

Data channel device

Info

Publication number
JPS5491032A
JPS5491032A JP15796577A JP15796577A JPS5491032A JP S5491032 A JPS5491032 A JP S5491032A JP 15796577 A JP15796577 A JP 15796577A JP 15796577 A JP15796577 A JP 15796577A JP S5491032 A JPS5491032 A JP S5491032A
Authority
JP
Japan
Prior art keywords
data
transfer
permit
request
channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15796577A
Other languages
Japanese (ja)
Other versions
JPS612226B2 (en
Inventor
Toshihiro Akiyoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15796577A priority Critical patent/JPS5491032A/en
Publication of JPS5491032A publication Critical patent/JPS5491032A/en
Publication of JPS612226B2 publication Critical patent/JPS612226B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE: To enable a unit to which several electronic computer systems are directly connected to transfer data and addresses amoung data channels via one common bus and also to any one of several transfer destinations.
CONSTITUTION: Several electronic computers 100, 101 and 10n are connected directly to data channels 300, 301 and 30n, which are connected together via common data bus line 400 and data-transfer request-permit control line 500. In addition to data separator circuits generating data request signals and memory-unit address registers and data-amount registers stored respectively with address information and data-amount information, those channels 300 to 30n are equipped with channel control circuits which receive the signal of a control information holding register sending out a transfer-end indication signal by detecting that counting and transfer at every transmission unit are completed, and data-transfer request permit control circuits which send out data transfer permit signals answering to data request signals.
COPYRIGHT: (C)1979,JPO&Japio
JP15796577A 1977-12-28 1977-12-28 Data channel device Granted JPS5491032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15796577A JPS5491032A (en) 1977-12-28 1977-12-28 Data channel device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15796577A JPS5491032A (en) 1977-12-28 1977-12-28 Data channel device

Publications (2)

Publication Number Publication Date
JPS5491032A true JPS5491032A (en) 1979-07-19
JPS612226B2 JPS612226B2 (en) 1986-01-23

Family

ID=15661307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15796577A Granted JPS5491032A (en) 1977-12-28 1977-12-28 Data channel device

Country Status (1)

Country Link
JP (1) JPS5491032A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6267664A (en) * 1985-09-20 1987-03-27 Canon Inc Data transfer system
WO1989008886A1 (en) * 1988-03-09 1989-09-21 Fanuc Ltd Data exchange between a plurality of processors

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02149582U (en) * 1989-05-22 1990-12-20

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6267664A (en) * 1985-09-20 1987-03-27 Canon Inc Data transfer system
WO1989008886A1 (en) * 1988-03-09 1989-09-21 Fanuc Ltd Data exchange between a plurality of processors

Also Published As

Publication number Publication date
JPS612226B2 (en) 1986-01-23

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