JPS56162166A - Data transfer system - Google Patents

Data transfer system

Info

Publication number
JPS56162166A
JPS56162166A JP6539480A JP6539480A JPS56162166A JP S56162166 A JPS56162166 A JP S56162166A JP 6539480 A JP6539480 A JP 6539480A JP 6539480 A JP6539480 A JP 6539480A JP S56162166 A JPS56162166 A JP S56162166A
Authority
JP
Japan
Prior art keywords
data
sector
area
substitutional
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6539480A
Other languages
Japanese (ja)
Inventor
Chihiro Tsuchiya
Takashi Nohara
Noboru Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6539480A priority Critical patent/JPS56162166A/en
Publication of JPS56162166A publication Critical patent/JPS56162166A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE:To reduce the address switching frequency accompanied with read of a substitutional area to improve the data transfer speed, by transferring data of a normal area first and by transferring data of the substitutional area, which is assigned to a defective area, next. CONSTITUTION:Data is read from and written to a file system input/output device 100 in the sector unit, and data from the device 100 is transferred to a transfer destination device 200. If a defective sector for which substitution is registered is included in this transfer sector group, the defective sector of an address information part ID of sectors is detected by an ID monitor circuit 5 to generate a defective sector signal (a). When this signal (a) is outputted, a substitutional sector address in the ID is set to a substitution destination address register 6, and contents of a transfer destination address register 5 are set to a transfer destination address register 7 at the substitution time, and the register 5 and a defective sector conut register 8 are counted up by +1, and data of the substitutional area is transferred, thereby reducing the address switching frequency to improve the data transfer speed.
JP6539480A 1980-05-19 1980-05-19 Data transfer system Pending JPS56162166A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6539480A JPS56162166A (en) 1980-05-19 1980-05-19 Data transfer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6539480A JPS56162166A (en) 1980-05-19 1980-05-19 Data transfer system

Publications (1)

Publication Number Publication Date
JPS56162166A true JPS56162166A (en) 1981-12-12

Family

ID=13285739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6539480A Pending JPS56162166A (en) 1980-05-19 1980-05-19 Data transfer system

Country Status (1)

Country Link
JP (1) JPS56162166A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61101831A (en) * 1984-10-24 1986-05-20 Fujitsu Ltd Alternate block processing system
WO1998045771A1 (en) * 1997-04-07 1998-10-15 Sony Corporation Recording and reproducing device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61101831A (en) * 1984-10-24 1986-05-20 Fujitsu Ltd Alternate block processing system
WO1998045771A1 (en) * 1997-04-07 1998-10-15 Sony Corporation Recording and reproducing device
US6308007B1 (en) 1997-04-07 2001-10-23 Sony Corporation Recording and reproducing device

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