FR2373828A1 - Microprocesseur - Google Patents
MicroprocesseurInfo
- Publication number
- FR2373828A1 FR2373828A1 FR7737530A FR7737530A FR2373828A1 FR 2373828 A1 FR2373828 A1 FR 2373828A1 FR 7737530 A FR7737530 A FR 7737530A FR 7737530 A FR7737530 A FR 7737530A FR 2373828 A1 FR2373828 A1 FR 2373828A1
- Authority
- FR
- France
- Prior art keywords
- stack
- instructions
- registers
- unit
- executing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/355—Indexed addressing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
Abstract
L'invention concerne les microprocesseurs, et notamment l'architecture des circuits d'exécution et de recherche des instructions. Le microprocesseur de l'invention se compose de deux unités fonctionnelles, l'une exécutant les instructions du microprogramme et l'autre recherchant les instructions dans la séquence voulue en simultanéité partielle avec l'exécution. Chaque unité fonctionnelle comprend une pile de registres d'opérandes ou d'adresses ayant deux accès indépendants pour la lecture et pour l'écriture Dans l'unité d'exécution, les opérandes fournis par l'unité de recherche sont stockés dans la pile de registres et sont transmis à une unité arithmétique et logique qui effectue l'opération désirée. La pile de registres de l'unité de recherche permet l'adressage indirect avec incrémentation ou décrémentation par un additionneur.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/749,994 US4079455A (en) | 1976-12-13 | 1976-12-13 | Microprocessor architecture |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2373828A1 true FR2373828A1 (fr) | 1978-07-07 |
FR2373828B1 FR2373828B1 (fr) | 1981-11-20 |
Family
ID=25016084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7737530A Granted FR2373828A1 (fr) | 1976-12-13 | 1977-12-13 | Microprocesseur |
Country Status (7)
Country | Link |
---|---|
US (1) | US4079455A (fr) |
JP (1) | JPS5374858A (fr) |
DE (1) | DE2755273A1 (fr) |
FR (1) | FR2373828A1 (fr) |
GB (1) | GB1590028A (fr) |
IT (1) | IT1088703B (fr) |
SE (1) | SE425527B (fr) |
Families Citing this family (55)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4247893A (en) * | 1977-01-03 | 1981-01-27 | Motorola, Inc. | Memory interface device with processing capability |
US4217638A (en) * | 1977-05-19 | 1980-08-12 | Tokyo Shibaura Electric Co., Ltd. | Data-processing apparatus and method |
US4272829A (en) * | 1977-12-29 | 1981-06-09 | Ncr Corporation | Reconfigurable register and logic circuitry device for selective connection to external buses |
US4403282A (en) * | 1978-01-23 | 1983-09-06 | Data General Corporation | Data processing system using a high speed data channel for providing direct memory access for block data transfers |
US4363091A (en) * | 1978-01-31 | 1982-12-07 | Intel Corporation | Extended address, single and multiple bit microprocessor |
JPS54114687A (en) * | 1978-02-27 | 1979-09-06 | Toyoda Mach Works Ltd | Sequence controller |
WO1979000959A1 (fr) * | 1978-04-21 | 1979-11-15 | Ncr Co | Systeme informatique ayant un circuit d'acces de memoire ameliore |
US4255785A (en) * | 1978-09-25 | 1981-03-10 | Motorola, Inc. | Microprocessor having instruction fetch and execution overlap |
US4217657A (en) * | 1978-10-18 | 1980-08-12 | Honeywell Inc. | Floating point arithmetic control |
US4298927A (en) * | 1978-10-23 | 1981-11-03 | International Business Machines Corporation | Computer instruction prefetch circuit |
US4316244A (en) * | 1978-11-08 | 1982-02-16 | Data General Corporation | Memory apparatus for digital computer system |
US4310879A (en) * | 1979-03-08 | 1982-01-12 | Pandeya Arun K | Parallel processor having central processor memory extension |
US4279016A (en) * | 1979-06-21 | 1981-07-14 | International Business Machines Corporation | Instruction pre-fetch microprocessor interrupt system |
US4296470A (en) * | 1979-06-21 | 1981-10-20 | International Business Machines Corp. | Link register storage and restore system for use in an instruction pre-fetch micro-processor interrupt system |
US4306286A (en) * | 1979-06-29 | 1981-12-15 | International Business Machines Corporation | Logic simulation machine |
US4367524A (en) * | 1980-02-07 | 1983-01-04 | Intel Corporation | Microinstruction execution unit for use in a microprocessor |
US4412283A (en) * | 1980-05-30 | 1983-10-25 | Fairchild Camera & Instrument Corp. | High performance microprocessor system |
US4434461A (en) | 1980-09-15 | 1984-02-28 | Motorola, Inc. | Microprocessor with duplicate registers for processing interrupts |
US4486624A (en) * | 1980-09-15 | 1984-12-04 | Motorola, Inc. | Microprocessor controlled radiotelephone transceiver |
US4390963A (en) * | 1980-09-15 | 1983-06-28 | Motorola, Inc. | Interface adapter architecture |
JPS5757345A (en) * | 1980-09-24 | 1982-04-06 | Toshiba Corp | Data controller |
US4656580A (en) * | 1982-06-11 | 1987-04-07 | International Business Machines Corporation | Logic simulation machine |
DE3305693A1 (de) * | 1983-02-18 | 1984-08-30 | Nixdorf Computer Ag | Schaltungsanordnung zur zwischenspeicherung von befehlsworten |
US4737933A (en) * | 1983-02-22 | 1988-04-12 | Storage Technology Partners | CMOS multiport general purpose register |
EP0150177A1 (fr) * | 1983-07-11 | 1985-08-07 | Prime Computer, Inc. | Systeme de traitement de donnees |
US4575793A (en) * | 1983-08-19 | 1986-03-11 | Cxi, Inc. | Personal-computer to 3270 system interfacing apparatus |
EP0136218A3 (fr) * | 1983-08-29 | 1988-04-20 | FAIRCHILD CAMERA & INSTRUMENT CORPORATION | Processeur pipeline à portes multiples |
US4630045A (en) * | 1983-10-24 | 1986-12-16 | International Business Machines Corporation | Controller for a cross-point switching matrix |
US4831521A (en) * | 1983-11-10 | 1989-05-16 | General Signal Corporation | Vital processor implemented with non-vital hardware |
JPS60156151A (ja) * | 1983-12-23 | 1985-08-16 | Nec Corp | メモリアクセス制御装置 |
JPS61115153A (ja) * | 1984-11-09 | 1986-06-02 | Hitachi Ltd | デ−タ処理装置 |
JPH0776917B2 (ja) * | 1984-12-29 | 1995-08-16 | ソニー株式会社 | マイクロコンピユ−タ |
JPS6347833A (ja) * | 1986-08-15 | 1988-02-29 | Nec Corp | マイクロコンピユ−タ |
US5230079A (en) * | 1986-09-18 | 1993-07-20 | Digital Equipment Corporation | Massively parallel array processing system with processors selectively accessing memory module locations using address in microword or in address register |
US4985832A (en) * | 1986-09-18 | 1991-01-15 | Digital Equipment Corporation | SIMD array processing system with routing networks having plurality of switching stages to transfer messages among processors |
US5146606A (en) * | 1986-09-18 | 1992-09-08 | Digital Equipment Corporation | Systems for interconnecting and configuring plurality of memory elements by control of mode signals |
US6108763A (en) * | 1986-09-18 | 2000-08-22 | Grondalski; Robert S. | Simultaneous parity generating/reading circuit for massively parallel processing systems |
US5226129A (en) * | 1986-10-30 | 1993-07-06 | Nec Corporation | Program counter and indirect address calculation system which concurrently performs updating of a program counter and generation of an effective address |
JPS63285635A (ja) * | 1987-05-18 | 1988-11-22 | Fanuc Ltd | プロセッサ制御方式 |
EP0293517B1 (fr) * | 1987-06-02 | 1992-11-25 | Deutsche ITT Industries GmbH | Processeur de commande |
US4953078A (en) * | 1987-10-28 | 1990-08-28 | Digital Equipment Corporation | Apparatus and method for multi-threaded program execution in a microcoded data processing system |
JPH0795269B2 (ja) * | 1988-11-04 | 1995-10-11 | 富士通株式会社 | 命令コードのデコード装置 |
US5440749A (en) * | 1989-08-03 | 1995-08-08 | Nanotronics Corporation | High performance, low cost microprocessor architecture |
GB9018990D0 (en) * | 1990-08-31 | 1990-10-17 | Ncr Co | Register control for workstation interfacing means |
US5473271A (en) * | 1993-02-09 | 1995-12-05 | Dallas Semiconductor Corporation | Microprocessor output driver |
JPH08110886A (ja) * | 1994-10-07 | 1996-04-30 | Ricoh Co Ltd | Dmaコントローラ及びファクシミリ装置 |
US5802359A (en) * | 1995-03-31 | 1998-09-01 | International Business Machines Corporation | Mapping processor state into a millicode addressable processor state register array |
JP3211750B2 (ja) * | 1997-02-27 | 2001-09-25 | 株式会社デンソー | 情報処理装置及びパイプライン処理方法 |
US6970985B2 (en) | 2002-07-09 | 2005-11-29 | Bluerisc Inc. | Statically speculative memory accessing |
US20050114850A1 (en) | 2003-10-29 | 2005-05-26 | Saurabh Chheda | Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control |
US7996671B2 (en) * | 2003-11-17 | 2011-08-09 | Bluerisc Inc. | Security of program executables and microprocessors based on compiler-architecture interaction |
US8607209B2 (en) | 2004-02-04 | 2013-12-10 | Bluerisc Inc. | Energy-focused compiler-assisted branch prediction |
US20070294181A1 (en) * | 2006-05-22 | 2007-12-20 | Saurabh Chheda | Flexible digital rights management with secure snippets |
US20080126766A1 (en) | 2006-11-03 | 2008-05-29 | Saurabh Chheda | Securing microprocessors against information leakage and physical tampering |
US20080154379A1 (en) * | 2006-12-22 | 2008-06-26 | Musculoskeletal Transplant Foundation | Interbody fusion hybrid graft |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3737866A (en) * | 1971-07-27 | 1973-06-05 | Data General Corp | Data storage and retrieval system |
US3896418A (en) * | 1971-08-31 | 1975-07-22 | Texas Instruments Inc | Synchronous multi-processor system utilizing a single external memory unit |
US3757308A (en) * | 1971-09-03 | 1973-09-04 | Texas Instruments Inc | Data processor |
US3748649A (en) * | 1972-02-29 | 1973-07-24 | Bell Telephone Labor Inc | Translator memory decoding arrangement for a microprogram controlled processor |
NL7410610A (nl) * | 1973-08-10 | 1975-02-12 | Data General Corp | Stelsel voor het verwerken van gegevens. |
JPS511157A (en) * | 1974-06-24 | 1976-01-07 | Nippon Electric Co | Reezakosenomochiita shojunsochi |
US3984813A (en) * | 1974-10-07 | 1976-10-05 | Fairchild Camera And Instrument Corporation | Microprocessor system |
US3962682A (en) * | 1974-10-30 | 1976-06-08 | Motorola, Inc. | Split low order internal address bus for microprocessor |
US3980992A (en) * | 1974-11-26 | 1976-09-14 | Burroughs Corporation | Multi-microprocessing unit on a single semiconductor chip |
US3988717A (en) * | 1975-08-06 | 1976-10-26 | Litton Systems, Inc. | General purpose computer or logic chip and system |
-
1976
- 1976-12-13 US US05/749,994 patent/US4079455A/en not_active Expired - Lifetime
-
1977
- 1977-11-28 SE SE7713451A patent/SE425527B/xx not_active IP Right Cessation
- 1977-11-29 IT IT30208/77A patent/IT1088703B/it active
- 1977-12-12 DE DE19772755273 patent/DE2755273A1/de active Granted
- 1977-12-12 GB GB51689/77A patent/GB1590028A/en not_active Expired
- 1977-12-13 FR FR7737530A patent/FR2373828A1/fr active Granted
- 1977-12-13 JP JP15038977A patent/JPS5374858A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPS5374858A (en) | 1978-07-03 |
DE2755273C2 (fr) | 1987-09-03 |
IT1088703B (it) | 1985-06-10 |
SE425527B (sv) | 1982-10-04 |
DE2755273A1 (de) | 1978-06-15 |
US4079455A (en) | 1978-03-14 |
SE7713451L (sv) | 1978-06-14 |
GB1590028A (en) | 1981-05-28 |
FR2373828B1 (fr) | 1981-11-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |