FR2354633A1 - Procede pour realiser des configurations metalliques sur un substrat isolant - Google Patents

Procede pour realiser des configurations metalliques sur un substrat isolant

Info

Publication number
FR2354633A1
FR2354633A1 FR7714017A FR7714017A FR2354633A1 FR 2354633 A1 FR2354633 A1 FR 2354633A1 FR 7714017 A FR7714017 A FR 7714017A FR 7714017 A FR7714017 A FR 7714017A FR 2354633 A1 FR2354633 A1 FR 2354633A1
Authority
FR
France
Prior art keywords
layer
underlay
pref
iii
thick
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7714017A
Other languages
English (en)
Other versions
FR2354633B1 (fr
Inventor
Ronald L Anderson
Eugene E Castellani
Patrick M Mccaffrey
Lubomyr T Romankiw
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2354633A1 publication Critical patent/FR2354633A1/fr
Application granted granted Critical
Publication of FR2354633B1 publication Critical patent/FR2354633B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0175—Inorganic, non-metallic layer, e.g. resist or dielectric for printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0179—Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0577—Double layer of resist having the same pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0585—Second resist used as mask for selective stripping of first resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

Procédé pour réaliser des configurations métalliques sur un substrat isolant. Ce procédé prévoit le dépôt d'une couche d'adhérence 11 sur un substrat isolant 10 par exemple en silice, suivi du dépôt successif d'une couche 12 d'un matérieu susceptible d'être plaqué électrolytiquement et d'une couche 13 non placable; la formation d'un masque 16 selon une configuration désirée, l'élimination des parues exposées de la couche 13 et le dépôt électrolytique d'un matériau 17. Après élimination du masque et des parties des couches 11, 12 et 13 sous-jacentes, on obtient la configuration métallique désirée. Ce procédé évite le dépôt électrolytique latéral grâce à la couche 13 qui ne se soulève pas à la différence d'un masque en matériau photorésistant. Application à l'industrie des semi-conducteurs.
FR7714017A 1976-06-11 1977-05-03 Procede pour realiser des configurations metalliques sur un substrat isolant Granted FR2354633A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69224176A 1976-06-11 1976-06-11

Publications (2)

Publication Number Publication Date
FR2354633A1 true FR2354633A1 (fr) 1978-01-06
FR2354633B1 FR2354633B1 (fr) 1978-10-20

Family

ID=24779803

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7714017A Granted FR2354633A1 (fr) 1976-06-11 1977-05-03 Procede pour realiser des configurations metalliques sur un substrat isolant

Country Status (3)

Country Link
JP (1) JPS52151639A (fr)
DE (1) DE2720109A1 (fr)
FR (1) FR2354633A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2571894A1 (fr) * 1984-10-16 1986-04-18 Nec Corp Procede de fabrication d'un circuit multi-couches
EP0630044A2 (fr) * 1988-09-08 1994-12-21 Kabushiki Kaisha Toshiba Formation d'une configuration déterminée sur une couche d'un dispositif semi-conducteur

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57198696A (en) * 1981-06-01 1982-12-06 Shimada Rika Kogyo Kk Method of producing thin film circuit
JPH0732299B2 (ja) * 1986-05-08 1995-04-10 株式会社日立製作所 配線板の製造方法
JPH02914Y2 (fr) * 1988-09-07 1990-01-10
AU2003901730A0 (en) 2003-04-11 2003-05-01 Cochlear Limited Power management system
AU2003903532A0 (en) * 2003-07-09 2003-07-24 Cochlear Limited Conductive elements

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2571894A1 (fr) * 1984-10-16 1986-04-18 Nec Corp Procede de fabrication d'un circuit multi-couches
EP0630044A2 (fr) * 1988-09-08 1994-12-21 Kabushiki Kaisha Toshiba Formation d'une configuration déterminée sur une couche d'un dispositif semi-conducteur
EP0630044A3 (fr) * 1988-09-08 1995-03-29 Tokyo Shibaura Electric Co Formation d'une configuration déterminée sur une couche d'un dispositif semi-conducteur.

Also Published As

Publication number Publication date
FR2354633B1 (fr) 1978-10-20
JPS52151639A (en) 1977-12-16
DE2720109A1 (de) 1977-12-22

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Legal Events

Date Code Title Description
ST Notification of lapse