FR2340622A1 - Procede de fabrication d'un transistor a effet de champ a grille au silicium et d'un condensateur; cellule ainsi obtenue - Google Patents

Procede de fabrication d'un transistor a effet de champ a grille au silicium et d'un condensateur; cellule ainsi obtenue

Info

Publication number
FR2340622A1
FR2340622A1 FR7700642A FR7700642A FR2340622A1 FR 2340622 A1 FR2340622 A1 FR 2340622A1 FR 7700642 A FR7700642 A FR 7700642A FR 7700642 A FR7700642 A FR 7700642A FR 2340622 A1 FR2340622 A1 FR 2340622A1
Authority
FR
France
Prior art keywords
condenser
cell
manufacturing
effect transistor
grid field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7700642A
Other languages
English (en)
French (fr)
Other versions
FR2340622B1 (en:Method
Inventor
Vincent L Rideout
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/656,756 external-priority patent/US4075045A/en
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2340622A1 publication Critical patent/FR2340622A1/fr
Application granted granted Critical
Publication of FR2340622B1 publication Critical patent/FR2340622B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
FR7700642A 1976-02-09 1977-01-05 Procede de fabrication d'un transistor a effet de champ a grille au silicium et d'un condensateur; cellule ainsi obtenue Granted FR2340622A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/656,756 US4075045A (en) 1976-02-09 1976-02-09 Method for fabricating FET one-device memory cells with two layers of polycrystalline silicon and fabrication of integrated circuits containing arrays of the memory cells charge storage capacitors utilizing five basic pattern deliberating steps
US05/702,247 US4085498A (en) 1976-02-09 1976-07-02 Fabrication of integrated circuits containing enhancement-mode FETs and depletion-mode FETs with two layers of polycrystalline silicon utilizing five basic pattern delineating steps

Publications (2)

Publication Number Publication Date
FR2340622A1 true FR2340622A1 (fr) 1977-09-02
FR2340622B1 FR2340622B1 (en:Method) 1980-10-24

Family

ID=27097257

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7700642A Granted FR2340622A1 (fr) 1976-02-09 1977-01-05 Procede de fabrication d'un transistor a effet de champ a grille au silicium et d'un condensateur; cellule ainsi obtenue

Country Status (1)

Country Link
FR (1) FR2340622A1 (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2437674A1 (fr) * 1978-09-29 1980-04-25 Siemens Ag Memoire a semi-conducteurs comportant des varactors a appauvrissement servant de condensateurs de memoire

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2437674A1 (fr) * 1978-09-29 1980-04-25 Siemens Ag Memoire a semi-conducteurs comportant des varactors a appauvrissement servant de condensateurs de memoire

Also Published As

Publication number Publication date
FR2340622B1 (en:Method) 1980-10-24

Similar Documents

Publication Publication Date Title
US4451744A (en) Monolithic integrated reference voltage source
JPS5775453A (en) Semiconductor device and manufacture thereof
GB1408180A (en) Semiconductor device manufacture
KR850005163A (ko) 전계효과형 트랜지스터의 제조방법
KR930024182A (ko) "상보형 금속 산화물 반도체(cmos)"또는 바이폴라/cmos공정을 사용하여 n-채널 및 p-채널 접합 전계 효과 트랜지스터 및 cmos 트랜지스터를 제조하는 방법
JPS60186053A (ja) 薄膜相補型ｍｏｓ回路
FR2340622A1 (fr) Procede de fabrication d'un transistor a effet de champ a grille au silicium et d'un condensateur; cellule ainsi obtenue
HK73586A (en) A semiconductor integrated circuit device and a method of making the same
JPS6417480A (en) Junction type field-effect transistor
JPS55157265A (en) Manufacturing mthod for mos field-effect transistor
KR880010508A (ko) 반도체장치와 그 제조방법
JPS57106082A (en) Manufacture of schottky junction type electric field effect transistor
KR940010308A (ko) 박막 트랜지스터 및 그 제조 방법
KR920013755A (ko) 멀티게이트를 사용한 모스 트랜지스터 및 그 제조방법
JPS61100975A (ja) 接合形電界効果トランジスタ
KR900004035A (ko) 서로 다른 동작영역을 갖는 모스트랜지스터의 제조방법
JPS56129375A (en) Mos integrate circuit
JPS57106150A (en) Manufacture of semiconductor device
JPS56147467A (en) Cmos semiconductor device and manufacture thereof
JPS57134948A (en) Semiconductor device
KR970054196A (ko) 반도체 소자 및 그의 제조방법
KR980005892A (ko) 반도체 장치의 박막트랜지스터 제조방법
KR940016753A (ko) 박막트랜지스터 및 그 제조방법
KR970013120A (ko) 박막 트랜지스터 및 그 제조 방법
ATE43204T1 (de) Verfahren zum herstellen von integrierten schaltungen durch mos- und cmos-technologie und entsprechende cmos-struktur.

Legal Events

Date Code Title Description
ST Notification of lapse