JPS6417480A - Junction type field-effect transistor - Google Patents

Junction type field-effect transistor

Info

Publication number
JPS6417480A
JPS6417480A JP62174138A JP17413887A JPS6417480A JP S6417480 A JPS6417480 A JP S6417480A JP 62174138 A JP62174138 A JP 62174138A JP 17413887 A JP17413887 A JP 17413887A JP S6417480 A JPS6417480 A JP S6417480A
Authority
JP
Japan
Prior art keywords
layer
high concentration
diffusing
concentration layer
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62174138A
Other languages
Japanese (ja)
Other versions
JPH0543303B2 (en
Inventor
Noboru Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62174138A priority Critical patent/JPS6417480A/en
Publication of JPS6417480A publication Critical patent/JPS6417480A/en
Publication of JPH0543303B2 publication Critical patent/JPH0543303B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To shorten manufacturing steps and to reduce an input capacity in a cascode JFET by simultaneously diffusing a first gate high concentration layer and a second gate high concentration layer, and reducing its diffusion depth. CONSTITUTION:After a channel layer 12 is epitaxially grown on a semiconductor substrate 11, an element isolating layer 13 is formed. Then, a source high concentration layer 14 and a drain high concentration layer 15 are formed in the layer 12 surrounded by this element isolating region. A first gate high concentration layer 16 and a second gate high concentration layer 17 having equal shallow diffusing depth are simultaneously diffused and formed between the layers 14 and 15. Thus, since the diffusing depth of the layer 16 is shallow, a lateral diffusing length is shortened, and when it is miniaturized, its effective gate length is shortened. Accordingly, an input capacity between a gate and a source can be reduced. Further, since first and second gates are simultaneously diffused, the number of diffusing steps can be reduced.
JP62174138A 1987-07-13 1987-07-13 Junction type field-effect transistor Granted JPS6417480A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62174138A JPS6417480A (en) 1987-07-13 1987-07-13 Junction type field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62174138A JPS6417480A (en) 1987-07-13 1987-07-13 Junction type field-effect transistor

Publications (2)

Publication Number Publication Date
JPS6417480A true JPS6417480A (en) 1989-01-20
JPH0543303B2 JPH0543303B2 (en) 1993-07-01

Family

ID=15973328

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62174138A Granted JPS6417480A (en) 1987-07-13 1987-07-13 Junction type field-effect transistor

Country Status (1)

Country Link
JP (1) JPS6417480A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5229051A (en) * 1983-11-04 1993-07-20 Perma-Post International, Inc. Method for making sleeve encased concrete posts
US5675956A (en) * 1994-04-25 1997-10-14 Nevin; Jerome F. Post and pole construction using composite materials
JP2007134613A (en) * 2005-11-14 2007-05-31 Sumitomo Electric Ind Ltd Lateral junction field effect transistor
JP2013509731A (en) * 2009-11-02 2013-03-14 アナログ デバイシス， インコーポレイテッド Junction field effect transistor and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5115710A (en) * 1974-07-31 1976-02-07 Toyota Motor Co Ltd Kyukibenojushinai fukunenshoshitsukaranaru nainenkikan
JPS522271A (en) * 1975-06-24 1977-01-08 Tokyo Tsushin Kozai Kk Electromagnetic counter
JPS5218104A (en) * 1975-07-31 1977-02-10 Sutotsupani Sa Ets Puurura Mek Device for connecting telephone line to computer
JPS5222513A (en) * 1975-08-15 1977-02-19 Fuji Electric Co Ltd Heating furnace apparatus

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5115710A (en) * 1974-07-31 1976-02-07 Toyota Motor Co Ltd Kyukibenojushinai fukunenshoshitsukaranaru nainenkikan
JPS522271A (en) * 1975-06-24 1977-01-08 Tokyo Tsushin Kozai Kk Electromagnetic counter
JPS5218104A (en) * 1975-07-31 1977-02-10 Sutotsupani Sa Ets Puurura Mek Device for connecting telephone line to computer
JPS5222513A (en) * 1975-08-15 1977-02-19 Fuji Electric Co Ltd Heating furnace apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5229051A (en) * 1983-11-04 1993-07-20 Perma-Post International, Inc. Method for making sleeve encased concrete posts
US5675956A (en) * 1994-04-25 1997-10-14 Nevin; Jerome F. Post and pole construction using composite materials
JP2007134613A (en) * 2005-11-14 2007-05-31 Sumitomo Electric Ind Ltd Lateral junction field effect transistor
JP2013509731A (en) * 2009-11-02 2013-03-14 アナログ デバイシス， インコーポレイテッド Junction field effect transistor and manufacturing method thereof

Also Published As

Publication number Publication date
JPH0543303B2 (en) 1993-07-01

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees