FR2308164A1 - Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires - Google Patents

Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires

Info

Publication number
FR2308164A1
FR2308164A1 FR7512014A FR7512014A FR2308164A1 FR 2308164 A1 FR2308164 A1 FR 2308164A1 FR 7512014 A FR7512014 A FR 7512014A FR 7512014 A FR7512014 A FR 7512014A FR 2308164 A1 FR2308164 A1 FR 2308164A1
Authority
FR
France
Prior art keywords
hierarchy
data
memories
control
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7512014A
Other languages
English (en)
Other versions
FR2308164B1 (fr
Inventor
Paul Feautrier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
INFORMATIQUE CIE INTERNATIONALE
Original Assignee
INFORMATIQUE CIE INTERNATIONALE
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by INFORMATIQUE CIE INTERNATIONALE filed Critical INFORMATIQUE CIE INTERNATIONALE
Priority to FR7512014A priority Critical patent/FR2308164A1/fr
Publication of FR2308164A1 publication Critical patent/FR2308164A1/fr
Application granted granted Critical
Publication of FR2308164B1 publication Critical patent/FR2308164B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
FR7512014A 1975-04-17 1975-04-17 Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires Granted FR2308164A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7512014A FR2308164A1 (fr) 1975-04-17 1975-04-17 Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7512014A FR2308164A1 (fr) 1975-04-17 1975-04-17 Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires

Publications (2)

Publication Number Publication Date
FR2308164A1 true FR2308164A1 (fr) 1976-11-12
FR2308164B1 FR2308164B1 (fr) 1979-10-19

Family

ID=9154092

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7512014A Granted FR2308164A1 (fr) 1975-04-17 1975-04-17 Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires

Country Status (1)

Country Link
FR (1) FR2308164A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2710477A1 (de) * 1976-03-10 1977-09-15 Cii Honeywell Bull Anordnung zur kohaerenten leitung des informationsaustauschs zwischen zwei aneinanderstossenden niveaus einer speicherhierarchie
EP0468804A2 (fr) * 1990-07-27 1992-01-29 Fujitsu Limited Système de commande de mémoire hiérarchique

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NEANT *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2710477A1 (de) * 1976-03-10 1977-09-15 Cii Honeywell Bull Anordnung zur kohaerenten leitung des informationsaustauschs zwischen zwei aneinanderstossenden niveaus einer speicherhierarchie
EP0468804A2 (fr) * 1990-07-27 1992-01-29 Fujitsu Limited Système de commande de mémoire hiérarchique
EP0468804A3 (en) * 1990-07-27 1995-02-15 Fujitsu Ltd Hierarchical memory control system

Also Published As

Publication number Publication date
FR2308164B1 (fr) 1979-10-19

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