DE69825621D1 - Verfahren und vorrichtung zur zugriffsteuerung von gemeinsamem speicher - Google Patents
Verfahren und vorrichtung zur zugriffsteuerung von gemeinsamem speicherInfo
- Publication number
- DE69825621D1 DE69825621D1 DE69825621T DE69825621T DE69825621D1 DE 69825621 D1 DE69825621 D1 DE 69825621D1 DE 69825621 T DE69825621 T DE 69825621T DE 69825621 T DE69825621 T DE 69825621T DE 69825621 D1 DE69825621 D1 DE 69825621D1
- Authority
- DE
- Germany
- Prior art keywords
- processor
- common memory
- memory
- cache
- mapping
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0888—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0837—Cache consistency protocols with software control, e.g. non-cacheable data
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9724033A GB2331379A (en) | 1997-11-13 | 1997-11-13 | Controlling access to a shared memory by dual mapping |
PCT/GB1998/003305 WO1999026141A1 (en) | 1997-11-13 | 1998-11-04 | Method and apparatus for controlling shared memory access |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69825621D1 true DE69825621D1 (de) | 2004-09-16 |
Family
ID=10822041
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69825621T Expired - Lifetime DE69825621D1 (de) | 1997-11-13 | 1998-11-04 | Verfahren und vorrichtung zur zugriffsteuerung von gemeinsamem speicher |
Country Status (8)
Country | Link |
---|---|
US (1) | US6397305B1 (de) |
EP (1) | EP1031082B1 (de) |
AT (1) | ATE273536T1 (de) |
AU (1) | AU9755798A (de) |
DE (1) | DE69825621D1 (de) |
GB (1) | GB2331379A (de) |
IL (1) | IL135311A (de) |
WO (1) | WO1999026141A1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2814555B1 (fr) * | 2000-09-25 | 2003-02-28 | Thomson Multimedia Sa | Systeme et procede de gestion memoire de coherence de donnees et reseau multiprocesseur associe |
US6891543B2 (en) | 2002-05-08 | 2005-05-10 | Intel Corporation | Method and system for optimally sharing memory between a host processor and graphics processor |
JP2004171209A (ja) * | 2002-11-19 | 2004-06-17 | Matsushita Electric Ind Co Ltd | 共有メモリデータ転送装置 |
US7047364B2 (en) * | 2003-12-29 | 2006-05-16 | Intel Corporation | Cache memory management |
JP5699756B2 (ja) * | 2011-03-31 | 2015-04-15 | 富士通株式会社 | 情報処理装置及び情報処理装置制御方法 |
CN109857573B (zh) * | 2018-12-29 | 2021-03-05 | 深圳云天励飞技术有限公司 | 一种数据共享方法、装置、设备及系统 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4136386A (en) * | 1977-10-06 | 1979-01-23 | International Business Machines Corporation | Backing store access coordination in a multi-processor system |
US4282572A (en) * | 1979-01-15 | 1981-08-04 | Ncr Corporation | Multiprocessor memory access system |
US5091846A (en) * | 1986-10-03 | 1992-02-25 | Intergraph Corporation | Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency |
EP0288649B1 (de) * | 1987-04-22 | 1992-10-21 | International Business Machines Corporation | Speichersteuersystem |
US5119290A (en) * | 1987-10-02 | 1992-06-02 | Sun Microsystems, Inc. | Alias address support |
JPH07168763A (ja) * | 1992-11-13 | 1995-07-04 | Cyrix Corp | ライトスルーキャシュ設計のシステムでのライトバックキャシュのコヒーレンシ |
JP3429948B2 (ja) * | 1996-04-10 | 2003-07-28 | 株式会社日立製作所 | 組込み型cpu用制御装置 |
-
1997
- 1997-11-13 GB GB9724033A patent/GB2331379A/en not_active Withdrawn
-
1998
- 1998-11-04 IL IL13531198A patent/IL135311A/en not_active IP Right Cessation
- 1998-11-04 WO PCT/GB1998/003305 patent/WO1999026141A1/en active IP Right Grant
- 1998-11-04 AT AT98951604T patent/ATE273536T1/de not_active IP Right Cessation
- 1998-11-04 EP EP98951604A patent/EP1031082B1/de not_active Expired - Lifetime
- 1998-11-04 US US09/529,367 patent/US6397305B1/en not_active Expired - Fee Related
- 1998-11-04 DE DE69825621T patent/DE69825621D1/de not_active Expired - Lifetime
- 1998-11-04 AU AU97557/98A patent/AU9755798A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
GB2331379A (en) | 1999-05-19 |
GB9724033D0 (en) | 1998-01-14 |
WO1999026141A1 (en) | 1999-05-27 |
ATE273536T1 (de) | 2004-08-15 |
IL135311A (en) | 2004-06-01 |
EP1031082B1 (de) | 2004-08-11 |
AU9755798A (en) | 1999-06-07 |
EP1031082A1 (de) | 2000-08-30 |
IL135311A0 (en) | 2001-05-20 |
US6397305B1 (en) | 2002-05-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |