FR2308164A1 - Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires - Google Patents
Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoiresInfo
- Publication number
- FR2308164A1 FR2308164A1 FR7512014A FR7512014A FR2308164A1 FR 2308164 A1 FR2308164 A1 FR 2308164A1 FR 7512014 A FR7512014 A FR 7512014A FR 7512014 A FR7512014 A FR 7512014A FR 2308164 A1 FR2308164 A1 FR 2308164A1
- Authority
- FR
- France
- Prior art keywords
- hierarchy
- data
- memories
- control
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0893—Caches characterised by their organisation or structure
- G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7512014A FR2308164A1 (fr) | 1975-04-17 | 1975-04-17 | Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7512014A FR2308164A1 (fr) | 1975-04-17 | 1975-04-17 | Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2308164A1 true FR2308164A1 (fr) | 1976-11-12 |
FR2308164B1 FR2308164B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1979-10-19 |
Family
ID=9154092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7512014A Granted FR2308164A1 (fr) | 1975-04-17 | 1975-04-17 | Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2308164A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2710477A1 (de) * | 1976-03-10 | 1977-09-15 | Cii Honeywell Bull | Anordnung zur kohaerenten leitung des informationsaustauschs zwischen zwei aneinanderstossenden niveaus einer speicherhierarchie |
EP0468804A3 (en) * | 1990-07-27 | 1995-02-15 | Fujitsu Ltd | Hierarchical memory control system |
-
1975
- 1975-04-17 FR FR7512014A patent/FR2308164A1/fr active Granted
Non-Patent Citations (1)
Title |
---|
NEANT * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2710477A1 (de) * | 1976-03-10 | 1977-09-15 | Cii Honeywell Bull | Anordnung zur kohaerenten leitung des informationsaustauschs zwischen zwei aneinanderstossenden niveaus einer speicherhierarchie |
EP0468804A3 (en) * | 1990-07-27 | 1995-02-15 | Fujitsu Ltd | Hierarchical memory control system |
Also Published As
Publication number | Publication date |
---|---|
FR2308164B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1979-10-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ES487814A1 (es) | Una disposicion mejorada de inscripcion de canal a memoria | |
KR840000838A (ko) | 멀티워어드 메모리 데이타 스토리지 및 어드레싱 기법및 장치 | |
GB1534189A (en) | Data processing apparatus | |
ES8503868A1 (es) | Una instalacion de control de almacenamiento intermedio en un procesador de datos | |
FR2433223B1 (fr) | Circuit de lecture/ecriture pour une memoire | |
DE69317148D1 (de) | Speicheranordnung mit redundanter Speicherplattenanordnung | |
KR870011615A (ko) | 부분 서입 제어장치 | |
GB1310467A (en) | Apparatus for exchanging information between a high-speed memory and a low-speed memory | |
JPS5530730A (en) | Data processor | |
FR2308164A1 (fr) | Procede et moyens pour une gestion coherente des informations dans une hierarchie de memoires | |
EP0201848A3 (en) | Information processing system with enhanced instruction execution and support control | |
JPS5481049A (en) | Data processing system | |
JPS5365631A (en) | Data processor | |
BE765390A (fr) | Systemes de lecture et d'inscription pour une memoire a tores magnetiques 2 1/2d | |
JPS57109055A (en) | Readout control system for microinstruction | |
SU890438A1 (ru) | Кольцевой регистр сдвига | |
JPS5577072A (en) | Buffer memory control system | |
GB8333984D0 (en) | Computer controlled systems | |
JPS5740790A (en) | Storage control system | |
JPS5710851A (en) | Status history memory device | |
JPS6459570A (en) | Image data rotation processor | |
JPS5797159A (en) | Data processing device | |
JPS57153355A (en) | Storage device control system | |
JPS5714972A (en) | Retrieving device of document and sketch file | |
JPS5729164A (en) | Computer system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name | ||
TP | Transmission of property |