FR2299700A1 - Memoire morte programmable effacable - Google Patents
Memoire morte programmable effacableInfo
- Publication number
- FR2299700A1 FR2299700A1 FR7539818A FR7539818A FR2299700A1 FR 2299700 A1 FR2299700 A1 FR 2299700A1 FR 7539818 A FR7539818 A FR 7539818A FR 7539818 A FR7539818 A FR 7539818A FR 2299700 A1 FR2299700 A1 FR 2299700A1
- Authority
- FR
- France
- Prior art keywords
- deadly
- erasable memory
- programmable erasable
- programmable
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002498 deadly effect Effects 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
- G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01714—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
- H03K19/09443—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
- H03K19/09445—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors with active depletion transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/003—Changing the DC level
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- Power Engineering (AREA)
- Read Only Memory (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Facsimile Heads (AREA)
- Electronic Switches (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/546,546 US3938108A (en) | 1975-02-03 | 1975-02-03 | Erasable programmable read-only memory |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2299700A1 true FR2299700A1 (fr) | 1976-08-27 |
Family
ID=24180904
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7539818A Pending FR2299700A1 (fr) | 1975-02-03 | 1975-12-26 | Memoire morte programmable effacable |
Country Status (5)
Country | Link |
---|---|
US (1) | US3938108A (fr) |
JP (1) | JPS568439B2 (fr) |
DE (1) | DE2601622C3 (fr) |
FR (1) | FR2299700A1 (fr) |
GB (3) | GB1523744A (fr) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2639555C2 (de) * | 1975-09-04 | 1985-07-04 | Plessey Overseas Ltd., Ilford, Essex | Elektrische integrierte Schaltung |
JPS592996B2 (ja) * | 1976-05-24 | 1984-01-21 | 株式会社日立製作所 | 半導体記憶回路 |
US4094012A (en) * | 1976-10-01 | 1978-06-06 | Intel Corporation | Electrically programmable MOS read-only memory with isolated decoders |
US4161039A (en) * | 1976-12-15 | 1979-07-10 | Siemens Aktiengesellschaft | N-Channel storage FET |
US4093875A (en) * | 1977-01-31 | 1978-06-06 | International Business Machines Corporation | Field effect transistor (FET) circuit utilizing substrate potential for turning off depletion mode devices |
DE2706155A1 (de) * | 1977-02-14 | 1978-08-17 | Siemens Ag | In integrierter technik hergestellter elektronischer speicher |
JPS544086A (en) * | 1977-06-10 | 1979-01-12 | Fujitsu Ltd | Memory circuit unit |
JPS6035756B2 (ja) * | 1977-12-27 | 1985-08-16 | 日本電気株式会社 | 論理回路 |
US4176289A (en) * | 1978-06-23 | 1979-11-27 | Electronic Memories & Magnetics Corporation | Driving circuit for integrated circuit semiconductor memory |
US4417162A (en) * | 1979-01-11 | 1983-11-22 | Bell Telephone Laboratories, Incorporated | Tri-state logic buffer circuit |
JPS5833638B2 (ja) * | 1979-09-21 | 1983-07-21 | 株式会社日立製作所 | メモリ装置 |
US4301518A (en) * | 1979-11-01 | 1981-11-17 | Texas Instruments Incorporated | Differential sensing of single ended memory array |
JPS5847793B2 (ja) * | 1979-11-12 | 1983-10-25 | 富士通株式会社 | 半導体記憶装置 |
JPS5915211B2 (ja) * | 1979-11-27 | 1984-04-07 | 富士通株式会社 | 発振回路 |
JPS5693363A (en) * | 1979-12-04 | 1981-07-28 | Fujitsu Ltd | Semiconductor memory |
US4342102A (en) * | 1980-06-18 | 1982-07-27 | Signetics Corporation | Semiconductor memory array |
US4396998A (en) * | 1980-08-27 | 1983-08-02 | Mobay Chemical Corporation | Thermally reprogrammable memory array and a thermally reprogrammable memory cell therefor |
JPS58139399A (ja) * | 1982-02-15 | 1983-08-18 | Hitachi Ltd | 半導体記憶装置 |
FR2528613B1 (fr) * | 1982-06-09 | 1991-09-20 | Hitachi Ltd | Memoire a semi-conducteurs |
US4580067A (en) * | 1982-12-28 | 1986-04-01 | Mostek Corporation | MOS dynamic load circuit for switching high voltages and adapted for use with high threshold transistors |
US4636664A (en) * | 1983-01-10 | 1987-01-13 | Ncr Corporation | Current sinking responsive MOS sense amplifier |
GB2138232A (en) * | 1983-03-17 | 1984-10-17 | Romox Inc | Reprogrammable cartridge memory |
JPH0666115B2 (ja) * | 1983-09-26 | 1994-08-24 | 株式会社東芝 | 半導体記憶装置 |
JPS63204598A (ja) * | 1987-02-20 | 1988-08-24 | Toshiba Corp | 半導体記憶装置のレフアレンス電位発生回路 |
EP0332274B1 (fr) * | 1988-03-09 | 1994-06-22 | Koninklijke Philips Electronics N.V. | EEPROM à mode d'effacement et d'écriture commandé par des données |
JPH0810728B2 (ja) * | 1990-02-01 | 1996-01-31 | 株式会社東芝 | 半導体記憶装置 |
US5122985A (en) * | 1990-04-16 | 1992-06-16 | Giovani Santin | Circuit and method for erasing eeprom memory arrays to prevent over-erased cells |
US5241494A (en) * | 1990-09-26 | 1993-08-31 | Information Storage Devices | Integrated circuit system for analog signal recording and playback |
US5126967A (en) * | 1990-09-26 | 1992-06-30 | Information Storage Devices, Inc. | Writable distributed non-volatile analog reference system and method for analog signal recording and playback |
US5220531A (en) * | 1991-01-02 | 1993-06-15 | Information Storage Devices, Inc. | Source follower storage cell and improved method and apparatus for iterative write for integrated circuit analog signal recording and playback |
US5777361A (en) * | 1996-06-03 | 1998-07-07 | Motorola, Inc. | Single gate nonvolatile memory cell and method for accessing the same |
US6731273B2 (en) * | 2000-06-27 | 2004-05-04 | Semiconductor Energy Laboratory Co., Ltd. | Level shifter |
JP4821358B2 (ja) * | 2006-02-15 | 2011-11-24 | ミツミ電機株式会社 | 信号出力回路及び半導体集積回路 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3641512A (en) * | 1970-04-06 | 1972-02-08 | Fairchild Camera Instr Co | Integrated mnos memory organization |
BE789500A (fr) * | 1971-09-30 | 1973-03-29 | Siemens Ag | Memoire a semiconducteurs avec elements de memorisation a un seul transistor |
US3728695A (en) * | 1971-10-06 | 1973-04-17 | Intel Corp | Random-access floating gate mos memory array |
US3747072A (en) * | 1972-07-19 | 1973-07-17 | Sperry Rand Corp | Integrated static mnos memory circuit |
US3846768A (en) * | 1972-12-29 | 1974-11-05 | Ibm | Fixed threshold variable threshold storage device for use in a semiconductor storage array |
JPS5536193B2 (fr) * | 1973-05-11 | 1980-09-19 | ||
US3898630A (en) * | 1973-10-11 | 1975-08-05 | Ibm | High voltage integrated driver circuit |
US3893085A (en) * | 1973-11-28 | 1975-07-01 | Ibm | Read mostly memory cell having bipolar and FAMOS transistor |
-
1975
- 1975-02-03 US US05/546,546 patent/US3938108A/en not_active Expired - Lifetime
- 1975-10-07 GB GB53730/76A patent/GB1523744A/en not_active Expired
- 1975-10-07 GB GB41079/75A patent/GB1523743A/en not_active Expired
- 1975-10-07 GB GB53731/76A patent/GB1523745A/en not_active Expired
- 1975-10-25 JP JP12879975A patent/JPS568439B2/ja not_active Expired
- 1975-12-26 FR FR7539818A patent/FR2299700A1/fr active Pending
-
1976
- 1976-01-17 DE DE2601622A patent/DE2601622C3/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
GB1523743A (en) | 1978-09-06 |
JPS5194729A (fr) | 1976-08-19 |
DE2601622A1 (de) | 1976-08-05 |
GB1523745A (en) | 1978-09-06 |
US3938108A (en) | 1976-02-10 |
DE2601622B2 (de) | 1978-07-20 |
GB1523744A (en) | 1978-09-06 |
JPS568439B2 (fr) | 1981-02-24 |
DE2601622C3 (de) | 1979-03-22 |
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