FR2284164A1 - Memoire a circuit integre - Google Patents

Memoire a circuit integre

Info

Publication number
FR2284164A1
FR2284164A1 FR7526938A FR7526938A FR2284164A1 FR 2284164 A1 FR2284164 A1 FR 2284164A1 FR 7526938 A FR7526938 A FR 7526938A FR 7526938 A FR7526938 A FR 7526938A FR 2284164 A1 FR2284164 A1 FR 2284164A1
Authority
FR
France
Prior art keywords
integrated circuit
circuit memory
memory
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7526938A
Other languages
English (en)
Other versions
FR2284164B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2284164A1 publication Critical patent/FR2284164A1/fr
Application granted granted Critical
Publication of FR2284164B1 publication Critical patent/FR2284164B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/10—SRAM devices comprising bipolar components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/096—Lateral transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/109—Memory devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/139—Schottky barrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Bipolar Transistors (AREA)
FR7526938A 1974-09-03 1975-09-02 Memoire a circuit integre Granted FR2284164A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US502675A US3909807A (en) 1974-09-03 1974-09-03 Integrated circuit memory cell

Publications (2)

Publication Number Publication Date
FR2284164A1 true FR2284164A1 (fr) 1976-04-02
FR2284164B1 FR2284164B1 (fr) 1978-04-07

Family

ID=23998865

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7526938A Granted FR2284164A1 (fr) 1974-09-03 1975-09-02 Memoire a circuit integre

Country Status (12)

Country Link
US (1) US3909807A (fr)
JP (1) JPS5827599B2 (fr)
BE (1) BE832840A (fr)
BR (1) BR7505602A (fr)
CA (1) CA1042101A (fr)
DE (1) DE2538631A1 (fr)
ES (1) ES440562A1 (fr)
FR (1) FR2284164A1 (fr)
GB (1) GB1516711A (fr)
IT (1) IT1042233B (fr)
NL (1) NL7510177A (fr)
SE (1) SE409256B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2482368A1 (fr) * 1980-05-12 1981-11-13 Thomson Csf Operateur logique a injection par le substrat et son procede de fabrication

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4021786A (en) * 1975-10-30 1977-05-03 Fairchild Camera And Instrument Corporation Memory cell circuit and semiconductor structure therefore
JPS597246B2 (ja) * 1975-12-01 1984-02-17 株式会社東芝 ハンドウタイロンリカイロ
DE2557911C2 (de) * 1975-12-22 1982-11-04 Deutsche Itt Industries Gmbh, 7800 Freiburg Verfahren zum Herstellen einer monolithisch integrierten Schaltung
US4137109A (en) * 1976-04-12 1979-01-30 Texas Instruments Incorporated Selective diffusion and etching method for isolation of integrated logic circuit
GB1580977A (en) * 1976-05-31 1980-12-10 Siemens Ag Schottkytransisitor-logic arrangements
NL7606193A (nl) * 1976-06-09 1977-12-13 Philips Nv Geintegreerde schakeling.
GB1565146A (en) * 1976-08-16 1980-04-16 Fairchild Camera Instr Co Random access momory cells
US4087900A (en) * 1976-10-18 1978-05-09 Bell Telephone Laboratories, Incorporated Fabrication of semiconductor integrated circuit structure including injection logic configuration compatible with complementary bipolar transistors utilizing simultaneous formation of device regions
US4101349A (en) * 1976-10-29 1978-07-18 Hughes Aircraft Company Integrated injection logic structure fabricated by outdiffusion and epitaxial deposition
US4132573A (en) * 1977-02-08 1979-01-02 Murata Manufacturing Co., Ltd. Method of manufacturing a monolithic integrated circuit utilizing epitaxial deposition and simultaneous outdiffusion
DE2739283A1 (de) * 1977-08-31 1979-03-15 Siemens Ag Integrierbare halbleiterspeicherzelle
US4112511A (en) * 1977-09-13 1978-09-05 Signetics Corporation Four transistor static bipolar memory cell using merged transistors
FR2414778A1 (fr) * 1978-01-13 1979-08-10 Thomson Csf Element de memoire statique a acces aleatoire
US4240846A (en) * 1978-06-27 1980-12-23 Harris Corporation Method of fabricating up diffused substrate FED logic utilizing a two-step epitaxial deposition
JPS5829628B2 (ja) * 1979-11-22 1983-06-23 富士通株式会社 半導体記憶装置
US4400712A (en) * 1981-02-13 1983-08-23 Bell Telephone Laboratories, Incorporated Static bipolar random access memory
US4387445A (en) * 1981-02-24 1983-06-07 International Business Machines Corporation Random access memory cell
JPS57167675A (en) * 1981-04-08 1982-10-15 Nec Corp Semiconductor device
US4543595A (en) * 1982-05-20 1985-09-24 Fairchild Camera And Instrument Corporation Bipolar memory cell
US4635230A (en) * 1984-12-18 1987-01-06 Advanced Micro Devices, Inc. Emitter coupled logic bipolar memory cell
US4654824A (en) * 1984-12-18 1987-03-31 Advanced Micro Devices, Inc. Emitter coupled logic bipolar memory cell
US4669180A (en) * 1984-12-18 1987-06-02 Advanced Micro Devices, Inc. Method of forming emitter coupled logic bipolar memory cell using polysilicon Schottky diodes for coupling
JPH03178166A (ja) * 1989-12-07 1991-08-02 Matsushita Electron Corp バイポーラ型半導体記憶装置
US5276638A (en) * 1991-07-31 1994-01-04 International Business Machines Corporation Bipolar memory cell with isolated PNP load

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3575741A (en) * 1968-02-05 1971-04-20 Bell Telephone Labor Inc Method for producing semiconductor integrated circuit device and product produced thereby
US3564300A (en) * 1968-03-06 1971-02-16 Ibm Pulse power data storage cell
US3537078A (en) * 1968-07-11 1970-10-27 Ibm Memory cell with a non-linear collector load
US3655457A (en) * 1968-08-06 1972-04-11 Ibm Method of making or modifying a pn-junction by ion implantation
US3815106A (en) * 1972-05-11 1974-06-04 S Wiedmann Flip-flop memory cell arrangement
US3643230A (en) * 1970-09-03 1972-02-15 Bell Telephone Labor Inc Serial storage and transfer apparatus employing charge-storage diodes in interstage coupling circuitry
JPS5619035B2 (fr) * 1972-06-20 1981-05-02

Non-Patent Citations (10)

* Cited by examiner, † Cited by third party
Title
(CONFERENCE US "IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE", 14 FEVRIER 1973 *
(REVUE US "IBM TECHNICAL DISCLOSURE BULLETIN", VOLUME 14, NO. 6, NOVEMBRE 1971, PAGE 1720 *
*REVUE US "IEEE JOURNAL OF SOLID-STATE CIRCUITS", VOLUME SC4, NO. 5, OCTOBRE 1969, PAGES 280 A 284 *
*REVUE US "IEEE JOURNAL OF SOLID-STATE CIRCUITS", VOLUME SC5, NO. 5, PAGES 186-191 *
ARTICLE "MEMORY CELL WITH LOW STANDBY POWER" PAR WIEDMANN ) *
ARTICLE "MEMORY USING DIODE-COUPLED BIPOLAR TRANSISTOR CELLS" PAR LYNES ET HODGES ) *
ARTICLE: "A LOW POWER MEMORY CELL FOR MAIN FRAME MEMORIES" PAR DUNN ET AUTRES ) *
ARTICLE: "LOW-POWER BIPOLAR TRANSISTOR MEMORY CELLS" PAR HODGES ET AUTRES *
PAGES 66 ET 67 *
REVUE US "ELECTRONICS", VOLUME 47, NO. 5, MARS 1974, PAGES 130 A 133 ARTICLE: "PINCH LOAD RESISTORS SHRINK BIPOLAR MEMORY CELLS" PAR WIEDMANN *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2482368A1 (fr) * 1980-05-12 1981-11-13 Thomson Csf Operateur logique a injection par le substrat et son procede de fabrication

Also Published As

Publication number Publication date
GB1516711A (en) 1978-07-05
FR2284164B1 (fr) 1978-04-07
IT1042233B (it) 1980-01-30
SE409256B (sv) 1979-08-06
JPS5152247A (fr) 1976-05-08
CA1042101A (fr) 1978-11-07
JPS5827599B2 (ja) 1983-06-10
BE832840A (fr) 1975-12-16
DE2538631A1 (de) 1976-03-11
US3909807A (en) 1975-09-30
NL7510177A (nl) 1976-03-05
SE7509475L (sv) 1976-03-04
BR7505602A (pt) 1976-08-03
ES440562A1 (es) 1977-03-01

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Legal Events

Date Code Title Description
ST Notification of lapse