FI93284B - Bitserieintegratorkrets - Google Patents
Bitserieintegratorkrets Download PDFInfo
- Publication number
- FI93284B FI93284B FI883816A FI883816A FI93284B FI 93284 B FI93284 B FI 93284B FI 883816 A FI883816 A FI 883816A FI 883816 A FI883816 A FI 883816A FI 93284 B FI93284 B FI 93284B
- Authority
- FI
- Finland
- Prior art keywords
- bit
- input terminal
- signal
- series
- clock
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/504—Adding; Subtracting in bit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other
- G06F7/5045—Adding; Subtracting in bit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other for multiple operands
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49942—Significance control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49994—Sign extension
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Dc Digital Transmission (AREA)
- Manipulation Of Pulses (AREA)
Claims (4)
1. Bitserieintegratorkrets för integrering av en bitseriesignal, vilken krets omfattar: 5 en signalingängsterminal (IN) för införsel av en bitseriesignal; kombineringsmedel (12) för kombinering av bit-seriesignaler, vilka medel har en tili signalingängstermi-nalen kopplad första ingängsterminal, en andra ingängs-10 terminal och en utgängsterminal; ett första serieskiftsregister (16) med R steg, dä R är ett heltal, en tili kombineringsmedlens (12) utgängs-terminal kopplad ingängsterminal, en utgängsterminal och en klockingängsterminal; kännetecknad av 15 ett andra serieskiftsregister (22) med N steg, dä N är ett heltal, en tili det första serieskiftsregistrets (16) utgängsterminal kopplad ingängsterminal, en tili kombineringsmedlens andra ingängsterminal kopplad utgängsterminal och en klockingängsterminal; 20 medel (23, 24) med vilka en klockpulsskur förs tili det första (16) och andra (22) serieskiftsregistrets klockpulsingäng, dä skurens pulser förekommer synkront med bitseriesignalens bitar och dä antalet pulser i skuren är minst R + N per sampelperiod; och - - 25 transparent läs-medel (18) kopplade tili det första seriebitregistrets (16) utgängsterminal, för att under en första förutbestämd skurdel förmedla sampelbitar och för att läsa och avge en förutbestämd sampelbit under den del av varje sampelperiod som följer den förutbestämda delen. ..30
2. Bitserieintegrator enligt patentkrav 1, k ä n - • · netecknad av att medlen (23, 24) som avger en klockpulsskur avger en pulsskur, där antalet pulser är lika stort som ett heltal som beskriver antalet bitför-dröjningsperioder mellan kombineringsmedlens (12) ingängs-35 terminal och det andra serieskiftsregistrets (22) utgängsterminal . II 13 93284
3. Bitserieintegrator enligt patentkrav 2, k ä n -netecknad av att kombineringsmedlen (12) mellan sinä in- och utgängsterminaler har en processeringsför-dröjning pä en bitperiod och att medlen som avger en 5 klockpulsskur avger en pulsskur där antalet pulser är R + N + 1.
4. Kombination enligt patentkrav 3, dessutom kännetecknad av bitseriekombineringsmedel (30) med en första in-10 gängsterminal kopplad till utgängsterminalen för de trans-parenta bitserieläsmedlen (18), en till kombineringsmed-lens (12) första ingängstreminal kopplad utgängsterminal, ur vilken en processerad signal erhälls, och en andra in-gängsterminal; och 15 medel (AIN) med vilka en bitseriesignal införs i bitseriekombineringsmedlens (30) andra ingängsterminal. <· · _ « · • · • · -
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/088,340 US4841466A (en) | 1987-08-24 | 1987-08-24 | Bit-serial integrator circuitry |
US8834087 | 1987-08-24 |
Publications (4)
Publication Number | Publication Date |
---|---|
FI883816A0 FI883816A0 (sv) | 1988-08-17 |
FI883816A FI883816A (sv) | 1989-02-25 |
FI93284B true FI93284B (sv) | 1994-11-30 |
FI93284C FI93284C (sv) | 1995-03-10 |
Family
ID=22210796
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FI883816A FI93284C (sv) | 1987-08-24 | 1988-08-17 | Bitserieintegratorkrets |
Country Status (8)
Country | Link |
---|---|
US (1) | US4841466A (sv) |
EP (1) | EP0304841B1 (sv) |
JP (1) | JPS6470828A (sv) |
KR (1) | KR0128505B1 (sv) |
CN (1) | CN1014936B (sv) |
CA (1) | CA1290458C (sv) |
DE (1) | DE3853655T2 (sv) |
FI (1) | FI93284C (sv) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5313469A (en) * | 1993-06-11 | 1994-05-17 | Northern Telecom Limited | Self-testable digital integrator |
EP1001567A1 (en) | 1998-11-13 | 2000-05-17 | TELEFONAKTIEBOLAGET LM ERICSSON (publ) | Combiner |
EP1011281A3 (en) | 1998-12-18 | 2000-07-05 | TELEFONAKTIEBOLAGET L M ERICSSON (publ) | Flexible CDMA combiner |
WO2007042850A1 (en) | 2005-10-12 | 2007-04-19 | Acco | Insulated gate field-effet transistor having a dummy gate |
TWI444021B (zh) * | 2007-09-17 | 2014-07-01 | Htc Corp | 解譯串列傳輸訊號之方法 |
US7808415B1 (en) * | 2009-03-25 | 2010-10-05 | Acco Semiconductor, Inc. | Sigma-delta modulator including truncation and applications thereof |
TWI426397B (zh) * | 2009-06-29 | 2014-02-11 | Lee Ming Inst Technology | Can be used in a signal interval in the unequal spacing of the sample, the signal in this interval between a single and multiple numerical integration device. |
US8532584B2 (en) | 2010-04-30 | 2013-09-10 | Acco Semiconductor, Inc. | RF switches |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3757261A (en) * | 1972-02-11 | 1973-09-04 | Collins Radio Co | Integration and filtration circuit apparatus |
US3919535A (en) * | 1974-08-21 | 1975-11-11 | Singer Co | Multiple addend adder and multiplier |
US4023019A (en) * | 1974-09-23 | 1977-05-10 | The United States Of America As Represented By The Secretary Of The Navy | Automatic scaled digital integrator |
SU739566A1 (ru) * | 1978-01-04 | 1980-06-05 | Предприятие П/Я А-3890 | Цифровой интегратор |
US4246642A (en) * | 1979-01-22 | 1981-01-20 | Ricoh Company, Ltd. | Leaky digital integrator |
JPH105347A (ja) * | 1996-06-21 | 1998-01-13 | Toyo Sangyo Kk | 低周波治療器 |
-
1987
- 1987-08-24 US US07/088,340 patent/US4841466A/en not_active Expired - Lifetime
-
1988
- 1988-07-26 CA CA000573061A patent/CA1290458C/en not_active Expired - Fee Related
- 1988-08-17 FI FI883816A patent/FI93284C/sv not_active IP Right Cessation
- 1988-08-22 EP EP88113616A patent/EP0304841B1/en not_active Expired - Lifetime
- 1988-08-22 DE DE3853655T patent/DE3853655T2/de not_active Expired - Fee Related
- 1988-08-23 KR KR1019880010680A patent/KR0128505B1/ko not_active IP Right Cessation
- 1988-08-23 JP JP63207497A patent/JPS6470828A/ja active Granted
- 1988-08-24 CN CN88106276A patent/CN1014936B/zh not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0304841A3 (en) | 1991-03-20 |
FI883816A0 (sv) | 1988-08-17 |
FI93284C (sv) | 1995-03-10 |
KR0128505B1 (ko) | 1998-04-15 |
CN1014936B (zh) | 1991-11-27 |
FI883816A (sv) | 1989-02-25 |
JPH0421218B2 (sv) | 1992-04-09 |
JPS6470828A (en) | 1989-03-16 |
EP0304841B1 (en) | 1995-04-26 |
DE3853655T2 (de) | 1995-10-19 |
EP0304841A2 (en) | 1989-03-01 |
CA1290458C (en) | 1991-10-08 |
DE3853655D1 (de) | 1995-06-01 |
KR890004233A (ko) | 1989-04-20 |
US4841466A (en) | 1989-06-20 |
CN1031768A (zh) | 1989-03-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
BB | Publication of examined application | ||
MM | Patent lapsed | ||
MM | Patent lapsed |
Owner name: RCA LICENSING CORPORATION |