FI891785A - Mikrodatorsystem inkluderande ett mellanminneundersystem som anvaender infoerda skrivcykler. - Google Patents

Mikrodatorsystem inkluderande ett mellanminneundersystem som anvaender infoerda skrivcykler. Download PDF

Info

Publication number
FI891785A
FI891785A FI891785A FI891785A FI891785A FI 891785 A FI891785 A FI 891785A FI 891785 A FI891785 A FI 891785A FI 891785 A FI891785 A FI 891785A FI 891785 A FI891785 A FI 891785A
Authority
FI
Finland
Prior art keywords
data
microprocessor
unit
bus
cache controller
Prior art date
Application number
FI891785A
Other languages
English (en)
Other versions
FI891785A0 (fi
Inventor
Ralph Murray Begun
Patrick Maurice Bland
Mark Edward Dean
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of FI891785A0 publication Critical patent/FI891785A0/fi
Publication of FI891785A publication Critical patent/FI891785A/fi

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Microcomputers (AREA)
  • Hardware Redundancy (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Peptides Or Proteins (AREA)
  • Medicines Containing Material From Animals Or Micro-Organisms (AREA)
  • Preparation Of Compounds By Using Micro-Organisms (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
FI891785A 1988-05-26 1989-04-14 Mikrodatorsystem inkluderande ett mellanminneundersystem som anvaender infoerda skrivcykler. FI891785A (fi)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US19889388A 1988-05-26 1988-05-26

Publications (2)

Publication Number Publication Date
FI891785A0 FI891785A0 (fi) 1989-04-14
FI891785A true FI891785A (fi) 1989-11-27

Family

ID=22735311

Family Applications (1)

Application Number Title Priority Date Filing Date
FI891785A FI891785A (fi) 1988-05-26 1989-04-14 Mikrodatorsystem inkluderande ett mellanminneundersystem som anvaender infoerda skrivcykler.

Country Status (24)

Country Link
EP (1) EP0343768B1 (fi)
JP (1) JPH0218640A (fi)
KR (1) KR930001585B1 (fi)
CN (1) CN1019153B (fi)
AT (1) ATE125051T1 (fi)
AU (1) AU611288B2 (fi)
BE (1) BE1002652A4 (fi)
BR (1) BR8902381A (fi)
CA (1) CA1314330C (fi)
DE (2) DE68923402T2 (fi)
DK (1) DK189789A (fi)
ES (1) ES2075044T3 (fi)
FI (1) FI891785A (fi)
FR (1) FR2632095A1 (fi)
GB (1) GB2219107A (fi)
HK (1) HK23796A (fi)
IT (1) IT1230190B (fi)
MX (1) MX171667B (fi)
MY (1) MY108557A (fi)
NL (1) NL8901255A (fi)
NO (1) NO174984C (fi)
NZ (1) NZ228784A (fi)
PT (1) PT90632B (fi)
SE (1) SE8901305L (fi)

Also Published As

Publication number Publication date
BR8902381A (pt) 1990-01-16
FI891785A0 (fi) 1989-04-14
DE68923402D1 (de) 1995-08-17
SE8901305D0 (sv) 1989-04-11
DE3909909C2 (fi) 1990-05-31
MX171667B (es) 1993-11-10
DE3909909A1 (de) 1989-11-30
AU611288B2 (en) 1991-06-06
PT90632B (pt) 1995-12-29
EP0343768A2 (en) 1989-11-29
HK23796A (en) 1996-02-16
GB8904918D0 (en) 1989-04-12
DK189789D0 (da) 1989-04-19
KR890017614A (ko) 1989-12-16
EP0343768B1 (en) 1995-07-12
ATE125051T1 (de) 1995-07-15
KR930001585B1 (ko) 1993-03-05
NL8901255A (nl) 1989-12-18
NZ228784A (en) 1991-04-26
CA1314330C (en) 1993-03-09
CN1019153B (zh) 1992-11-18
JPH0218640A (ja) 1990-01-22
ES2075044T3 (es) 1995-10-01
PT90632A (pt) 1989-11-30
FR2632095A1 (fr) 1989-12-01
GB2219107A (en) 1989-11-29
IT1230190B (it) 1991-10-18
BE1002652A4 (fr) 1991-04-23
EP0343768A3 (en) 1991-03-20
NO174984B (no) 1994-05-02
DE68923402T2 (de) 1996-03-07
IT8920625A0 (it) 1989-05-24
NO891582D0 (no) 1989-04-18
MY108557A (en) 1996-10-31
NO891582L (no) 1989-11-27
SE8901305L (sv) 1989-11-27
DK189789A (da) 1989-11-27
AU3409889A (en) 1989-11-30
NO174984C (no) 1994-08-10
CN1040875A (zh) 1990-03-28

Similar Documents

Publication Publication Date Title
KR930016886A (ko) 컴퓨터 시스템 및 데이타 저장방법
GB1366001A (en) Virtual storage system
GB1449229A (en) Data processing system and method therefor
MX170835B (es) Circuito habilitado de escritura cache retardada para un sistema de microcomputadora de doble bus con un 80386 y 82385
ES2144488T3 (es) Sistema de tratamiento de datos que emplea coherencia de antememoria empleando un protocolo de escrutinio.
FI891785A (fi) Mikrodatorsystem inkluderande ett mellanminneundersystem som anvaender infoerda skrivcykler.
KR970059914A (ko) 플래시 메모리 시스템
KR920010977B1 (ko) 개선된 성능의 메모리 버스 아키텍쳐(memory bus architecture)
KR890002141Y1 (ko) 16비트 dma콘트롤러의 32비트 데이타 신호 전송장치
KR900006855A (ko) 프로세스가 있는 보오드의 상태 추적장치
KR950012514B1 (ko) 이중포트 지원 및 vme인터페이스를 위한 버퍼램제어기
JP2574821B2 (ja) ダイレクトメモリアクセス・コントローラ
JPS5564693A (en) Buffer memory unit
JPS57133598A (en) System for write control of erroneous operation address
KR940004446A (ko) 버스 인터페이스 장치
JPS6444535A (en) Data buffer device
KR950033853A (ko) 고속정보전송이 가능한 인터페이스회로를 갖는 컴퓨터시스템
JPH02123450A (ja) 情報処理システム
JPH0554658A (ja) 記憶装置
JPS6455266A (en) External character font register data recorder
JPS60245013A (ja) メモリ初期化回路
KR890010724A (ko) 마이크로 프로세서간의 억세스 중재 제어 시스템
JPS6482164A (en) Communication system
KR930022202A (ko) 피엘씨의 입/출력카드 체크장치
JPS6428736A (en) Data error processing system for processing unit of common bus system

Legal Events

Date Code Title Description
FD Application lapsed
FD Application lapsed

Owner name: INTERNATIONAL BUSINESS MACHINES CORPORATION