FI86943B - Tryckkopplingsplaot foer montering av elektroniska delar och foerfaranden foer tillverkning av den. - Google Patents

Tryckkopplingsplaot foer montering av elektroniska delar och foerfaranden foer tillverkning av den. Download PDF

Info

Publication number
FI86943B
FI86943B FI852798A FI852798A FI86943B FI 86943 B FI86943 B FI 86943B FI 852798 A FI852798 A FI 852798A FI 852798 A FI852798 A FI 852798A FI 86943 B FI86943 B FI 86943B
Authority
FI
Finland
Prior art keywords
plate
metal plate
opening
recess
circuit board
Prior art date
Application number
FI852798A
Other languages
English (en)
Finnish (fi)
Other versions
FI86943C (sv
FI852798A0 (fi
FI852798L (fi
Inventor
Mabuchi Katsumi
Komura Toshimi
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Publication of FI852798A0 publication Critical patent/FI852798A0/fi
Publication of FI852798L publication Critical patent/FI852798L/fi
Application granted granted Critical
Publication of FI86943B publication Critical patent/FI86943B/fi
Publication of FI86943C publication Critical patent/FI86943C/sv

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0204Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/13Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/021Components thermally connected to metal substrates or heat-sinks by insert mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1532Connection portion the connection portion being formed on the die mounting surface of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09845Stepped hole, via, edge, bump or conductor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981Metallised walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10416Metallic blocks or heatsinks completely inserted in a PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/049Wire bonding
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/901Printed circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1062Prior to assembly
    • Y10T156/1064Partial cutting [e.g., grooving or incising]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/23Sheet including cover or casing
    • Y10T428/239Complete cover or casing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24273Structurally defined web or sheet [e.g., overall dimension, etc.] including aperture
    • Y10T428/24322Composite web or sheet
    • Y10T428/24331Composite web or sheet including nonapertured component
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Casings For Electric Apparatus (AREA)

Claims (7)

1. Mönsterkort för montering av elektroniska komponenter, vilket kort omfattar ett plastmaterial (1) med ett genom-gäende urtag (3) i det omräde där elektroniska komponenter skall monteras, en metallplatta (5) sammanfogad med kortets baksida genom ett vidhäftande skikt (7), ätminstone pk den yta som omger urtagets mynning, varvid urtagets (3) mynning tillsluts av metallplattan, kännetecknat av, att en obruten täckande hinna (11) pläteras pä urtagets innervägg, den sidoyta av det vidhäftande skiktet (7) som är vänd mot urtaget (3) och den yta av metallplattan (5) som bildar urtagets botten och tillsluter urtagets mynning pk baksidan av kortet, samt av att en obruten täckande hinna (9) pläteras ätminstone pk den yta pä baksidan av kortet som omger den yta där metallplattan sammanfogats, det vidhäftande skiktets (7) yttre periferiytä samt metallplattans (5) laterala sida respektive undersida.
2. Kort enligt patentkravet 1, kännetecknat av, att ytan som omger urtagets mynning pä kortet har en försänkning sk utformad att ett trappstegsformigt parti (13) utgör urtagets botten, varvid metallplattan (5) genom det vidhäftande skiktet (7) sammanfogats med det trappstegsformade parti (13) som utformas av försänkningen.
3. Kort enligt patentkravet 2, kännetecknat av, att ett spärformigt mellanrum (12) utbildats mellan försänkningens inre periferiytä och metallplattans (5) motstäende yttre periferiytä.
4. Kort enligt patentkravet 3, kännetecknat av, att metallplattan (5) är belägen pä det trappstegsformiga partiet (13) av försänkningen sä att metallplattans yttre perife-riyta och försänkningens inre periferiytä anligger mot varandra i ett antal sektioner, varigenom det spärformiga mellanrummet fär en förutbestämd bredd. 14 86943
5. Förfarande för framställning av ett mönsterkort för montering av elektroniska komponenter, kännetecknat av, att ett genomgäende urtag utformas i det omräde av mönster-kortet av plastmaterial där elektroniska komponenter skall monteras, att metallplattan sammanfogas med ytan som omger urtagets mynning pä baksidan av kortet genom ett vid-häftande skikt, att kortets utsida pläteras omfattande metallplattan, urtagets innervägg, det vidhäftande skiktets sidoyta som är vänd mot urtaget och det vidhäftande skiktets yttre periferiyta samt att en krets utformas pä vanligt sätt pä kortet som framställts pä ovan nämnda sätt.
6. Förfarande för framställning av ett mönsterkort, kännetecknat av, att en försänkning utformas i det bestämda om-räde pä baksidan av mönsterkortet av plastmaterial där elektroniska komponenter skall monteras, att metallplattan sammanfogas med försänkningens botten genom ett vidhäftande skikt, att ett urtag utformas i det bestämda omrädet pä kortets framsidä sä att urtaget ätminstone sträcker sig tili metallplattan, att kortets utsida pläteras omfattande metallplattan, urtagets innervägg, det vidhäftande skiktets sidoyta som är vänd mot urtaget och det vidhäftande skiktets yttre periferiyta samt att en krets utformas pä vanligt sätt pä kortet som framställts pä ovan nämnda sätt.
7. Förfarande enligt patentkravet 6, kännetecknat av, att metallplattan sammanbinds med försänkningens botten pä sä sätt att ett försänkt spär med en förutbestämd bredd bildas raellan metallplattans yttre periferiyta och försänkningens inre periferiyta. 1 li Förfarande enligt patentkravet 7, kännetecknat av, att metallplattan fästes genom att den placeras pä det trapp-stegsformiga partiet av försänkningen sä att försänkningens inre periferiyta och metallplattans motstäende yttre periferiyta anligger mot varandra i ett antal sektioner, vari-genom det försänkta späret fär en förutbestämd bredd.
FI852798A 1983-11-29 1985-07-17 Tryckkopplingsplåt för montering av elektroniska delar och förfaranden för tillverkning av den FI86943C (sv)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP58225237A JPS60116191A (ja) 1983-11-29 1983-11-29 電子部品搭載用基板の製造方法
JP22523783 1983-11-29
PCT/JP1984/000565 WO1985002515A1 (en) 1983-11-29 1984-11-27 Printed-circuit board for mounting electronic element and method of manufacture thereof
JP8400565 1984-11-27

Publications (4)

Publication Number Publication Date
FI852798A0 FI852798A0 (fi) 1985-07-17
FI852798L FI852798L (fi) 1985-07-17
FI86943B true FI86943B (fi) 1992-07-15
FI86943C FI86943C (sv) 1992-10-26

Family

ID=16826139

Family Applications (1)

Application Number Title Priority Date Filing Date
FI852798A FI86943C (sv) 1983-11-29 1985-07-17 Tryckkopplingsplåt för montering av elektroniska delar och förfaranden för tillverkning av den

Country Status (7)

Country Link
US (2) US4737395A (sv)
EP (1) EP0197148B1 (sv)
JP (1) JPS60116191A (sv)
DE (1) DE3482545D1 (sv)
FI (1) FI86943C (sv)
SG (1) SG4191G (sv)
WO (1) WO1985002515A1 (sv)

Families Citing this family (58)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0259724B1 (de) * 1986-09-12 1990-11-22 Siemens Aktiengesellschaft Leiterplatte
US4993148A (en) * 1987-05-19 1991-02-19 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a circuit board
JPH0263141A (ja) * 1989-04-05 1990-03-02 Ibiden Co Ltd 電子部品搭載用基板の製造方法
US5041943A (en) * 1989-11-06 1991-08-20 Allied-Signal Inc. Hermetically sealed printed circuit board
JP2813682B2 (ja) * 1989-11-09 1998-10-22 イビデン株式会社 電子部品搭載用基板
DE3939794A1 (de) * 1989-12-01 1991-06-06 Semikron Elektronik Gmbh Traegerplatte fuer halbleiter-baueinheiten
JPH045844A (ja) * 1990-04-23 1992-01-09 Nippon Mektron Ltd Ic搭載用多層回路基板及びその製造法
US5227338A (en) * 1990-04-30 1993-07-13 International Business Machines Corporation Three-dimensional memory card structure with internal direct chip attachment
US5235211A (en) * 1990-06-22 1993-08-10 Digital Equipment Corporation Semiconductor package having wraparound metallization
US5287247A (en) * 1990-09-21 1994-02-15 Lsi Logic Corporation Computer system module assembly
US5141455A (en) * 1991-04-08 1992-08-25 Molex Incorporated Mounting of electronic components on substrates
US5196251A (en) * 1991-04-30 1993-03-23 International Business Machines Corporation Ceramic substrate having a protective coating thereon and a method for protecting a ceramic substrate
US5210941A (en) * 1991-07-19 1993-05-18 Poly Circuits, Inc. Method for making circuit board having a metal support
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
US5261989A (en) * 1992-01-22 1993-11-16 Intel Corporation Straddle mounting an electrical conductor to a printed circuit board
JPH06120374A (ja) * 1992-03-31 1994-04-28 Amkor Electron Inc 半導体パッケージ構造、半導体パッケージ方法及び半導体パッケージ用放熱板
US5285352A (en) * 1992-07-15 1994-02-08 Motorola, Inc. Pad array semiconductor device with thermal conductor and process for making the same
US5583377A (en) * 1992-07-15 1996-12-10 Motorola, Inc. Pad array semiconductor device having a heat sink with die receiving cavity
JP2819523B2 (ja) * 1992-10-09 1998-10-30 インターナショナル・ビジネス・マシーンズ・コーポレイション 印刷配線板及びその製造方法
US5479319A (en) * 1992-12-30 1995-12-26 Interconnect Systems, Inc. Multi-level assemblies for interconnecting integrated circuits
US6262477B1 (en) 1993-03-19 2001-07-17 Advanced Interconnect Technologies Ball grid array electronic package
US5357672A (en) * 1993-08-13 1994-10-25 Lsi Logic Corporation Method and system for fabricating IC packages from laminated boards and heat spreader
US5419800A (en) * 1994-01-27 1995-05-30 The United States Of America As Represented By The Secretary Of The Navy Split gasket attachment strip
US5701034A (en) * 1994-05-03 1997-12-23 Amkor Electronics, Inc. Packaged semiconductor die including heat sink with locking feature
US6200407B1 (en) * 1994-08-18 2001-03-13 Rockwell Technologies, Llc Method of making a multilayer circuit board having a window exposing an enhanced conductive layer for use as an insulated mounting area
US6465743B1 (en) * 1994-12-05 2002-10-15 Motorola, Inc. Multi-strand substrate for ball-grid array assemblies and method
US5798909A (en) * 1995-02-15 1998-08-25 International Business Machines Corporation Single-tiered organic chip carriers for wire bond-type chips
JP2701802B2 (ja) * 1995-07-17 1998-01-21 日本電気株式会社 ベアチップ実装用プリント基板
US5930117A (en) * 1996-05-07 1999-07-27 Sheldahl, Inc. Heat sink structure comprising a microarray of thermal metal heat channels or vias in a polymeric or film layer
US5776798A (en) * 1996-09-04 1998-07-07 Motorola, Inc. Semiconductor package and method thereof
US5898128A (en) * 1996-09-11 1999-04-27 Motorola, Inc. Electronic component
US6078101A (en) * 1996-12-04 2000-06-20 Samsung Electronics Co., Ltd. High-power microwave-frequency hybrid integrated circuit
US5953594A (en) * 1997-03-20 1999-09-14 International Business Machines Corporation Method of making a circuitized substrate for chip carrier structure
US6160714A (en) 1997-12-31 2000-12-12 Elpac (Usa), Inc. Molded electronic package and method of preparation
JP2004506309A (ja) 1997-12-31 2004-02-26 エルパック(ユーエスエー)、インコーポレイテッド モールドされた電子パッケージ、製作方法およびシールディング方法
US6110650A (en) 1998-03-17 2000-08-29 International Business Machines Corporation Method of making a circuitized substrate
AU2008200818C1 (en) * 1998-08-19 2014-02-13 The Trustees Of Princeton University Organic photosensitive optoelectronic device
US6207354B1 (en) 1999-04-07 2001-03-27 International Business Machines Coporation Method of making an organic chip carrier package
KR100488412B1 (ko) * 2001-06-13 2005-05-11 가부시키가이샤 덴소 내장된 전기소자를 갖는 인쇄 배선 기판 및 그 제조 방법
US20050231922A1 (en) * 2004-04-16 2005-10-20 Jung-Chien Chang Functional printed circuit board module with an embedded chip
JP3914239B2 (ja) * 2005-03-15 2007-05-16 新光電気工業株式会社 配線基板および配線基板の製造方法
JP4526983B2 (ja) * 2005-03-15 2010-08-18 新光電気工業株式会社 配線基板の製造方法
CN1838868A (zh) * 2005-03-25 2006-09-27 华为技术有限公司 一种印制电路板组件及其加工方法
CN100490605C (zh) * 2005-11-11 2009-05-20 鸿富锦精密工业(深圳)有限公司 印刷电路板
JP2010073767A (ja) * 2008-09-17 2010-04-02 Jtekt Corp 多層回路基板
CN103250471B (zh) * 2010-12-08 2017-01-18 Fci公司 印刷电路板组件及用于制造该印刷电路板组件的方法
US9763317B2 (en) * 2013-03-14 2017-09-12 Cisco Technology, Inc. Method and apparatus for providing a ground and a heat transfer interface on a printed circuit board
FR3007237B1 (fr) * 2013-06-12 2015-05-22 Thales Sa Circuit imprime a structure multicouche a faibles pertes dielectriques et refroidi
US9195929B2 (en) * 2013-08-05 2015-11-24 A-Men Technology Corporation Chip card assembling structure and method thereof
US9917372B2 (en) 2014-06-13 2018-03-13 Nxp Usa, Inc. Integrated circuit package with radio frequency coupling arrangement
US10103447B2 (en) 2014-06-13 2018-10-16 Nxp Usa, Inc. Integrated circuit package with radio frequency coupling structure
US9887449B2 (en) * 2014-08-29 2018-02-06 Nxp Usa, Inc. Radio frequency coupling structure and a method of manufacturing thereof
US10225925B2 (en) * 2014-08-29 2019-03-05 Nxp Usa, Inc. Radio frequency coupling and transition structure
US11057984B2 (en) * 2017-11-30 2021-07-06 Ii-Vi Delaware, Inc. High-speed hybrid circuit
US11558957B2 (en) * 2020-06-12 2023-01-17 Raytheon Company Shape memory thermal capacitor and methods for same
CN112004318B (zh) * 2020-08-14 2022-02-18 无锡先仁智芯微电子技术有限公司 一种封装结构及其制作方法
CN114615788A (zh) * 2020-12-08 2022-06-10 宏恒胜电子科技(淮安)有限公司 具有散热块的电路板及其制作方法
CN115442963A (zh) * 2021-06-03 2022-12-06 深南电路股份有限公司 一种埋入式元件电路板及其制做方法和电子装置

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4248920A (en) * 1978-04-26 1981-02-03 Tokyo Shibaura Denki Kabushiki Kaisha Resin-sealed semiconductor device
JPS56172970U (sv) * 1980-05-20 1981-12-21
US4381327A (en) * 1980-10-06 1983-04-26 Dennison Manufacturing Company Mica-foil laminations
JPS5753674U (sv) * 1980-09-12 1982-03-29
JPS5753674A (en) * 1980-09-17 1982-03-30 Toshiba Corp Emission ct
JPS57166056A (en) * 1981-03-13 1982-10-13 Siemens Ag Integrated module
GB2101148B (en) * 1981-04-14 1984-10-24 Hitachi Ltd Composition of protective coating material
JPS57184296A (en) * 1981-05-09 1982-11-12 Hitachi Ltd Ceramic circuit board
JPS5872847A (ja) * 1981-10-26 1983-04-30 株式会社鷺宮製作所 電気冷蔵庫用冷媒回路
JPS5872847U (ja) * 1981-11-11 1983-05-17 日本電気株式会社 電子装置
US4410927A (en) * 1982-01-21 1983-10-18 Olin Corporation Casing for an electrical component having improved strength and heat transfer characteristics
US4479991A (en) * 1982-04-07 1984-10-30 At&T Technologies, Inc. Plastic coated laminate
US4499145A (en) * 1982-04-19 1985-02-12 Sumitomo Bakelite Company Limited Metal-clad laminate and process for producing the same
JPS5967686A (ja) * 1982-10-12 1984-04-17 イビデン株式会社 プリント配線基板とその製造方法
SE435443B (sv) * 1983-02-18 1984-09-24 Ericsson Telefon Ab L M Kylanordning for elektroniska komponenter vilka genom hallare er anslutna till kretskort

Also Published As

Publication number Publication date
DE3482545D1 (de) 1990-07-19
FI86943C (sv) 1992-10-26
FI852798A0 (fi) 1985-07-17
EP0197148A4 (en) 1987-06-29
US4773955A (en) 1988-09-27
US4737395A (en) 1988-04-12
JPH0378795B2 (sv) 1991-12-16
EP0197148B1 (en) 1990-06-13
SG4191G (en) 1991-04-05
JPS60116191A (ja) 1985-06-22
EP0197148A1 (en) 1986-10-15
WO1985002515A1 (en) 1985-06-06
FI852798L (fi) 1985-07-17

Similar Documents

Publication Publication Date Title
FI86943B (fi) Tryckkopplingsplaot foer montering av elektroniska delar och foerfaranden foer tillverkning av den.
US5124884A (en) Electronic part mounting board and method of manufacturing the same
US5235209A (en) Multi-layer lead frame for a semiconductor device with contact geometry
JP2784522B2 (ja) 電子部品搭載用基板及びその製造法
JPH07290869A (ja) Icカード
JPS6134990A (ja) 電子部品搭載用基板およびその製造方法
JPH0155591B2 (sv)
JPH0420279B2 (sv)
US5824964A (en) Circuit board for a semiconductor device and method of making the same
JP2784524B2 (ja) 多層電子部品搭載用基板及びその製造法
JPH0746709B2 (ja) 電子部品搭載用基板
JPH0263141A (ja) 電子部品搭載用基板の製造方法
JPH0358552B2 (sv)
JPH056714Y2 (sv)
JPH07307533A (ja) プリント配線基板
JP2784521B2 (ja) 多層電子部品塔載用基板及びその製造法
JPH0362956A (ja) 半導体チップキャリア
JPH0358551B2 (sv)
JPH0360191B2 (sv)
CN112970103A (zh) 布线基板、复合基板以及电气装置
JPH01128888A (ja) 半導体ic装置の製造方法
JPH04291749A (ja) 放熱部材を備えた電子部品搭載用基板
JPH0555401A (ja) プリント配線基板
JPS62257753A (ja) 半導体搭載用基板およびその製造方法
JPH0113412Y2 (sv)

Legal Events

Date Code Title Description
MM Patent lapsed
MM Patent lapsed

Owner name: IBIDEN CO., LTD.