ES8705704A1 - Procedimiento para la fabricacion de dispositivos semicon- ductores - Google Patents

Procedimiento para la fabricacion de dispositivos semicon- ductores

Info

Publication number
ES8705704A1
ES8705704A1 ES550034A ES550034A ES8705704A1 ES 8705704 A1 ES8705704 A1 ES 8705704A1 ES 550034 A ES550034 A ES 550034A ES 550034 A ES550034 A ES 550034A ES 8705704 A1 ES8705704 A1 ES 8705704A1
Authority
ES
Spain
Prior art keywords
substrate
fabricating
selectivity
etch
grounding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES550034A
Other languages
English (en)
Other versions
ES550034A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of ES8705704A1 publication Critical patent/ES8705704A1/es
Publication of ES550034A0 publication Critical patent/ES550034A0/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

METODO DE FABRICAR DISPOSITIVOS SEMICONDUCTORES. COMPRENDE: A) CONFINAR EL PLASMA EN UNA REGION QUE SE EXTIENDE LATERALMENTE DESDE LA PERIFERIA DEL SUSTRATO EN UNA DISTANCIA INFERIOR AL 20% DEL DIAMETRO EFICAZ DEL SUSTRATO, MEDIANTE SEPARACION CON UN MATERIAL DIELECTRICO EN LA PROXIMIDAD DEL SUSTRATO; B) MORDENTAR EN UN REACTOR UN PRIMER MATERIAL DE SUSTRATO POR CONTACTO CON ENTIDADES DE CLORO DE UN PLASMA DE GAS; Y C) TRATAR UN SEGUNDO MATERIAL DE SUSTRATO CON EL PLASMA DE GAS, PARA FORMAR EL DISPOSITIVO SEMICONDUCTOR. EL PRIMER MATERIAL ES OXIDO DE SILICIO; EL SEGUNDO MATERIAL ES SILICIO; Y EL REACTOR TIENE UN CATODO HEXAGONAL PARA PRODUCIR PLASMA. TIENE APLICACIONES EN LA FABRICACION DE CIRCUITOS INTEGRADOS.
ES550034A 1984-12-18 1985-12-17 Procedimiento para la fabricacion de dispositivos semicon- ductores Expired ES8705704A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US68277684A 1984-12-18 1984-12-18

Publications (2)

Publication Number Publication Date
ES8705704A1 true ES8705704A1 (es) 1987-05-16
ES550034A0 ES550034A0 (es) 1987-05-16

Family

ID=24741091

Family Applications (1)

Application Number Title Priority Date Filing Date
ES550034A Expired ES8705704A1 (es) 1984-12-18 1985-12-17 Procedimiento para la fabricacion de dispositivos semicon- ductores

Country Status (9)

Country Link
EP (1) EP0205557B1 (es)
JP (1) JP2868764B2 (es)
KR (1) KR950000859B1 (es)
CA (1) CA1278768C (es)
DE (1) DE3577020D1 (es)
ES (1) ES8705704A1 (es)
IE (1) IE57062B1 (es)
SG (1) SG63690G (es)
WO (1) WO1986003887A2 (es)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3629422C2 (de) * 1986-08-29 1994-02-17 Agfa Gevaert Ag Verfahren und Vorrichtung zum Einstellen von Belichtungsgrößen an einem Kopiergerät
US5089083A (en) * 1989-04-25 1992-02-18 Tokyo Electron Limited Plasma etching method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4397724A (en) 1981-08-24 1983-08-09 Bell Telephone Laboratories, Incorporated Apparatus and method for plasma-assisted etching of wafers
US4427516A (en) * 1981-08-24 1984-01-24 Bell Telephone Laboratories, Incorporated Apparatus and method for plasma-assisted etching of wafers

Also Published As

Publication number Publication date
SG63690G (en) 1990-09-07
EP0205557B1 (en) 1990-04-04
ES550034A0 (es) 1987-05-16
EP0205557A1 (en) 1986-12-30
IE853193L (en) 1986-06-18
IE57062B1 (en) 1992-04-08
WO1986003887A2 (en) 1986-07-03
KR880700453A (ko) 1988-03-15
CA1278768C (en) 1991-01-08
JP2868764B2 (ja) 1999-03-10
JPS62501183A (ja) 1987-05-07
DE3577020D1 (de) 1990-05-10
KR950000859B1 (ko) 1995-02-02
WO1986003887A3 (en) 1986-08-14

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