ES349772A1 - Metodo de obtencion de circuitos semiconductores. - Google Patents

Metodo de obtencion de circuitos semiconductores.

Info

Publication number
ES349772A1
ES349772A1 ES349772A ES349772A ES349772A1 ES 349772 A1 ES349772 A1 ES 349772A1 ES 349772 A ES349772 A ES 349772A ES 349772 A ES349772 A ES 349772A ES 349772 A1 ES349772 A1 ES 349772A1
Authority
ES
Spain
Prior art keywords
circuit
board
platforms
components
strip portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES349772A
Other languages
English (en)
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZF International UK Ltd
Original Assignee
Lucas Industries Ltd
Joseph Lucas Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucas Industries Ltd, Joseph Lucas Industries Ltd filed Critical Lucas Industries Ltd
Publication of ES349772A1 publication Critical patent/ES349772A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
    • H02J7/70—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries characterised by the mechanical construction
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2105/00—Networks for supplying or distributing electric power characterised by their spatial reach or by the load
    • H02J2105/30—Networks for supplying or distributing electric power characterised by their spatial reach or by the load the load networks being external to vehicles, i.e. exchanging power with vehicles
    • H02J2105/33—Networks for supplying or distributing electric power characterised by their spatial reach or by the load the load networks being external to vehicles, i.e. exchanging power with vehicles exchanging power with road vehicles
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries
    • H02J7/14—Circuit arrangements for charging or discharging batteries or for supplying loads from batteries for charging batteries from dynamo-electric generators driven at varying speed, e.g. on vehicle
    • H02J7/16—Regulation of the charging current or voltage by variation of field
    • H02J7/24—Regulation of the charging current or voltage by variation of field using discharge tubes or semiconductor devices
    • H02J7/243—Regulation of the charging current or voltage by variation of field using discharge tubes or semiconductor devices with on/off action
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Dc-Dc Converters (AREA)
  • Combinations Of Printed Boards (AREA)
ES349772A 1967-01-19 1968-01-13 Metodo de obtencion de circuitos semiconductores. Expired ES349772A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2893/67A GB1196452A (en) 1967-01-19 1967-01-19 Semiconductor Circuits

Publications (1)

Publication Number Publication Date
ES349772A1 true ES349772A1 (es) 1969-04-01

Family

ID=9748004

Family Applications (1)

Application Number Title Priority Date Filing Date
ES349772A Expired ES349772A1 (es) 1967-01-19 1968-01-13 Metodo de obtencion de circuitos semiconductores.

Country Status (6)

Country Link
US (1) US3602983A (ref)
DE (1) DE1616283B1 (ref)
ES (1) ES349772A1 (ref)
FR (1) FR1551595A (ref)
GB (1) GB1196452A (ref)
NL (1) NL6800663A (ref)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1907075B2 (de) * 1969-02-13 1974-07-04 Semikron Gesellschaft Fuer Gleichrichterbau Und Elektronik Mbh, 8500 Nuernberg Verfahren zur Herstellung von Halbleiter-Kleingleichrichtern
DE3106376A1 (de) * 1981-02-20 1982-09-09 Siemens AG, 1000 Berlin und 8000 München Halbleiteranordnung mit aus blech ausgeschnittenen anschlussleitern
US4751199A (en) * 1983-12-06 1988-06-14 Fairchild Semiconductor Corporation Process of forming a compliant lead frame for array-type semiconductor packages
JPH0691119B2 (ja) * 1989-07-31 1994-11-14 株式会社東芝 半導体装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2804581A (en) * 1953-10-05 1957-08-27 Sarkes Tarzian Semiconductor device and method of manufacture thereof
DE1199408B (de) * 1961-06-28 1965-08-26 Siemens Ag Verfahren zum Herstellen von Halbleiterbau-elementen und nach diesem Verfahren hergestelltes Halbleiterbauelement
US3325586A (en) * 1963-03-05 1967-06-13 Fairchild Camera Instr Co Circuit element totally encapsulated in glass
US3235937A (en) * 1963-05-10 1966-02-22 Gen Electric Low cost transistor
US3341649A (en) * 1964-01-17 1967-09-12 Signetics Corp Modular package for semiconductor devices
DE1514822A1 (de) * 1964-08-14 1969-06-26 Telefunken Patent Verfahren zur Herstellung einer Halbleiteranordnung

Also Published As

Publication number Publication date
US3602983A (en) 1971-09-07
GB1196452A (en) 1970-06-24
DE1616283B1 (de) 1970-12-23
FR1551595A (ref) 1968-12-27
NL6800663A (ref) 1968-07-22

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