GB1249067A - Improvements in or relating to methods of connecting integrated circuit chips to printed circuit boards - Google Patents

Improvements in or relating to methods of connecting integrated circuit chips to printed circuit boards

Info

Publication number
GB1249067A
GB1249067A GB02924/69A GB1292469A GB1249067A GB 1249067 A GB1249067 A GB 1249067A GB 02924/69 A GB02924/69 A GB 02924/69A GB 1292469 A GB1292469 A GB 1292469A GB 1249067 A GB1249067 A GB 1249067A
Authority
GB
United Kingdom
Prior art keywords
chips
board
mask
chip
apertures
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB02924/69A
Inventor
Kenneth Charles Arthur Bingham
Yener Gurler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Services Ltd
Original Assignee
Fujitsu Services Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Services Ltd filed Critical Fujitsu Services Ltd
Priority to GB02924/69A priority Critical patent/GB1249067A/en
Publication of GB1249067A publication Critical patent/GB1249067A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H05K13/046—Surface mounting
    • H05K13/0465—Surface mounting by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01075—Rhenium [Re]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09936—Marks, inscriptions, etc. for information
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0186—Mask formed or laid on PCB, the mask having recesses or openings specially designed for mounting components or body parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

1,249,067. Mounting integrated circuits. INTERNATIONAL COMPUTERS Ltd. 23 Feb., 1970 [12 March, 1969], No. 12924/69. Heading B3A. [Also in Division H1] A method of assembling integrated circuit chips 11 on to a printed circuit board includes forming a mask 5 having apertures 8 corresponding to the chip positions, each aperture being provided with two reference edges 9, 10; positioning the mask on the board; positioning a chip in each aperture; effecting relative movement between the board and the chips so that each chip is engaged by the edges 9, 10 and so that contacts on each chip are aligned with corresponding board contacts 4; and making electrical connection between the chip and board contacts. Reference edges 13, 14 of the mask are aligned with marks 6, 7 on the board, the latter being preferably formed at the same time as the contacts 4, and the correct orientation of the chip on the board may be checked by indicia thereon or by the completion of electrical circuits between probes. The apertures 8 are sufficiently large to allow the chips to enter easily and the mask is thinner than the chips so that they stand proud to enable aligning forces 12 to be applied to them. Alternatively the chips are aligned by moving the board and mask relatively to one another. The chips and apertures may be asymmetrical so that chips may be positioned by placing an excess number on the mask and vibrating the board and mask, so that the chips enter the apertures with the correct orientation. The apertures may be of different sizes and shapes so that only the correct chip can be inserted in each aperture.
GB02924/69A 1969-03-12 1969-03-12 Improvements in or relating to methods of connecting integrated circuit chips to printed circuit boards Expired GB1249067A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB02924/69A GB1249067A (en) 1969-03-12 1969-03-12 Improvements in or relating to methods of connecting integrated circuit chips to printed circuit boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB02924/69A GB1249067A (en) 1969-03-12 1969-03-12 Improvements in or relating to methods of connecting integrated circuit chips to printed circuit boards

Publications (1)

Publication Number Publication Date
GB1249067A true GB1249067A (en) 1971-10-06

Family

ID=10013635

Family Applications (1)

Application Number Title Priority Date Filing Date
GB02924/69A Expired GB1249067A (en) 1969-03-12 1969-03-12 Improvements in or relating to methods of connecting integrated circuit chips to printed circuit boards

Country Status (1)

Country Link
GB (1) GB1249067A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2468285A1 (en) * 1979-10-25 1981-04-30 Hitachi Ltd METHOD AND APPARATUS FOR MOUNTING PIN-TYPE CIRCUIT CIRCUIT ELEMENTS ON A PRINTED CIRCUIT BOARD

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2468285A1 (en) * 1979-10-25 1981-04-30 Hitachi Ltd METHOD AND APPARATUS FOR MOUNTING PIN-TYPE CIRCUIT CIRCUIT ELEMENTS ON A PRINTED CIRCUIT BOARD

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