ES2171424T3 - Modulo electronico para tarjetas y fabricacion del mismo. - Google Patents
Modulo electronico para tarjetas y fabricacion del mismo.Info
- Publication number
- ES2171424T3 ES2171424T3 ES94111975T ES94111975T ES2171424T3 ES 2171424 T3 ES2171424 T3 ES 2171424T3 ES 94111975 T ES94111975 T ES 94111975T ES 94111975 T ES94111975 T ES 94111975T ES 2171424 T3 ES2171424 T3 ES 2171424T3
- Authority
- ES
- Spain
- Prior art keywords
- electronic module
- manufacture
- connection circuit
- integrated connection
- cards
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000003801 milling Methods 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07743—External electrical contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
- H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Theoretical Computer Science (AREA)
- Credit Cards Or The Like (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
PARA LA FABRICACION DE UN MODULO ELECTRONICO CON CIRCUITO DE CONEXION INTEGRADO SE ELABORA UN PRODUCTO DE PARTIDA ESTANDARDIZADO, COMPUESTO DE UNA SUSTANCIA AISLANTE, QUE ESTA PROVISTA CON UN RECUBRIMIENTO CONDUCTOR. EN EL RECUBRIMIENTO CONDUCTOR SE CONFIGURAN SUPERFICIES DE CONTACTO POR MEDIO DE INTERRUPCIONES. EN LA CAPA AISLANTE DEL PRODUCTO DE PARTIDA SE APLICAN CAVIDADES CON LA AYUDA DE UNA HERRAMIENTA DE FRESADO, A TRAVES DE LAS CUALES SE GUIEN MAS TARDE LOS COMPUESTOS CONDUCTORES ENTRE LAS SUPERFICIES DE CONTACTO Y EL CIRCUITO DE CONEXION INTEGRADO. LA CAPA DE LAS CAVIDADES SE ADAPTADA AL CIRCUITO DE CONEXION INTEGRADO INSTALADO DE ACUERDO CON EL TAMAÑO EN EL MODULO ELECTRONICO.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4326816A DE4326816A1 (de) | 1993-08-10 | 1993-08-10 | Elektronisches Modul für Karten und Herstellung eines solchen Moduls |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2171424T3 true ES2171424T3 (es) | 2002-09-16 |
Family
ID=6494849
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES94111975T Expired - Lifetime ES2171424T3 (es) | 1993-08-10 | 1994-08-01 | Modulo electronico para tarjetas y fabricacion del mismo. |
Country Status (6)
Country | Link |
---|---|
US (2) | US5756379A (es) |
EP (1) | EP0643366B1 (es) |
JP (1) | JPH07154049A (es) |
AT (1) | ATE213349T1 (es) |
DE (2) | DE4326816A1 (es) |
ES (1) | ES2171424T3 (es) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100480522B1 (ko) * | 1995-08-01 | 2005-08-31 | 오스트리아 카드 플라스틱카르텐 운트 아우스바이스시스템게젤샤프트 엠베하 | 컴포넌트보유모듈및코일을갖는데이터캐리어와이데이터캐리어의제조방법 |
FR2740935B1 (fr) * | 1995-11-03 | 1997-12-05 | Schlumberger Ind Sa | Procede de fabrication d'un ensemble de modules electroniques pour cartes a memoire electronique |
US6861290B1 (en) * | 1995-12-19 | 2005-03-01 | Micron Technology, Inc. | Flip-chip adaptor package for bare die |
DE19609134A1 (de) * | 1996-03-08 | 1997-09-11 | Giesecke & Devrient Gmbh | Verfahren zur Herstellung eines Datenträgers mit einem elektronischen Modul |
TW345710B (en) * | 1996-07-31 | 1998-11-21 | Hitachi Chemical Co Ltd | Chip supporting substrate for semiconductor package, semiconductor package and process for manufacturing semiconductor package |
DE19638371C2 (de) * | 1996-09-19 | 2001-05-31 | Siemens Ag | Verfahren zur Erzeugung einer einseitigen galvanischen Metallschicht auf Chipmodulen |
DE19639934A1 (de) * | 1996-09-27 | 1998-04-09 | Siemens Ag | Verfahren zur Flipchip-Kontaktierung eines Halbleiterchips mit geringer Anschlußzahl |
DE19703990A1 (de) * | 1997-02-03 | 1998-08-06 | Giesecke & Devrient Gmbh | Modular aufgebauter, elektronischer Datenträger |
DE19738588B4 (de) * | 1997-09-03 | 2004-11-25 | Infineon Technologies Ag | Elektrisches Bauelement mit einer Umhüllung und mit einem in der Umhüllung angeordneten Anschlußbereich und Verfahren zur Herstellung eines solchen elektrischen Bauelements |
US6787389B1 (en) * | 1997-10-09 | 2004-09-07 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having pads for connecting a semiconducting element to a mother board |
JP3481117B2 (ja) | 1998-02-25 | 2003-12-22 | 富士通株式会社 | 半導体装置及びその製造方法 |
JP3764587B2 (ja) * | 1998-06-30 | 2006-04-12 | 富士通株式会社 | 半導体装置の製造方法 |
JP2000331962A (ja) * | 1999-05-18 | 2000-11-30 | Lintec Corp | 半導体ウエハの加工方法および半導体ウエハ支持部材 |
FR2794267B1 (fr) * | 1999-05-27 | 2003-06-20 | Gemplus Card Int | Dispositif portable a circuit integre, de type carte a puce de format reduit par rapport au format standard des cartes a puces et procede de fabrication |
DE59914977D1 (de) * | 1999-10-11 | 2009-04-23 | Infineon Technologies Ag | Chipkartenmodul |
DE10214314A1 (de) * | 2002-03-28 | 2003-10-23 | Nedcard B V | Chipmodul |
DE10318688A1 (de) * | 2003-04-24 | 2004-11-25 | W. C. Heraeus Gmbh & Co. Kg | Verfahren zum Trennen der elektrischen Verbindungsknoten bei IC-Frames und Verfahren zur Herstellung eines elektronischen Bauteils sowie von Frames dafür |
DE10334578A1 (de) * | 2003-07-28 | 2005-03-10 | Infineon Technologies Ag | Chipkarte, Chipkartenmodul sowie Verfahren zur Herstellung eines Chipkartenmoduls |
US20060145317A1 (en) * | 2004-12-31 | 2006-07-06 | Brennan John M | Leadframe designs for plastic cavity transistor packages |
US20060146271A1 (en) * | 2005-01-04 | 2006-07-06 | Pennaz Thomas J | Universal display module |
US7599192B2 (en) * | 2005-04-11 | 2009-10-06 | Aveso, Inc. | Layered structure with printed elements |
US7821794B2 (en) * | 2005-04-11 | 2010-10-26 | Aveso, Inc. | Layered label structure with timer |
US7977161B2 (en) * | 2008-11-17 | 2011-07-12 | Infineon Technologies Ag | Method of manufacturing a semiconductor package using a carrier |
USD798868S1 (en) * | 2015-08-20 | 2017-10-03 | Isaac S. Daniel | Combined subscriber identification module and storage card |
CN111341750B (zh) * | 2018-12-19 | 2024-03-01 | 奥特斯奥地利科技与系统技术有限公司 | 包括有导电基部结构的部件承载件及制造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1212711B (it) * | 1983-03-09 | 1989-11-30 | Ates Componenti Elettron | Dispositivo a semiconduttore aforma di scheda piana con contatti elettrici su ambedue le facce eprocedimento per la sua fabbricazione. |
EP0128822B1 (fr) * | 1983-06-09 | 1987-09-09 | Flonic S.A. | Procédé de fabrication de cartes à mémoire et cartes obtenues suivant ce procédé |
FR2548857B1 (fr) * | 1983-07-04 | 1987-11-27 | Cortaillod Cables Sa | Procede de fabrication en continu d'une carte imprimee |
FR2550009B1 (fr) * | 1983-07-29 | 1986-01-24 | Inf Milit Spatiale Aeronaut | Boitier de composant electronique muni d'un condensateur |
FR2579798B1 (fr) * | 1985-04-02 | 1990-09-28 | Ebauchesfabrik Eta Ag | Procede de fabrication de modules electroniques pour cartes a microcircuits et modules obtenus selon ce procede |
FR2583574B1 (fr) * | 1985-06-14 | 1988-06-17 | Eurotechnique Sa | Micromodule a contacts enterres et carte contenant des circuits comportant un tel micromodule. |
DE3723547C2 (de) * | 1987-07-16 | 1996-09-26 | Gao Ges Automation Org | Trägerelement zum Einbau in Ausweiskarten |
US5304513A (en) * | 1987-07-16 | 1994-04-19 | Gao Gesellschaft Fur Automation Und Organisation Mbh | Method for manufacturing an encapsulated semiconductor package using an adhesive barrier frame |
FR2624652B1 (fr) * | 1987-12-14 | 1990-08-31 | Sgs Thomson Microelectronics | Procede de mise en place sur un support, d'un composant electronique, muni de ses contacts |
JP2565300B2 (ja) * | 1994-05-31 | 1996-12-18 | 日本電気株式会社 | 半導体装置 |
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1993
- 1993-08-10 DE DE4326816A patent/DE4326816A1/de not_active Withdrawn
-
1994
- 1994-08-01 DE DE59410046T patent/DE59410046D1/de not_active Expired - Fee Related
- 1994-08-01 EP EP94111975A patent/EP0643366B1/de not_active Expired - Lifetime
- 1994-08-01 ES ES94111975T patent/ES2171424T3/es not_active Expired - Lifetime
- 1994-08-01 AT AT94111975T patent/ATE213349T1/de not_active IP Right Cessation
- 1994-08-04 JP JP6183800A patent/JPH07154049A/ja active Pending
- 1994-08-10 US US08/288,042 patent/US5756379A/en not_active Expired - Fee Related
-
1998
- 1998-05-11 US US09/075,362 patent/US6013945A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE4326816A1 (de) | 1995-02-16 |
DE59410046D1 (de) | 2002-03-21 |
US5756379A (en) | 1998-05-26 |
JPH07154049A (ja) | 1995-06-16 |
ATE213349T1 (de) | 2002-02-15 |
US6013945A (en) | 2000-01-11 |
EP0643366B1 (de) | 2002-02-13 |
EP0643366A3 (de) | 1996-01-03 |
EP0643366A2 (de) | 1995-03-15 |
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