ES2040659A2 - Multiplicador de control con mosfets. - Google Patents
Multiplicador de control con mosfets.Info
- Publication number
- ES2040659A2 ES2040659A2 ES929201484A ES9201484A ES2040659A2 ES 2040659 A2 ES2040659 A2 ES 2040659A2 ES 929201484 A ES929201484 A ES 929201484A ES 9201484 A ES9201484 A ES 9201484A ES 2040659 A2 ES2040659 A2 ES 2040659A2
- Authority
- ES
- Spain
- Prior art keywords
- mosfet
- input voltage
- voltage
- symmetrical
- controlling multiplier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
- G06G7/16—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division
- G06G7/163—Arrangements for performing computing operations, e.g. operational amplifiers for multiplication or division using a variable impedance controlled by one of the input signals, variable amplification or transfer function
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
- G06N3/065—Analogue means
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- General Physics & Mathematics (AREA)
- Biophysics (AREA)
- Health & Medical Sciences (AREA)
- Software Systems (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biomedical Technology (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Health & Medical Sciences (AREA)
- Molecular Biology (AREA)
- Evolutionary Computation (AREA)
- Data Mining & Analysis (AREA)
- Computational Linguistics (AREA)
- Artificial Intelligence (AREA)
- Neurology (AREA)
- Power Engineering (AREA)
- Networks Using Active Elements (AREA)
- Amplifiers (AREA)
Abstract
MULTIPLICADOR DE CONTROL CON MOSFETS. ESTA DESTINADO A LA OBTENCION DE LA FUNCION PRECISA DE LA MULTIPLICACION OPERACIONAL POR DESPLAZAMIENTO DE LA TENSION DE DESPLAZAMIENTO DE LOS MOSFETS PARA ELIMINAR SU INTENSIDAD NO LINEAL. UTILIZA FUENTES DE TENSION SIMETRICA, UN CIRCUITO ESPECULAR DE INTENSIDAD Y MEDIOS LINEALES DE MOSFET PARA HACER VARIAR LINEALMENTE LA INTENSIDAD DE SALIDA HACIA UN NODO, DE ACUERDO CON UNA TENSION DE ENTRADA PROCEDENTE DE UNA FUENTE VG Y UNA TENSION SIMETRICA DE ENTRADA PROCEDENTE DE FUENTES VX Y -VX. LA TENSION DE ENTRADA DE LA FUENTE VG ESTA ASOCIADA OPERATIVAMENTE CON LA TENSION SIMETRICA DE ENTRADA PROCEDENTE DE LAS FUENTES VX Y -VX. UN ELEMENTO DE IMPEDANCIA PRODUCE UNA TENSION VO, ESTANDO CONECTADO EL ELEMENTO DE IMPEDANCIA AL NODO DE LOS MEDIOS LINEALES DE MOSFET Y LA MASA. APLICABLE, PARTICULARMENTE, PARA OBTENER HIBRIDOS ANALOGICO-DIGITALES DE UNA SINAPSIS NEURAL ARTIFICIAL.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910019375A KR940004430B1 (ko) | 1991-11-01 | 1991-11-01 | Mosfet 저항성 제어형 곱셈연산기 |
Publications (3)
Publication Number | Publication Date |
---|---|
ES2040659A2 true ES2040659A2 (es) | 1993-10-16 |
ES2040659R ES2040659R (es) | 1996-03-01 |
ES2040659B1 ES2040659B1 (es) | 1996-11-01 |
Family
ID=19322149
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES09201484A Expired - Fee Related ES2040659B1 (es) | 1991-11-01 | 1992-07-16 | Multiplicador de control con mosfets. |
Country Status (18)
Country | Link |
---|---|
US (1) | US5237289A (es) |
JP (1) | JPH0690736B2 (es) |
KR (1) | KR940004430B1 (es) |
AT (1) | AT398010B (es) |
BE (1) | BE1005270A5 (es) |
CH (1) | CH684665A5 (es) |
DE (1) | DE4222846C2 (es) |
DK (1) | DK81992A (es) |
ES (1) | ES2040659B1 (es) |
FR (1) | FR2683353B1 (es) |
GB (1) | GB2261093B (es) |
GR (1) | GR1002150B (es) |
IT (1) | IT1255431B (es) |
LU (1) | LU88148A1 (es) |
MC (1) | MC2322A1 (es) |
NL (1) | NL9201248A (es) |
PT (1) | PT100693A (es) |
SE (1) | SE9201883L (es) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0548354A (ja) * | 1991-08-19 | 1993-02-26 | Matsushita Electric Ind Co Ltd | 利得制御回路および半導体装置 |
DE69524220T2 (de) * | 1995-09-27 | 2002-07-11 | Stmicroelectronics S.R.L., Agrate Brianza | Vierquadrantenmultiplizierer mit niedrigem Verbrauch und niedriger Spannung, insbesondere für neuronale Anwendungen |
US5720004A (en) * | 1995-09-29 | 1998-02-17 | United Microelectronics Corporation | Current-mode hamming neural network |
US5917368A (en) * | 1996-05-08 | 1999-06-29 | Telefonatiebolaget Lm Ericsson | Voltage-to-current converter |
KR100219036B1 (ko) * | 1996-09-30 | 1999-09-01 | 이계철 | 저전압형 모스펫 콘트롤링 곱셈기 |
KR100219037B1 (ko) * | 1996-10-01 | 1999-09-01 | 이계철 | 선형화된 저항성을 이용한 모스펫 아날로그 곱셈기 |
JP3545142B2 (ja) * | 1996-11-25 | 2004-07-21 | 三菱電機株式会社 | 差動増幅器 |
FR2769388B1 (fr) * | 1997-10-07 | 2001-08-03 | Korea Telecomm Authority | Multiplieur et synapse de reseau neuronal utilisant un miroir de courant comportant des transistors a effet de champ mos de faible puissance |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4032767A (en) * | 1976-02-26 | 1977-06-28 | The United States Of America As Represented By The Secretary Of The Navy | High-frequency ccd adder and multiplier |
US4760349A (en) * | 1986-08-19 | 1988-07-26 | Regents Of The University Of Minnesota | CMOS analog standard cell arrays using linear transconductance elements |
WO1990016039A1 (en) * | 1989-06-15 | 1990-12-27 | General Electric Company | Neural net using differential capacitively coupled input and output lines |
US5021988A (en) * | 1989-04-27 | 1991-06-04 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor neural network and method of driving the same |
US5061866A (en) * | 1990-08-06 | 1991-10-29 | The Ohio State University Research Foundation | Analog, continuous time vector scalar multiplier circuits and programmable feedback neural network using them |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4156923A (en) * | 1977-10-17 | 1979-05-29 | Westinghouse Electric Corp. | Method and apparatus for performing matrix multiplication or analog signal correlation |
US4837527A (en) * | 1987-12-23 | 1989-06-06 | Rca Licensing Corporation | Switched capacitor arrangement |
US4825174A (en) * | 1988-06-20 | 1989-04-25 | American Telephone And Telegraph Company, At&T Bell Laboratories | Symmetric integrated amplifier with controlled DC offset voltage |
US4931674A (en) * | 1988-11-16 | 1990-06-05 | United States Of America As Represented By The Secretary Of The Navy | Programmable analog voltage multiplier circuit means |
US4906873A (en) * | 1989-01-12 | 1990-03-06 | The United States Of America As Represented By The Secretary Of The Navy | CMOS analog four-quadrant multiplier |
JPH02311972A (ja) * | 1989-05-29 | 1990-12-27 | Matsushita Electric Ind Co Ltd | ニューロン素子回路 |
US4978873A (en) * | 1989-10-11 | 1990-12-18 | The United States Of America As Represented By The Secretary Of The Navy | CMOS analog four-quadrant multiplier |
US5097156A (en) * | 1991-04-11 | 1992-03-17 | The United States Of America As Represented By The Secretary Of The Navy | Circuitry for compensating for transistor parameter mismatches in a CMOS analog four-quadrant multiplier |
-
1991
- 1991-11-01 KR KR1019910019375A patent/KR940004430B1/ko not_active IP Right Cessation
-
1992
- 1992-06-12 MC MC922230A patent/MC2322A1/xx unknown
- 1992-06-18 SE SE9201883A patent/SE9201883L/ not_active Application Discontinuation
- 1992-06-18 US US07/900,330 patent/US5237289A/en not_active Expired - Lifetime
- 1992-06-22 DK DK081992A patent/DK81992A/da not_active Application Discontinuation
- 1992-06-24 GB GB9213382A patent/GB2261093B/en not_active Expired - Fee Related
- 1992-07-08 BE BE9200637A patent/BE1005270A5/fr not_active IP Right Cessation
- 1992-07-09 FR FR9208504A patent/FR2683353B1/fr not_active Expired - Fee Related
- 1992-07-10 NL NL9201248A patent/NL9201248A/nl active Search and Examination
- 1992-07-11 DE DE4222846A patent/DE4222846C2/de not_active Expired - Fee Related
- 1992-07-15 AT AT0144692A patent/AT398010B/de not_active IP Right Cessation
- 1992-07-15 PT PT100693A patent/PT100693A/pt not_active Application Discontinuation
- 1992-07-15 LU LU88148A patent/LU88148A1/fr unknown
- 1992-07-16 CH CH2241/92A patent/CH684665A5/de not_active IP Right Cessation
- 1992-07-16 ES ES09201484A patent/ES2040659B1/es not_active Expired - Fee Related
- 1992-07-16 IT ITMI921727A patent/IT1255431B/it active IP Right Grant
- 1992-09-23 GR GR920100399A patent/GR1002150B/el not_active IP Right Cessation
- 1992-10-30 JP JP4292340A patent/JPH0690736B2/ja not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4032767A (en) * | 1976-02-26 | 1977-06-28 | The United States Of America As Represented By The Secretary Of The Navy | High-frequency ccd adder and multiplier |
US4760349A (en) * | 1986-08-19 | 1988-07-26 | Regents Of The University Of Minnesota | CMOS analog standard cell arrays using linear transconductance elements |
US5021988A (en) * | 1989-04-27 | 1991-06-04 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor neural network and method of driving the same |
WO1990016039A1 (en) * | 1989-06-15 | 1990-12-27 | General Electric Company | Neural net using differential capacitively coupled input and output lines |
US5061866A (en) * | 1990-08-06 | 1991-10-29 | The Ohio State University Research Foundation | Analog, continuous time vector scalar multiplier circuits and programmable feedback neural network using them |
Also Published As
Publication number | Publication date |
---|---|
GB2261093A (en) | 1993-05-05 |
GB9213382D0 (en) | 1992-08-05 |
SE9201883L (sv) | 1993-05-02 |
GR920100399A (el) | 1993-07-30 |
DE4222846A1 (de) | 1993-05-06 |
JPH0690736B2 (ja) | 1994-11-14 |
DK81992D0 (da) | 1992-06-22 |
ATA144692A (de) | 1993-12-15 |
ES2040659B1 (es) | 1996-11-01 |
LU88148A1 (fr) | 1993-02-15 |
DE4222846C2 (de) | 1995-06-22 |
JPH05225365A (ja) | 1993-09-03 |
PT100693A (pt) | 1994-05-31 |
NL9201248A (nl) | 1993-06-01 |
GR1002150B (en) | 1996-02-20 |
GB2261093B (en) | 1995-06-21 |
FR2683353B1 (fr) | 1997-03-28 |
IT1255431B (it) | 1995-10-31 |
SE9201883D0 (sv) | 1992-06-18 |
KR940004430B1 (ko) | 1994-05-25 |
FR2683353A1 (fr) | 1993-05-07 |
ITMI921727A0 (it) | 1992-07-16 |
ES2040659R (es) | 1996-03-01 |
US5237289A (en) | 1993-08-17 |
MC2322A1 (fr) | 1993-10-25 |
BE1005270A5 (fr) | 1993-06-15 |
ITMI921727A1 (it) | 1994-01-16 |
CH684665A5 (de) | 1994-11-15 |
DK81992A (da) | 1993-05-02 |
KR930011429A (ko) | 1993-06-24 |
AT398010B (de) | 1994-08-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EC2A | Search report published |
Date of ref document: 19920716 Kind code of ref document: B1 Effective date: 19920716 |
|
FD1A | Patent lapsed |
Effective date: 20010717 |