ES2032288T3 - Sistema de ordenador con arbitraje de canales de acceso directo a memoria. - Google Patents

Sistema de ordenador con arbitraje de canales de acceso directo a memoria.

Info

Publication number
ES2032288T3
ES2032288T3 ES198787118542T ES87118542T ES2032288T3 ES 2032288 T3 ES2032288 T3 ES 2032288T3 ES 198787118542 T ES198787118542 T ES 198787118542T ES 87118542 T ES87118542 T ES 87118542T ES 2032288 T3 ES2032288 T3 ES 2032288T3
Authority
ES
Spain
Prior art keywords
arbitration
computer system
peripherals
channels
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES198787118542T
Other languages
English (en)
Inventor
Ian Anthony Concilio
Jeffrey Alan Hawthorne
Chester Asbury Heath
Jorge Eduardo Lenta
Long Duy Nguyen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of ES2032288T3 publication Critical patent/ES2032288T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/3625—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using a time dependent access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/30—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal with priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/374—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a self-select method with individual priority code comparator

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

UN SISTEMA DE COMPUTADOR SE ACOPLA A PERIFERICOS QUE TIENEN SU PROPIO ARBITRAJE DE CANAL DMA Y A PERIFERICOS QUE NO TENGAN MANEJADOR DE ARBITRAJE. UNA UNIDAD DE ARBITRAJE SEPARADA, CONTROLADA DIRECTAMENTE POR LA CPU, SE SUMINISTRA PARA ARBITRAR EL NOMBRE DE LOS PERIFERICOS QUE NO TENGAN MANEJADOR DE ARBITRAJE. LA CPU PUEDE DE ESTA FORMA ASIGNAR LIBREMENTE DIFERENTES NIVELES DE ARBITRAJE A DICHOS PERIFERICOS, Y PUEDE INSTRUIR A LA UNIDAD DE ARBITRAJE PARA ARBITRAR SIMULTANEAMENTE SOBRE DIFERENTES NIVELES DE ARBITRAJE O PARA DOS O MAS CANALES DE DMA.
ES198787118542T 1987-03-27 1987-12-15 Sistema de ordenador con arbitraje de canales de acceso directo a memoria. Expired - Lifetime ES2032288T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US3078887A 1987-03-27 1987-03-27

Publications (1)

Publication Number Publication Date
ES2032288T3 true ES2032288T3 (es) 1993-02-01

Family

ID=21856040

Family Applications (1)

Application Number Title Priority Date Filing Date
ES198787118542T Expired - Lifetime ES2032288T3 (es) 1987-03-27 1987-12-15 Sistema de ordenador con arbitraje de canales de acceso directo a memoria.

Country Status (19)

Country Link
EP (1) EP0283580B1 (es)
JP (1) JPH0724044B2 (es)
KR (1) KR950008228B1 (es)
CN (1) CN1012295B (es)
AR (1) AR244899A1 (es)
AT (1) ATE75865T1 (es)
BE (1) BE1001290A4 (es)
BR (1) BR8800739A (es)
CA (1) CA1299295C (es)
DE (1) DE3778877D1 (es)
ES (1) ES2032288T3 (es)
FR (1) FR2613096A1 (es)
GB (1) GB2202975B (es)
GR (1) GR3004930T3 (es)
HK (1) HK65392A (es)
IT (1) IT1217359B (es)
MY (1) MY103351A (es)
NL (1) NL185312C (es)
SG (1) SG67992G (es)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7089344B1 (en) * 2000-06-09 2006-08-08 Motorola, Inc. Integrated processor platform supporting wireless handheld multi-media devices
JP2010165175A (ja) 2009-01-15 2010-07-29 Internatl Business Mach Corp <Ibm> バスの使用権を制御する装置および方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3603935A (en) * 1969-05-12 1971-09-07 Xerox Corp Memory port priority access system with inhibition of low priority lock-out
IT971304B (it) * 1972-11-29 1974-04-30 Honeywell Inf Systems Sistema di accesso a priorita variabile dinamicamente
US4281381A (en) * 1979-05-14 1981-07-28 Bell Telephone Laboratories, Incorporated Distributed first-come first-served bus allocation apparatus
US4371932A (en) * 1979-07-30 1983-02-01 International Business Machines Corp. I/O Controller for transferring data between a host processor and multiple I/O units

Also Published As

Publication number Publication date
SG67992G (en) 1992-09-04
EP0283580B1 (en) 1992-05-06
NL8800737A (nl) 1988-10-17
NL185312C (nl) 1990-03-01
IT1217359B (it) 1990-03-22
BE1001290A4 (fr) 1989-09-19
CN1012295B (zh) 1991-04-03
EP0283580A1 (en) 1988-09-28
JPS63244161A (ja) 1988-10-11
CA1299295C (en) 1992-04-21
FR2613096A1 (fr) 1988-09-30
BR8800739A (pt) 1988-10-04
GB2202975A (en) 1988-10-05
IT8819946A0 (it) 1988-03-25
ATE75865T1 (de) 1992-05-15
JPH0724044B2 (ja) 1995-03-15
NL185312B (nl) 1989-10-02
DE3778877D1 (de) 1992-06-11
AR244899A1 (es) 1993-11-30
HK65392A (en) 1992-09-11
KR950008228B1 (ko) 1995-07-26
MY103351A (en) 1993-06-30
CN88100963A (zh) 1988-12-28
GB8728921D0 (en) 1988-01-27
KR880011679A (ko) 1988-10-29
GR3004930T3 (es) 1993-04-28
GB2202975B (en) 1991-09-25

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