ES2004276A6 - Un dispositivo semiconducir que incluye una capa epitaxial sobre un sustrato monocristalino de red desequilibrada - Google Patents
Un dispositivo semiconducir que incluye una capa epitaxial sobre un sustrato monocristalino de red desequilibradaInfo
- Publication number
- ES2004276A6 ES2004276A6 ES8700901A ES8700901A ES2004276A6 ES 2004276 A6 ES2004276 A6 ES 2004276A6 ES 8700901 A ES8700901 A ES 8700901A ES 8700901 A ES8700901 A ES 8700901A ES 2004276 A6 ES2004276 A6 ES 2004276A6
- Authority
- ES
- Spain
- Prior art keywords
- single crystal
- lattice
- semiconductor device
- device including
- epitaxial layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000013078 crystal Substances 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 abstract 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 1
- 229910052732 germanium Inorganic materials 0.000 abstract 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02513—Microstructure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02647—Lateral overgrowth
- H01L21/0265—Pendeoepitaxy
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
SE PUEDEN DESARROLLAR CAPAS EPITAXIALES LIBRES DE DISLOCACION (43) SOBRE LAS SUPERFICIES (42) DE SUSTRATOS MONOCRISTALINOS DE RED CRISTALINA DESEQUILIBRADA (41), TAL COMO GERMANIO O ARSENURO DE GALIO SOBRE SILICIO, CON LA CONDICION DE QUE LAS SUPERFICIES SE ENCUENTREN ADECUADAMENTE MODELADAS, TAL COMO ALMENADAS O POROSAS (FIGURA 4).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US85048386A | 1986-04-10 | 1986-04-10 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2004276A6 true ES2004276A6 (es) | 1988-12-16 |
Family
ID=25308247
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES8700901A Expired ES2004276A6 (es) | 1986-04-10 | 1987-03-30 | Un dispositivo semiconducir que incluye una capa epitaxial sobre un sustrato monocristalino de red desequilibrada |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP0263866B1 (es) |
JP (1) | JP2854302B2 (es) |
KR (1) | KR910005734B1 (es) |
CA (1) | CA1272527A (es) |
DE (1) | DE3779547T2 (es) |
ES (1) | ES2004276A6 (es) |
WO (1) | WO1987006392A1 (es) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6428808A (en) * | 1987-07-23 | 1989-01-31 | Matsushita Electric Ind Co Ltd | Method for growing epitaxial thin film crystal |
US5079616A (en) * | 1988-02-11 | 1992-01-07 | Gte Laboratories Incorporated | Semiconductor structure |
GB8905511D0 (en) * | 1989-03-10 | 1989-04-19 | British Telecomm | Preparing substrates |
JP4569026B2 (ja) * | 2001-03-30 | 2010-10-27 | 信越半導体株式会社 | 半導体基板及びその製造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2757470A1 (de) * | 1977-12-22 | 1979-07-05 | Siemens Ag | Verfahren zum herstellen einer halbleiteranordnung |
-
1987
- 1987-03-19 KR KR1019870701116A patent/KR910005734B1/ko not_active IP Right Cessation
- 1987-03-19 WO PCT/US1987/000612 patent/WO1987006392A1/en active IP Right Grant
- 1987-03-19 EP EP87902923A patent/EP0263866B1/en not_active Expired - Lifetime
- 1987-03-19 JP JP62502183A patent/JP2854302B2/ja not_active Expired - Lifetime
- 1987-03-19 DE DE8787902923T patent/DE3779547T2/de not_active Expired - Fee Related
- 1987-03-30 ES ES8700901A patent/ES2004276A6/es not_active Expired
- 1987-04-09 CA CA000534486A patent/CA1272527A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR910005734B1 (ko) | 1991-08-02 |
WO1987006392A1 (en) | 1987-10-22 |
EP0263866B1 (en) | 1992-06-03 |
DE3779547D1 (de) | 1992-07-09 |
EP0263866A1 (en) | 1988-04-20 |
JP2854302B2 (ja) | 1999-02-03 |
KR880701456A (ko) | 1988-07-27 |
JPS63503104A (ja) | 1988-11-10 |
DE3779547T2 (de) | 1993-01-28 |
CA1272527A (en) | 1990-08-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD1A | Patent lapsed |
Effective date: 20041102 |