EP2835660B1 - Magnetic sensing device and bill validator - Google Patents

Magnetic sensing device and bill validator Download PDF

Info

Publication number
EP2835660B1
EP2835660B1 EP13772401.9A EP13772401A EP2835660B1 EP 2835660 B1 EP2835660 B1 EP 2835660B1 EP 13772401 A EP13772401 A EP 13772401A EP 2835660 B1 EP2835660 B1 EP 2835660B1
Authority
EP
European Patent Office
Prior art keywords
amplifier circuit
circuit
alternating current
detecting device
magnetism detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP13772401.9A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP2835660A1 (en
EP2835660A4 (en
Inventor
Chitaka Ochiai
Noriaki Okuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Publication of EP2835660A1 publication Critical patent/EP2835660A1/en
Publication of EP2835660A4 publication Critical patent/EP2835660A4/en
Application granted granted Critical
Publication of EP2835660B1 publication Critical patent/EP2835660B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07D—HANDLING OF COINS OR VALUABLE PAPERS, e.g. TESTING, SORTING BY DENOMINATIONS, COUNTING, DISPENSING, CHANGING OR DEPOSITING
    • G07D7/00—Testing specially adapted to determine the identity or genuineness of valuable papers or for segregating those which are unacceptable, e.g. banknotes that are alien to a currency
    • G07D7/04—Testing magnetic properties of the materials thereof, e.g. by detection of magnetic imprint

Definitions

  • the present invention relates to magnetism detecting devices that detect magnetic patterns provided in media, such as a banknote, and to banknote identifying apparatuses that identify banknotes on the basis of a magnetism detection result.
  • An existing typical magnetism detecting device includes a resistive voltage divider circuit, which is a series circuit of a magnetoresistive element and a fixed resistive element, and an amplifier circuit that amplifies an output voltage of the resistive voltage divider circuit.
  • a challenge lies in how to reduce an influence of an offset voltage of the amplifier circuit.
  • JPH01-38485 discloses a known device for detecting a rotational angle, comprising a magnetic field sensor, an amplifier, an integrator and a comparison circuit.
  • WO2012015012 discloses a magnetic sensor for use with paper currency.
  • the paper currency is transported through a gradient magnetic field with a region of high magnetic field strength such that an AMR element is provided between the paper currency and a first magnet.
  • Japanese Unexamined Patent Application Publication No. 2010-223862 illustrates a magnetism detecting device that includes an integrating circuit and a differential amplifier circuit.
  • the integrating circuit carries out processing of integrating an output voltage of a resistive voltage divider circuit, which is a series circuit of a magnetoresistive element and a fixed resistive element, so as to output an offset component signal
  • the differential amplifier circuit carries out differential amplification processing of the output voltage of the resistive voltage divider circuit and the offset component signal.
  • magnetism detecting device that can achieve a high gain and can also detect magnetism without being affected by an offset voltage, and a banknote identifying apparatus that includes such a magnetism detecting device.
  • a magnetism detecting device of the present invention includes a magnetic sensor provided with a resistive voltage divider circuit that includes a magnetoresistive element and an amplifier circuit that amplifies an output signal of the magnetic sensor.
  • the amplifier circuit includes an alternating current amplifier circuit that subjects the output signal of the magnetic sensor to alternating current amplification, an integrating circuit that integrates an output signal of the alternating current amplifier circuit, and a differential amplifier circuit that subjects the output signal of the alternating current amplifier circuit and an output signal of the integrating circuit to differential amplification.
  • a weak change in a magnetic field can be detected without being affected by an offset voltage of the amplifier circuit.
  • a magnetic pattern or the like provided in an object to be identified can be detected with higher accuracy.
  • a banknote identifying apparatus of the present invention includes the above-described magnetism detecting device and a signal processing unit that recognizes information on a magnetic pattern provided in a medium on the basis of a magnetism detection result of the magnetism detecting device.
  • a magnetic pattern provided in a banknote can be identified with higher accuracy.
  • a weak change in a magnetic field can be detected without being affected by an offset voltage of the amplifier circuit, and a magnetic pattern provided in an object to be identified can be detected with higher accuracy.
  • a magnetic pattern provided in a banknote can be identified with higher accuracy.
  • FIG. 1 is a circuit diagram of a magnetism detecting device 101 according to a first embodiment of the present invention.
  • Fig. 1 is a circuit diagram of a magnetism detecting device 101 according to a first embodiment of the present invention.
  • the magnetism detecting device 101 includes a magnetic sensor 1, an alternating current amplifier circuit 20, an integrating circuit 30, and a differential amplifier circuit 40.
  • the magnetic sensor 1 includes a magnetoresistive element R1 and a fixed resistive element R2.
  • the magnetoresistive element R1 and the fixed resistive element R2 form a resistive voltage divider circuit.
  • a power supply voltage Vcc is inputted to the resistive voltage divider circuit, which is formed by the magnetoresistive element R1 and the fixed resistive element R2, and a divided voltage, serving as an output signal of the magnetic sensor 1, is outputted to the alternating current amplifier circuit 20.
  • the alternating current amplifier circuit 20 subjects the output signal of the magnetic sensor 1 to alternating current amplification at a predetermined gain and outputs the result to the integrating circuit 30 and the differential amplifier circuit 40.
  • the integrating circuit 30 integrates the output signal of the alternating current amplifier circuit 20 at a predetermined time constant and outputs the result to one of the input units of the differential amplifier circuit 40.
  • the differential amplifier circuit 40 subjects the output signal of the alternating current amplifier circuit 20 and the output signal of the integrating circuit 30 to differential amplification at a predetermined gain.
  • An output of the differential amplifier circuit 40 serves as an output signal of the magnetism detecting device 101.
  • the alternating current amplifier circuit 20 includes an operational amplifier OP21.
  • the output signal of the magnetic sensor 1 is inputted to an inverting input terminal of the operational amplifier OP21 through a capacitor C21 and a resistor R21.
  • a parallel circuit formed by a capacitor C23 and a resistor R23 is connected between an output terminal and the inverting input terminal of the operational amplifier OP21.
  • a reference voltage Vr outputted from a reference voltage source 5 is inputted to a non-inverting input terminal of the operational amplifier OP21 through a resistor R22.
  • a capacitor C24 serving as a bypass capacitor is connected between a connection line of a power supply voltage Vcc of the operational amplifier OP21 and a ground.
  • the integrating circuit 30 includes an operational amplifier OP31.
  • the output signal of the alternating current amplifier circuit 20 is inputted to an inverting input terminal of the operational amplifier OP31 through a resistor R31.
  • a parallel circuit formed by a capacitor C33 and a resistor R33 is connected between an output terminal and the inverting input terminal of the operational amplifier OP31.
  • the reference voltage Vr outputted from the reference voltage source 5 is inputted to a non-inverting input terminal of the operational amplifier OP31.
  • the resistor R33 is a feedback resistor.
  • a theoretical integrating circuit does not include the resistor R33 illustrated in Fig. 1 .
  • the gain is infinite in a low frequency band.
  • the gain is finite in the low frequency band of the operational amplifier OP31, and thus the resistor R33 serving as a feedback resistor is necessary.
  • the resistance value of the resistor R33 may be set as appropriate, as there is an influence of an offset voltage of the operational amplifier OP31, if the resistance value of the resistor R33 is set to a high value, a signal amplitude becomes larger than the dynamic range of the operational amplifier OP31 and the output signal becomes saturated. Therefore, the resistance value of the resistor R33 is set while a cutoff frequency of a high pass filter that is formed by the capacitor C33 and the resistor R33 and the offset voltage of the operational amplifier OP31 described above are taken into consideration.
  • the differential amplifier circuit 40 includes an operational amplifier OP41.
  • the output signal of the alternating current amplifier circuit 20 is inputted to an inverting input terminal of the operational amplifier OP41 through a resistor R41.
  • a parallel circuit formed by a capacitor C43 and a resistor R43 is connected between an output terminal and the inverting input terminal of the operational amplifier OP41.
  • a resistor R42 is connected between a non-inverting input terminal of the operational amplifier OP41 and the reference voltage source 5.
  • a resistor R44 is connected between the non-inverting input terminal of the operational amplifier OP41 and an output unit of the integrating circuit 30.
  • Values of the elements and voltages in the circuits illustrated Fig. 1 are, for example, as follows.
  • Fig. 2(A) illustrates frequency characteristics of the gain of the magnetism detecting device 101 illustrated in Fig. 1 .
  • Fig. 2(B) illustrates frequency characteristics of the gain obtained when the capacitance value of the capacitor C21 in the magnetism detecting device 101 illustrated in Fig. 1 has been changed, which will be described later.
  • a characteristic curve A represents frequency characteristics between the input and the output of the alternating current amplifier circuit 20.
  • a characteristic curve I represents frequency characteristics between the input unit of the alternating current amplifier circuit 20 (the output unit of the magnetic sensor 1) and the output unit of the integrating circuit 30, or in other words, represents combined frequency characteristics of the alternating current amplifier circuit 20 and the integrating circuit 30.
  • a characteristic curve D represents frequency characteristics between the input unit of the alternating current amplifier circuit 20 (the output unit of the magnetic sensor 1) and the output unit of the differential amplifier circuit 40, or in other words, represents combined frequency characteristics of the alternating current amplifier circuit 20, the integrating circuit 30, and the differential amplifier circuit 40.
  • the gain of the alternating current amplifier circuit 20 is determined by a ratio of the resistance value of the resistor R23 to the resistance value of the resistor R21. As illustrated in Fig. 2(A) , the gain of the alternating current amplifier circuit 20 is set to 100 (40 dB).
  • the alternating current amplifier circuit 20 has band transmission characteristics, and a low pass side corner frequency (a cutoff frequency of a high pass filter) is determined by the product (time constant) of the capacitance value of the capacitor C21 and the resistance value of the resistor R21.
  • a high pass side corner frequency (a cutoff frequency of a low pass filter) is determined by the product (time constant) of the capacitance value of the capacitor C23 and the resistance value of the resistor R23.
  • the gain of the integrating circuit 30 is determined by a ratio of the resistance value of the resistor R33 to the resistance value of the resistor R31. As illustrated in Fig. 2(A) , the gain of the integrating circuit 30 is set to 10 (20 dB).
  • the integrating circuit 30 has low band transmission characteristics, and a corner frequency (a cutoff frequency) is determined by the product (time constant) of the capacitance value of the capacitor C33 and the resistance value of the resistor R33.
  • the differential amplifier circuit 40 subjects the output signal of the alternating current amplifier circuit 20 and the output signal of the integrating circuit 30 to differential amplification, and the gain thereof is determined by a ratio of the resistance value of the resistor R43 to the resistance value of the resistor R41. It should be noted that the capacitor C43 is provided so as to remove high frequency noise.
  • the resistance value of the resistor R21 is equal to the resistance value of the resistor R31, which in turn is equal to 10 k ⁇
  • the capacitance value of the capacitor C21 is equal to the capacitance value of the capacitor C33, which in turn is equal to 22 ⁇ F.
  • the time constant for determining the low pass side corner frequency of the alternating current amplifier circuit 20 matches the time constant for determining the corner frequency of the integrating circuit 30. Therefore, the frequency characteristics of the magnetism detecting device 101 as a whole are flat in a broad band ranging from 0.1 Hz to 10 kHz, as indicated by the characteristic curve D.
  • the resistance value of the resistor R21 is equal to the resistance value of the resistor R31, which in turn is equal to 10 k ⁇ ; the capacitance value of the capacitor C21 is equal to 2.2 ⁇ F; and the capacitance value of the capacitor C23 is equal to 22 ⁇ F.
  • the low pass side corner frequency of the alternating current amplifier circuit 20 does not match the corner frequency of the integrating circuit 30, and the frequency characteristics of the magnetism detecting device 101 as a whole meander as indicated by the characteristic curve D.
  • the output voltage of the integrating circuit 30 matches the offset voltage generated in the alternating current amplifier circuit 20. Therefore, by amplifying a differential voltage between the output voltage of the alternating current amplifier circuit 20 and the output voltage of the integrating circuit 30 in the differential amplifier circuit 40, a magnetism detection signal without an offset voltage can be obtained.
  • Fig. 3(A) is a waveform diagram of an input signal to the alternating current amplifier circuit 20 in the magnetism detecting device 101 illustrated in Fig. 1 .
  • Fig. 3(B) is a waveform diagram of output signals of the alternating current amplifier circuit 20 and the integrating circuit 30 in the magnetism detecting device 101 illustrated in Fig. 1 .
  • Fig. 3(C) is a waveform diagram of an output signal of the differential amplifier circuit 40 in the magnetism detecting device 101 illustrated in Fig. 1 .
  • the input signal to the alternating current amplifier circuit 20 is a 2 V to 2.002 V rectangular wave.
  • a waveform A represents an output voltage waveform of the alternating current amplifier circuit 20
  • a waveform I represents an output voltage waveform of the integrating circuit 30. While the waveform A, which is the output voltage waveform of the alternating current amplifier circuit 20, is initially a 2 V to 1.8 V rectangular wave (center voltage thereof is 1.9 V), the center voltage gradually rises due to an influence of the capacitor C21 provided at the input unit. In other words, the charging voltage of the capacitor C21 is 0 V at the beginning, and the capacitor C21 is gradually charged.
  • the center voltage of the waveform A which is the output voltage waveform of the alternating current amplifier circuit 20 rises as the charging of the capacitor C21 progresses, and the voltage of the inverting input terminal of the operational amplifier OP21 approaches the reference voltage Vr (2 V).
  • the offset voltage to be superimposed on the output voltage of the alternating current amplifier circuit 20 changes gradually from 0.1 V to 0 V.
  • the waveform I which is the output voltage waveform of the integrating circuit 30, is obtained by integrating the output voltage of the alternating current amplifier circuit 20 with the reference voltage Vr (2 V) serving as the center voltage.
  • the output voltage waveform I of the integrating circuit 30 takes a waveform that represents a voltage corresponding to the offset voltage to be superimposed on the output voltage of the alternating current amplifier circuit 20.
  • the stated voltage starts from 2 V and gradually approaches 2.1 V.
  • the differential amplifier circuit 40 subjects the output signal of the alternating current amplifier circuit 20 and the output signal of the integrating circuit 30 to differential amplification at a predetermined gain, and thus the waveform of the output signal of the differential amplifier circuit 40 becomes a 2 V to 2.2 V rectangular wave, as illustrated in Fig. 3 (C) .
  • the offset voltage generated through a change in the charging voltage of the capacitor C21 is canceled out, and thus a stable magnetism detection signal can be obtained constantly.
  • the capacitor C21 at the input unit of the alternating current amplifier circuit 20 is removed to form a direct current amplifier circuit and the amplifier circuit of the magnetism detecting device is constituted only by the aforementioned direct current amplifier circuit, an offset voltage due to a capacitor is not generated.
  • the amplifier circuit is operated so as not to exceed the dynamic range of the amplifier circuit by the operational amplifier, and thus a high gain cannot be obtained.
  • a temperature drift is also amplified, and thus good temperature characteristics cannot be obtained.
  • Fig. 4 is a circuit configuration diagram of a banknote identifying apparatus 201 according to a second embodiment of the present invention.
  • the banknote identifying apparatus 201 includes a magnetism detecting device 101A, an AD converter 31, and a signal processing unit 32.
  • the magnetism detecting device 101A includes plurality of magnetic sensors (not illustrated) that are arrayed in columns, and the banknote identifying apparatus 201 amplifies an output of each of the magnetic sensors to thus output a magnetism detection result.
  • the magnetism detecting device 101A includes a plural groups of the magnetism detecting devices 101 described in the first embodiment.
  • the AD converter 31 coverts an output signal of the magnetism detecting device 101A to digital data, and the signal processing unit 32 successively reads the digital data in chronological order so as to recognize information on a magnetic pattern provided in a medium.
  • a multiplexer may be provided at an input unit of the single AD converter, and an output of each of the magnetism detecting devices may be inputted to the AD converter at time division through the multiplexer.
  • Fig. 5 is a circuit diagram of a magnetism detecting device 102 according to a third embodiment of the present invention.
  • the magnetism detecting device 102 includes a magnetic sensor 1, alternating current amplifier circuits 20A and 20B, integrating circuits 30A and 30B, and differential amplifier circuits 40A and 40B.
  • the magnetism detecting device 102 is formed by connecting two stages of the circuit configuration of the magnetism detecting device 101 according to the first embodiment. It should be noted that the resistance value of a resistor R23 in the alternating current amplifier circuit 20B of the second stage is 330 k ⁇ , and the gain of the alternating current amplifier circuit 20B is 33.
  • the resistance value of a resistor R43 in the differential amplifier circuit 40B of the second stage is 22 k ⁇ , and the gain of the differential amplifier circuit 40B is 2.2. It should be noted that, in the differential amplifier circuit 40B of the second stage, the resistance value of a resistor R42 is 22 k ⁇ ; the resistance value of a resistor R44 is 33 k ⁇ ; and the capacitance value of a capacitor C43 is 470 pF.
  • the differential amplifier circuit 40B of the second stage is configured such that an intermediate voltage Vo (2.5 V) is applied to an inverting input terminal of an operational amplifier OP41 through a resistor R45.
  • Fig. 6(A) is a plan view illustrating an example of a magnetic pattern provided in a medium, in which a more densely illustrated portion indicates a portion with more intense magnetism.
  • Fig. 6(B) is a waveform diagram of an output voltage of the magnetism detecting device 102 obtained when the medium provided with the magnetic pattern illustrated in Fig. 6(A) is moved therethrough.
  • pulses occurring at times 30 ms, 50-60 ms, and 80 ms correspond to portions with steep changes in the density of the magnetic ink at the leading end, at the middle, and at the trailing end of the magnetic pattern.
  • a magnetism detecting device of an existing technique is prepared.
  • a circuit diagram and a waveform diagram are illustrated.
  • Fig. 7 is a circuit diagram of a magnetism detecting device according to the comparative example.
  • the magnetism detecting device according to the comparative example is constituted only by the magnetic sensor 1 and the alternating current amplifier circuit 20 provided in the magnetism detecting device 101 according to the first embodiment.
  • Fig. 8 is a waveform diagram of an output voltage of the magnetism detecting device according to the comparative example.
  • Fig. 8 illustrates a waveform diagram of an output voltage of the magnetism detecting device according to the comparative example obtained when a medium provided with a magnetic pattern identical to the example of the magnetic pattern illustrated in Fig. 6(A) is moved therethrough.
  • the magnetism detecting device is constituted only by the magnetic sensor 1 and the alternating current amplifier circuit 20
  • the offset voltage varies as the capacitor C21 is charged, as indicated by arrows pointing up to the right in Fig. 8 .
  • a stable magnetism detection signal that stays free from an influence of the offset voltage can be obtained constantly.
  • the magnetoresistive element R1 is provided at a high side of the magnetic sensor 1 and the fixed resistive element R2 is provided at a low side in the example illustrated in Fig. 1 and so on.
  • a fixed resistive element may be provided at a high side, and a magnetoresistive element may be provided at a low side.
  • the fixed resistive element may simply be a resistive element, the use of a magnetoresistive element with a small change in the resistance value in response to a magnetic change as a fixed resistive element makes it possible to substantially eliminate the temperature dependence of the magnetic sensor.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measuring Magnetic Variables (AREA)
  • Inspection Of Paper Currency And Valuable Securities (AREA)
  • Hall/Mr Elements (AREA)
  • Investigating Or Analyzing Materials By The Use Of Magnetic Means (AREA)
EP13772401.9A 2012-04-04 2013-03-21 Magnetic sensing device and bill validator Active EP2835660B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012085472 2012-04-04
PCT/JP2013/058001 WO2013150896A1 (ja) 2012-04-04 2013-03-21 磁気検出装置および紙幣識別装置

Publications (3)

Publication Number Publication Date
EP2835660A1 EP2835660A1 (en) 2015-02-11
EP2835660A4 EP2835660A4 (en) 2016-01-06
EP2835660B1 true EP2835660B1 (en) 2017-11-29

Family

ID=49300389

Family Applications (1)

Application Number Title Priority Date Filing Date
EP13772401.9A Active EP2835660B1 (en) 2012-04-04 2013-03-21 Magnetic sensing device and bill validator

Country Status (5)

Country Link
EP (1) EP2835660B1 (ko)
JP (1) JP5930024B2 (ko)
KR (1) KR101614102B1 (ko)
CN (1) CN104169734B (ko)
WO (1) WO2013150896A1 (ko)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103760505B (zh) * 2014-02-14 2017-06-06 太原理工大学 一种双差式低噪声微弱磁信号采集处理装置
JP6454228B2 (ja) * 2015-06-09 2019-01-16 株式会社ヴィーネックス 磁気センサ装置
CN110706398A (zh) * 2018-06-22 2020-01-17 厦门临泰微科技有限公司 一种兼容世界各国货币（纸币）磁性信号识别电路模块
CN112748337B (zh) * 2019-10-31 2023-08-04 北京小米移动软件有限公司 电子设备、控制电子设备内马达的方法和装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0138485Y2 (ko) * 1980-03-20 1989-11-17
JP3248832B2 (ja) * 1995-08-31 2002-01-21 三菱電機株式会社 センサ回路
JPH1090742A (ja) * 1996-09-10 1998-04-10 Nikon Corp ブレ検出回路
JP4211074B2 (ja) * 1998-01-14 2009-01-21 パナソニック株式会社 磁気信号検出装置
JP2000055998A (ja) * 1998-08-05 2000-02-25 Tdk Corp 磁気センサ装置および電流センサ装置
WO2005083457A1 (ja) * 2004-02-27 2005-09-09 Murata Manufacturing Co., Ltd. 長尺型磁気センサ
WO2006120825A1 (ja) * 2005-05-02 2006-11-16 Nidec Sankyo Corporation 磁気センサおよび紙葉類識別装置
JP4890891B2 (ja) * 2006-03-10 2012-03-07 山梨日本電気株式会社 磁気センサ、その製造方法および電子機器
WO2007135788A1 (ja) * 2006-05-23 2007-11-29 Alps Electric Co., Ltd. 磁気センサ及びこれを備えた磁気式エンコーダ
JP4798191B2 (ja) * 2008-09-02 2011-10-19 株式会社村田製作所 磁気センサ装置
JP2010223862A (ja) * 2009-03-25 2010-10-07 Murata Mfg Co Ltd 磁気センサ
CN101976475A (zh) * 2010-06-08 2011-02-16 北京新岸线软件科技有限公司 一种纸币识别方法和装置
KR101376987B1 (ko) * 2010-07-30 2014-03-25 미쓰비시덴키 가부시키가이샤 자기 센서 장치
CN102096962A (zh) * 2010-12-23 2011-06-15 北京新岸线软件科技有限公司 一种纸币检测方法及装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Also Published As

Publication number Publication date
EP2835660A1 (en) 2015-02-11
KR20140137386A (ko) 2014-12-02
CN104169734A (zh) 2014-11-26
WO2013150896A1 (ja) 2013-10-10
JP5930024B2 (ja) 2016-06-08
EP2835660A4 (en) 2016-01-06
CN104169734B (zh) 2017-03-22
KR101614102B1 (ko) 2016-04-20
JPWO2013150896A1 (ja) 2015-12-17

Similar Documents

Publication Publication Date Title
EP2835660B1 (en) Magnetic sensing device and bill validator
CN103858014B (zh) 用于自平衡电容器电桥的读出电路
KR20030072219A (ko) 자기검출기
EP0435233B1 (en) Displacement sensing circuit less influenced by external noises
EP2180329B1 (en) Magnetic sensor apparatus
CN107340488B (zh) 一种多点多载波校正系统及校正方法
EP1156583A2 (en) Amplification circuit for electric charge type sensor
JP4697498B2 (ja) 磁気センサ装置
JP2010223862A (ja) 磁気センサ
CN104685331B (zh) 用于位于内燃机中的压电传感器的经改进的测量放大器电路
EP3309570B1 (en) Magnetic sensor device
CN204965576U (zh) 用于钞票厚度的霍尔式检测装置
WO2015083604A1 (ja) 信号増幅装置及びセンサー装置
JP6718284B2 (ja) 信号処理回路、クーロンカウンタ回路、電子機器
CN112005201A (zh) 触控感应电路、触控面板、触控装置及触控方法
JP5311125B2 (ja) 静電容量式障害物センサ及び当該障害物センサを備えた車両の開閉システム
JP2006292488A (ja) 温度分布測定装置
WO2021214425A1 (en) Force sensing systems
WO2013129214A1 (ja) 磁気検出装置
KR20140126472A (ko) 금융기기 노이즈 제어 장치 및 방법
CN105069894A (zh) 用于钞票厚度的霍尔式检测装置
WO2018105360A1 (ja) 磁気検出装置
US20230117076A1 (en) Dust sensor
JP5417949B2 (ja) 磁気センサおよび磁気検出方法
JP2002277441A (ja) メタルスレッド検出装置及び該検出装置を備えた紙幣計数機

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20140910

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

DAX Request for extension of the european patent (deleted)
RA4 Supplementary search report drawn up and despatched (corrected)

Effective date: 20151207

RIC1 Information provided on ipc code assigned before grant

Ipc: G07D 7/04 20160101ALI20151130BHEP

Ipc: G01R 33/09 20060101AFI20151130BHEP

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

INTG Intention to grant announced

Effective date: 20170613

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 950884

Country of ref document: AT

Kind code of ref document: T

Effective date: 20171215

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602013030134

Country of ref document: DE

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20171129

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 950884

Country of ref document: AT

Kind code of ref document: T

Effective date: 20171129

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20180228

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20180301

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20180228

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602013030134

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

26N No opposition filed

Effective date: 20180830

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20180321

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20180331

REG Reference to a national code

Ref country code: IE

Ref legal event code: MM4A

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180321

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180321

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180331

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180331

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180321

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180331

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180331

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180321

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20130321

Ref country code: MK

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20171129

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20171129

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20180329

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20240320

Year of fee payment: 12