EP2636062A2 - Module à semi-conducteurs de puissance et procédé de fabrication d'un module à semi-conducteurs de puissance fritté comportant une sonde de température - Google Patents

Module à semi-conducteurs de puissance et procédé de fabrication d'un module à semi-conducteurs de puissance fritté comportant une sonde de température

Info

Publication number
EP2636062A2
EP2636062A2 EP11810558.4A EP11810558A EP2636062A2 EP 2636062 A2 EP2636062 A2 EP 2636062A2 EP 11810558 A EP11810558 A EP 11810558A EP 2636062 A2 EP2636062 A2 EP 2636062A2
Authority
EP
European Patent Office
Prior art keywords
temperature sensor
sintering
sintered
power semiconductor
electrical contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP11810558.4A
Other languages
German (de)
English (en)
Inventor
Ronald Eisele
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Danfoss Silicon Power GmbH
Original Assignee
Danfoss Silicon Power GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=45497593&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=EP2636062(A2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Danfoss Silicon Power GmbH filed Critical Danfoss Silicon Power GmbH
Publication of EP2636062A2 publication Critical patent/EP2636062A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N15/00Thermoelectric devices without a junction of dissimilar materials; Thermomagnetic devices, e.g. using the Nernst-Ettingshausen effect
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01KMEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
    • G01K7/00Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements
    • G01K7/16Measuring temperature based on the use of electric or magnetic elements directly sensitive to heat ; Power supply therefor, e.g. using thermoelectric elements using resistive elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00Arrangements for thermal protection or thermal control
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69Insulating materials thereof
    • H10W70/692Ceramics or glasses
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07531Techniques
    • H10W72/07532Compression bonding, e.g. thermocompression bonding
    • H10W72/07533Ultrasonic bonding, e.g. thermosonic bonding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/547Dispositions of multiple bond wires
    • H10W72/5475Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/926Multiple bond pads having different sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Definitions

  • the invention relates to a power semiconductor module, which consists of a common arrangement of sinterable components such as semiconductors, temperature probes, series resistors for a chip, resistors and capacitance elements, shunt resistors in particular on existing power conductors according to the preamble of the main claim and a method for producing a sintered such module with temperature sensor.
  • the aim is to obtain a method for producing a sintered power semiconductor module by jointly sintering a passive component with an active component.
  • circuit breakers which are attached to a base plate or heat sink via an intermediate substrate. Internal connections are realized with so-called bonding wires.
  • a plastic housing accommodates connections that connect the module to outside leads.
  • power modules also usually consist of at least one semiconductor (transistor, diode or comparable elements).
  • the power inductor (s) are preferably joined by sintering silver layers onto a substrate.
  • Such a low-temperature compound is mentioned in DE 10 2008 035 93 AI as an alternative.
  • the substrate can be embodied here as a metallic stamped grid with a partial plastic coating or as a ceramic printed circuit board with one- or two-sided metal coverings for current and heat transport.
  • other passive components such as
  • Predominant designs here are the surface mounted SMD components (surface mounted devices), which can be bonded to the substrate as well as soldered.
  • the geometries of these passive components are adapted to these production techniques and preferably use the meniscus formation of the bonding adhesive (conductive adhesive) or the soft solder for electrical contact formation and mechanical fixation.
  • the components are usually cylindrical, but at least provided with undercuts, which can lead to damage or destruction during the pressing process of sintering.
  • the contacts of the SMD components are generally metallizations on the two end caps, each circumferential. A thermally contacting and at the same time potential-free installation is not possible.
  • a relatively thick conductor track layer is present, which are separated in conventional SMD components by an (etching) trench of the active device.
  • the trenches of the power conductor tracks typically have a width of about 60 ⁇ to ⁇ and partially over it.
  • the thickness 380 ⁇ also a trench width of at least 380 ⁇ to 600 ⁇ .
  • SMD components require separate island pads within the surfaces of the power traces. This reduces the required current carrying cross-section and the cherriessp Dahlphenol, since the heat flow is stopped at the etch trench. An additional, cost-intensive substrate area is required.
  • the islanding of the highly conductive conductor in the printed conductor layout represents additional thermal insulation and unduly reduces the response speed and the desired parallel operation of the measured temperature with the transistor temperature.
  • a temperature sensor e.g. to place one with a temperature sensitive platinum metal resistor.
  • a temperature limit e.g. 180 ° C
  • the semiconductor in operation is acutely threatened by overheating and may lose its function.
  • the controlled current through the semiconductor is typically reduced to avoid thermal damage.
  • the correct determination of the temperature limit by the temperature sensor therefore depends on three boundary conditions:
  • the temperature sensor must be mounted as close as possible to the semiconductor and
  • a ceramic layer or ceramic disc carries the temperature sensor (e.g.
  • Ceramics offer the best thermal conductivity among the known electrical insulating materials.
  • So z. B. aluminum oxide (A1 2 0 3 ) has a thermal conductivity of about 36-39 W / mK and aluminum nitride (A1N) even a thermal conductivity of about 180-220 W / mK.
  • these insulating materials are not only high-voltage as ceramic, but also much more thermally conductive than organic carrier and thus preferably used as a carrier of the Pt resistor with sintered layer.
  • planar components in which at least the underside intended for sintering is plane, at least partially metallised typically NiAu,
  • NiPdAu, AgPd, AuPd or Ag and conductively connected to the wiring surface by means of a sintered layer can be arranged in the same manner. It is already possible to lead out only one electrical functional contact on the surface opposite the sintered surface as a metallic contact surface. The always required second electrical functional contact is then produced by the sinterable underside (or a part of the underside) of the component to the interconnect substrate.
  • the top-side contacting takes place here, for example, by wire bonding or soldering or sintering or pressure contacting.
  • both electrical function contacts are kept floating relative to the sintered surface and placed on the top of the device (this is the sintering surface opposite side)
  • an electrical contact can be made, in turn, by selectively wire bonding, soldering, sintering or pressure contacting or ultrasonic welding is realized.
  • the contacting is also on laterally provided at the edge of the top contacts in question.
  • This arrangement consists of the two upper functional contacts and the functional surface between the contacts and an electrically insulating carrier material (ceramic, single crystals such as sapphire or silicon). It gives e.g. following layers construction from top to bottom of a resistance of the cuboid:
  • DCB ceramic core circuit boards
  • IMS metal core circuit boards
  • organic circuit carriers for example epoxy resin core or polyimide core printed circuit boards
  • the passive components have resistive, capacitive, inductive or temperature-resistive properties. These can be realized in special layers or layer sequences on insulating carrier materials (eg metallic layers for resistance formation (Ni, Pt) or as a function in one volume (eg oxide metallic bodies with thermo-resistive properties, thermistor, NTC, PTC or resistive platinum metal resistor) For suitability as a sinterable, passive component, therefore, the geometric design must be designed as a potential-free arrangement (both function contacts above). Further features and advantages of the invention will become apparent from preferred embodiment with reference to the accompanying drawings.
  • insulating carrier materials eg metallic layers for resistance formation (Ni, Pt) or as a function in one volume (eg oxide metallic bodies with thermo-resistive properties, thermistor, NTC, PTC or resistive platinum metal resistor)
  • Figure 4 shows an embodiment of the invention, in which a double
  • Bondpad is located on the top.
  • the placement of such devices on the substrate can be done according to various criteria. For the best possible temperature measurement of the junction temperature with an external sensor, the shortest possible heat path between the semiconductor and the temperature sensor should be found:
  • the temperature sensor may be e.g. Pt type sensor (e.g., Pt-100) consisting of a ceramic substrate with sinterable metallization at the bottom, a platinum functional layer and two contact surfaces at the top.
  • Pt type sensor e.g., Pt-100
  • NTC thermistor type
  • sinterable metallization at the bottom, for example a ceramic insulation layer.
  • a thermistor or NTC is a highly non-linear temperature sensor made up of temperature-variable resistive oxides. This is currently delivered but not insulating on a ceramic. Nevertheless, this variant of a thermistor should be within the scope of the appended claims.
  • thermocouples are known, which work as temperature sensors especially after the Seebeck effect (English: thermo couple). These are also not available with insulating ceramic layer. Alternatively, a placement of the temperature sensor on the semiconductor can take place. This ensures a very short thermal path between the semiconductor barrier and the temperature sensor. This very close thermal connection has advantages for the rapid detection of thermal overloads.
  • FIG. 1 the embodiment of a sinterable temperature sensor of the type Pt-1000 is exemplified. As explained above, this is a potential-free version with two electrical function contacts pointing upwards.
  • Sinterable metallization 10 typically NiAu, NiPdAu, AgPd, AuPd or Ag applied by chemical or physical methods
  • insulating ceramic body 12 eg A1 2 0 3
  • top center conductor tracks 14 made of Pt or alternatively Ni and two contact fields 16, 18 laterally for further electrical connection (eg wire bonding) from eg AgPd or AuPd.
  • FIG. 1 Sinterable metallization 10
  • NiAu typically NiPdAu, AgPd, AuPd or Ag applied by chemical or physical methods
  • insulating ceramic body 12 eg A1 2 0 3
  • top center conductor tracks 14 made of Pt or alternatively Ni and two contact fields 16, 18 laterally for further electrical connection (eg wire bonding) from eg AgPd or AuPd.
  • FIG. 2 shows, by way of example, a complete, sintered assembly consisting of a DCB substrate, a transistor and a temperature sensor 20 (as described in FIG. 1).
  • the module already has a contact wiring through bonding wires 24, which, however, is generated only after sintering.
  • the temperature sensor 20 in FIG. 2 is floating on the current-carrying conductor track 22 and in this way has a very good thermal contact due to the silver sintering and at the same time a high electrical insulation by the nonconducting conductor Ceramic body 12. The disadvantageous by additional space requirement and high thermal resistance generation of printed circuit islands for the temperature sensor is eliminated.
  • FIG. 3 a shows a general embodiment of a sinterable passive component. It is the solution according to case 1 in floating version with the electrical contacts 10, 32 respectively below and above, which occupy at least part of the surface.
  • the body 30 in the middle describes the functional volume, for example with the passive electrical functions:
  • Thermally sensitive resistor temperature sensor as NTC, PTC, Ptxx, Nixx
  • thermally insensitive metal alloy for example shunt made of a copper-manganese-nickel alloy
  • Sinterable metallization 10 typically NiAu, NiPdAu, AgPd, AuPd or Ag applied by chemical or physical methods
  • functional body 30 above a contact pad 32 covering all or part of the top and for further electrical connection (eg wire bonding) is intended, consisting of eg AgPd or AuPd.
  • FIG. 3b shows the option of stackable resistors for achieving multiples of the basic resistance.
  • the practical benefit would be the simple availability of e.g. Chip series resistors in stepped sizes.
  • Such chip resistors are e.g. used to influence the switching speed of MOSFET transistors by the size of the resistance value. Therefore, such a resulting scalability is an advantage of this technique and this design.
  • FIG. 4 shows a solution with the double bond pad on the upper side.
  • Sinterable metallization 10 typically NiAu, NiPdAu, AgPd, AuPd or Ag applied by means of chemical mixer or physical methods
  • functional body 30 above two contact fields 16, 18, separated by the surface of the contact body, partially cover the top and which is intended for further electrical connection (eg wire bonding), consisting of eg AgPd or AuPd.
  • Another embodiment of the invention may be the combination of a plurality of sinterable devices first on a common carrier substrate (e.g., ceramic).
  • a common carrier substrate e.g., ceramic
  • several components form a common electrical function, e.g. an R-C member for a limiter function of voltage spikes.
  • the components on the top side of the carrier substrate are then connected by conductor tracks.
  • the support substrate additionally has metallized surfaces for bonding and soldering, e.g. in the manner of a ceramic hybrid circuit.
  • the carrier substrate is then in turn sinterable metallized on the underside and is sintered as a whole with the interconnected components thereon to the substrate of the power assembly.
  • Such an assembly is also suitable for high temperatures by the choice of a sintered connection.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Thermistors And Varistors (AREA)
  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Die Bonding (AREA)

Abstract

L'invention concerne un procédé de fabrication de composants électriques frittables pour le frittage commun avec des composants actifs. Selon le procédé, les composants sous forme plane sont pourvus d'au moins un côté inférieur plan destiné au frittage, et une zone de contact électrique est présente sous forme de surface de contact métallique sur la surface opposée à la surface de frittage, pouvant être mise en contact sur le côté supérieur par un procédé courant du groupe: connexion des fils, soudage, frittage ou métallisation des trous. Le composant est une sonde de température dont la surface inférieure comporte une métallisation frittable sur un corps céramique, le corps céramique comportant deux surfaces de contact électriques pour la connexion électrique ultérieure.
EP11810558.4A 2010-11-05 2011-10-28 Module à semi-conducteurs de puissance et procédé de fabrication d'un module à semi-conducteurs de puissance fritté comportant une sonde de température Withdrawn EP2636062A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102010050315.0A DE102010050315C5 (de) 2010-11-05 2010-11-05 Verfahren zur Herstellung von gesinterten, elektrischen Baugruppen und damit hergestellte Leistungshalbleitermodule
PCT/DE2011/001905 WO2012062274A2 (fr) 2010-11-05 2011-10-28 Module à semi-conducteurs de puissance et procédé de fabrication d'un module à semi-conducteurs de puissance fritté comportant une sonde de température

Publications (1)

Publication Number Publication Date
EP2636062A2 true EP2636062A2 (fr) 2013-09-11

Family

ID=45497593

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11810558.4A Withdrawn EP2636062A2 (fr) 2010-11-05 2011-10-28 Module à semi-conducteurs de puissance et procédé de fabrication d'un module à semi-conducteurs de puissance fritté comportant une sonde de température

Country Status (5)

Country Link
US (1) US9040338B2 (fr)
EP (1) EP2636062A2 (fr)
CN (1) CN103403862B (fr)
DE (1) DE102010050315C5 (fr)
WO (1) WO2012062274A2 (fr)

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DE102010050315C5 (de) 2014-12-04
US20130228890A1 (en) 2013-09-05
CN103403862A (zh) 2013-11-20
CN103403862B (zh) 2016-08-10
WO2012062274A2 (fr) 2012-05-18
DE102010050315A1 (de) 2012-05-10
DE102010050315B4 (de) 2012-05-31
WO2012062274A3 (fr) 2012-07-26
US9040338B2 (en) 2015-05-26

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