EP2964004A2 - Agencement de composant electronique - Google Patents

Agencement de composant electronique Download PDF

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Publication number
EP2964004A2
EP2964004A2 EP15001912.3A EP15001912A EP2964004A2 EP 2964004 A2 EP2964004 A2 EP 2964004A2 EP 15001912 A EP15001912 A EP 15001912A EP 2964004 A2 EP2964004 A2 EP 2964004A2
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EP
European Patent Office
Prior art keywords
connecting element
power electronics
electronics module
electrically conductive
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP15001912.3A
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German (de)
English (en)
Other versions
EP2964004A3 (fr
Inventor
Michael Meisser
Thomas Blank
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Karlsruher Institut fuer Technologie KIT
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Karlsruher Institut fuer Technologie KIT
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Publication of EP2964004A2 publication Critical patent/EP2964004A2/fr
Publication of EP2964004A3 publication Critical patent/EP2964004A3/fr
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385—Assembly of a plurality of insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/645—Inductive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0233—Filters, inductors or a magnetic substance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/145—Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/042—Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07—Electric details
    • H05K2201/0776—Resistance and impedance
    • H05K2201/0792—Means against parasitic impedance; Means against eddy currents
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09036—Recesses or grooves in insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10015—Non-printed capacitor

Definitions

  • the invention relates to an electronic component arrangement with a power electronics module and a higher-level circuit carrier.
  • Power electronics modules with integrated electronic components are known from the prior art, which are constructed from a main substrate, a direct copper bond substrate, DCB substrate short, and soldered power semiconductor chips and an electrical connection structure. Such modules are used in particular in the field of electromobility, renewable energies and industrial automation.
  • previous power electronics modules have a comparatively low degree of integration, with gate drivers and DC link capacitors generally not being integrated into the modules.
  • the main substrate of the power electronics module is merely provided with coarse (900 ⁇ m pitch) structures that map the power circuit. Gate and source terminals of the power semiconductor chips are guided via bonding contacts on electrical connection structures, usually plug or screw connections.
  • connection systems which have a typical line length in the range of centimeters and a distance of several millimeters, such as in DE 10 191 585 B4 and Zheng, C., Y. Yiying, et al. "A 1200-V, 60-A SiC MOSFET Multichip Phase-Leg Modules for High-Temperature, High-Frequency Applications", IEEE Transactions on Power Electronics 29 (5), 2307-2320 (2014 ) is disclosed.
  • the large conductor spacing is also due to the limited reliable insulation by the potting compound sealing the module, usually a silicone potting compound, as well as its low mechanical strength. Without reducing the conductor pitch and inserting a layer with a large dielectric constant and a high dielectric strength, the parasitic inductance of the interconnect structure remains limited to values in the generally two-digit nanohenry range.
  • connection to the circuit carrier is made by a finger structure which breaks a previously created coplanar structure of the circuit board. Again, parasitic inductances arise.
  • a power supply is known that is formed on a substrate that is perpendicular to a main substrate and other power conductors to minimize magnetic coupling.
  • the substrate disposed normal to the main substrate ends just above the surface of the main substrate, with both metallizations of the vertical substrate not being routed down to the main substrate. Accordingly, this power supply is not suitable for the low-inductance supply of a power electronics module, since a return conductor is missing.
  • a power supply known which causes a located below the main substrate of the power electronics module conductive structure. In technical applications, this is always connected to the mass of the heat sink and, for reasons of electromagnetic compatibility, must not be connected to potentials from inside the module.
  • the US 5 031 069 A discloses a module frame which is formed circumferentially around a power electronics module.
  • the module frame is used as a layer capacitor, wherein one side of the layer capacitor is contacted on an inner side and the other side of the layer capacitor on an outer side via a module cover. An integration of other capacitors or other components is not possible.
  • the DE 69 414 337 T2 describes a coaxial connection structure between electronic component components, in which a plurality of power semiconductors are arranged in a circle. Since there is no continuous insulation, this arrangement of component components can lead to partial discharges.
  • a disadvantage of the aforementioned prior art is in particular that a high-frequency separation between the module and the outside world by high Induktellessbelag the electrical connection, in particular the DC power supply connection (DC bus) may occur. Also difficulties arise, low-inductive compounds coplanar over distances in the centimeter range and changing directions, such as 90 ° bends, to the To lead link capacitors when high voltages must be isolated and the module is to work at high operating frequency.
  • the modules have a large spatial extent due to separate, discrete components for power supply and energy storage and are thus large and unwieldy.
  • One embodiment relates to an electronic component arrangement with a power electronics module and a higher-level circuit carrier.
  • Power electronics module one or more electrically conductive layer (s), and the parent circuit carrier one or more electrically conductive layer (s) as a surface structure.
  • the power electronics module and the higher-level circuit carrier are electrically and mechanically connected to one another by at least one plate-shaped connecting element, wherein the at least one connecting element has one or more electrically conductive layer (s) as a surface structure that corresponds to the one or more electrically conductive layer (s).
  • the power electronics module and the one or more electrically conductive layer (s) of the parent circuit carrier is / are electrically connected.
  • the electrically conductive layers are electrically insulated from one another by at least one electrical insulator solid.
  • the higher-level circuit carrier can have any type of electronic components, in particular intermediate circuit capacitors or conductor structures, so that this component of the component arrangement can be flexibly equipped depending on the application.
  • a plate-shaped connecting element here means that one or more sections of the connecting element have a dimension normal to the longitudinal axis of the connecting structure, which is much smaller than a height and a width of the connecting structure.
  • the connecting element has a plurality of electrically conductive layers which are electrically insulated from each other.
  • a surface structure on the connecting element for optimal power supply and signal line can be realized.
  • a current conduction between stacked circuit carriers had to be made via plug contacts, which usually have large dimensions in comparison to the dimensions of the electronic components.
  • the inventive mechanical and electrical connection, in particular by the integration of capacitors in the connection structure requires less space on the module substrate, which can be used for further lines or for the connection of further components.
  • the connecting element has one or more layers of an organic or preferably ceramic substrate as insulator and / or dielectric, for example aluminum nitride, aluminum oxide or silicon nitride, etc.
  • plastics eg Kapton
  • fiber composites For example, FR4
  • These are electrically nonconductive, which means in the sense of the invention that the conductivity is below a certain very low threshold value, so that the total conductivity is close to zero.
  • the transition and the power supply between the power electronics module and the parent circuit carrier can be made thinner and more resilient. The distances between the components to each other can be reduced and allow greater integration, including other electronic components.
  • Both the power electronics module and the higher-level circuit carrier can each have at least one electrically non-conductive substrate material, as can the substrate material of the connecting element.
  • the connecting element in a further embodiment may consist of several parts, which may be mechanically and electrically connected to each other.
  • the parts can be arranged normal to a longitudinal axis of the connecting element and existing conductor structures on the power electronics module can be adjusted.
  • the connecting element can also have recesses which bridge predetermined areas, sections or structures, such as attached electronic components, on the power electronics module.
  • the exact arrangement and design of the connecting element are no limits.
  • the connecting element may preferably have a layer of an organic or ceramic substrate, which is provided with at least one electrically conductive layer.
  • the ceramic substrate can advantageously consist of a magnetically conductive material, preferably of MnZn or NiZn ferrite, and be partially covered or partially or completely encased with this magnetically conductive material.
  • the connection structure may serve as an output filter with at least one magnetic filter component. The integration of the output filter in the connection structure saves space and reduces the electromagnetic radiation.
  • the connecting element may comprise two or more layers of an organic or ceramic substrate, preferably layers of a ceramic substrate, wherein an electrically conductive layer, preferably a metal layer, is arranged between at least two of the two or more layers.
  • an electrically conductive layer preferably a metal layer
  • a multi-layer structure of the connecting element can also serve as an integrated capacitor, if the connecting element based on a ceramic substrate with thick-film technology alternately thin (10-150 microns) conductive and non-conductive layers, wherein the conductive layers connected to different electrical potentials can be. Due to the smaller distance between the electrically conductive layers to each other, a capacity is generated, which can be increased with each additional layer.
  • a multilayer structure of the connecting element is to be understood as a layer structure which comprises at least 2 electrically conductive layers with different electrical potentials, wherein in a preferred embodiment the number of layers is 2 to 200 and in a particularly preferred embodiment the number of layers is 4 to 50.
  • the connecting element thus not only represents the electrical connection of different potentials of the power electronics module with the higher-level circuit carrier. In addition, it combines at least parts of the necessary intermediate circuit capacitor. This saves space on the main substrate of the power electronics module and reduces the inductance of the connection structure.
  • thermal and mechanical stress cracks in the support structure of the connecting element can occur, which can lead to breakdowns.
  • Be flexible transitions eg from polymer compounds
  • these cracks can be avoided.
  • the connecting element may have one or more capacitors with a non-conductive surface which carries / carry the one or more electrically conductive layer (s). They can be stacked on top of each other, so that a support structure for the connecting element is formed by this structure, which can be electrically conductively connected to at least two electrically conductive layers of the connecting element.
  • the capacitors can be stacked with their flat side to each other or rotated 90 ° to each other and thus be arranged parallel or normal to a longitudinal axis of the connecting element.
  • roll capacitors or other capacitor structures may also be used, e.g. Multilayer capacitors, which may be connected in series or in parallel.
  • the at least one electrically conductive layer of the power electronics module or just arranged on a main substrate of the power electronics module electronic components can be completely or partially poured into a potting compound (eg epoxy resin, Silikonvergussmasse).
  • a potting compound eg epoxy resin, Silikonvergussmasse
  • a portion of the connecting element may protrude from the potting compound.
  • the substrate of the connecting element has one or more recesses of free shaping, which is arranged along a longitudinal direction of the power electronics module in the direction of the higher-level circuit carrier.
  • the connecting element thus be adapted to the geometry of the module.
  • the connecting element can also be permanently connected by gluing, soldering or pressing with the power electronics module. It can be provided recesses, recesses or openings in the substrate of the power electronics module, so that a second attachment portion of the connecting element can be accommodated.
  • the power electronics module may preferably have a main substrate, which is a planar ceramic substrate, wherein the electrically conductive layer is preferably a thick film layer, preferably made of a copper or silver paste.
  • the connector may comprise a substrate that is a planar ceramic substrate, wherein the two or more electrically conductive layers may preferably be thick film layers. Further insulation layers can be produced from the insulating pastes customary in thick-film technology. With this ceramic substrate can be the realize the aforementioned connection options easily.
  • the substrate may also consist of a DCB (direct copper bond) or AMB (active metal brazed) substrate.
  • the connecting element can be detachably connected to the higher-level circuit carrier by means of flexible connecting elements, such as spring devices or plug-in connections, or inseparably connected by gluing, soldering or pressing.
  • flexible connecting elements such as spring devices or plug-in connections, or inseparably connected by gluing, soldering or pressing.
  • the parent circuit carrier having an opening through which a first attachment portion of the connecting member projects and which is connected to the edges of the opening.
  • recesses, recesses in which the first attachment portion can be fitted, or other types of attachment can be made possible.
  • the connecting element can have at least one layer-free section at both ends. This serves to sufficiently isolate the layers from each other, forming a creepage distance of predetermined length.
  • the length of the creepage distance corresponds to the creepage distance necessary for secure electrical insulation in the respective surrounding medium, as a rule several millimeters.
  • this may have a frame which framed one or more of the components of the power electronics module and the higher-level circuit carrier or all components together.
  • the frame can have holding devices on its inner side facing the components to be framed, with which the power electronics module, the higher-level circuit carrier and the connecting element itself or one of the aforementioned components engage stand.
  • the holding devices may in particular be recesses or protrusions.
  • the plate-shaped connecting element is arranged with its normal to the normal of the power electronics module.
  • Fig.1 an electronic component 1 is shown, which is essentially constructed from a power electronics module 2 and a higher-level circuit carrier 3 .
  • the higher-level circuit carrier 3 is in Fig.1 arranged above the power electronics module 2 , wherein these two components are mechanically and electrically connected to a connecting element 6 with each other.
  • the power electronics module 2 has a main substrate 8 , which is structured on its upper side and its underside with electrically conductive layers 4 made of metal (for example, copper or a copper alloy).
  • the main substrate 8 of the power electronics module 2 is formed as a planar ceramic structure.
  • the conductive layers 4 form planar lead structures to different regions of the substrate 8.
  • various electronic components 9 are arranged, which are connected, inter alia, via wire-shaped leads 16 to the electrically conductive layer 4 or soldered directly to the layer 4 .
  • the power electronics module 2 is surrounded by a frame 11 which on the one hand serves to protect the substrate 8 and the components 9 and on the other hand to limit the power electronics module 2 and surround a potting compound 10 , which also serves to protect the sensitive electronic components 9 and the layer 4 ,
  • the higher-level circuit carrier 3 also has a substrate 12 and is provided on both sides with electrically conductive layers 5 made of metal. On these are - here on one Top side - further electrical or electronic components 9, for example. A DC link capacitor, arranged and contacted with the layers 5 in a corresponding manner. For the electrical connection of components or conductive structures on a lower side of the circuit carrier 3 , plated-through holes 18 are provided, which contact the layer 5 of the upper and lower sides of the substrate 12 through the substrate 12 .
  • the components power electronics module 2, parent circuit carrier 3 and connecting element 6 are interconnected mechanically via solder joints 17 . However, the components can also be glued or pressed together and thus be permanently connected to each other.
  • the layers 4 on the substrate 8 of the power electronics module 2 are connected by soldered seams 17 as solder joints or pressing with the conductive layers 7 of the connecting element 6 .
  • a thickness of the connecting element 6 is small (about 2-00-1000 microns) compared to a height (in about 5 mm - 20 mm) and a width (about 5 mm - 60 mm) thereof. This results in low parasitic inductances.
  • the connecting element 6 in Fig.1 has as support element a substrate 6a of a flat, electrically insulating ceramic material with double-sided electrically conductive layer 7 and thus forms a coplanar structure with high capacitive and minimized inductive component.
  • the connecting element 6 is arranged normal to the substrate 8 of the power electronics module 2 and connecting mechanically and electrically the module 2 with the parent System circuit carrier 3 by at least two different electric potentials, preferably + and - connecting, the power electronics module 2 with contacts 18 and the layers 5 of the parent circuit substrate. 3
  • the main substrate 8 has a depression or recess 15 into which a first fastening section 13 of the connecting element 6, ie here an uncoated, free lower end, is accommodated.
  • the substrate 6a of the connecting element 6 is here exposed, in order to allow a high rupture resistance during potting, gluing or soldering as well as age-related destruction of this compound.
  • an adhesive layer 19 is inserted, which produces an adhesive connection of the two substrates 8, 6a .
  • the Fig.2 shows in plan view a possible arrangement of a plurality of connecting elements 6, which are arranged at right angles to each other in the frame 11 . They are mechanically, for example, by gluing and electrically connected via solder joints 17 .
  • the frame 11 may laterally holding means 21 which position in the form of projections, recesses, projections or clamps, the connecting elements 6 within the frame and hold.
  • the electrically conductive layers 7 are contacted with each other with solder joints 17 and connected.
  • FIG 3 is an enlarged section of Fig.1 shown, wherein the substrate 6a of the connecting element 6 has an exemption around its edges of a free end in a second mounting portion 14 .
  • An uncoated creepage distance of a length c1 + c2 + c3 (individual sections c1, c2, c3) is formed, so that the layers 7 on both side surfaces of the connecting element 6 are electrically isolated from each other.
  • This creepage distance is important for the electrical rollover strength to be achieved and primarily dependent on the (ceramic) material of the substrate 6a of the connecting element 6 and its thickness c2.
  • the distance c1 + c2 + c3 is in a range of about 250 microns to about 15 mm long, and provides by the non-conductive substrate material 6a a sufficiently long creepage distance.
  • cross sections of the connecting element 6 wherein in 4a the simplest embodiment of a substrate 6a with two insulated electrically conductive layers 7 or even conductor layers is shown.
  • the layers 7 are formed only along a longitudinal side of the substrate 6a , but they may also be arranged around the edges of the substrate 6a .
  • a plurality of substrate layers are arranged 6d on the center substrate 6a having interposed conductive paths or electrically conductive layers. 7 These can usually be applied to the substrate 6a as thick-film structures.
  • FIG. 4c shows a substrate 6a as a support element in the middle of the illustration with an applied layer 7. Both are surrounded by a magnetically conductive jacket 22, preferably of MnZn or NiZn ferrite.
  • the jacket 22 can also be present in sections along the longitudinal axis of the connecting element 6 .
  • the substrate 6a can also consist of magnetically conductive material.
  • a substrate '6a has a cross section that differs from the previously shown, simply rectangular ones.
  • the cross section is freely selectable and can be the desired one Geometry can be easily adapted.
  • the cross section in Fig.4d is U-shaped, with the layers 7 arranged around the substrate 6a .
  • an arm of the U-shape is just long enough that it corresponds to a predetermined insulating distance a , so that there is sufficient insulation between the layers and applied components.
  • a capacitor 6 c is arranged at free ends of the U-shaped cross section and electrically connected by means of solder joints 17 with the layers 7 .
  • the capacitor 6c and the substrate 6a enclose a cavity which may be filled with a potting compound.
  • the connecting element 6 can also have a carrier structure which is constructed from one or more capacitors, in particular multi-layer plate capacitors.
  • the 5a to 5c show possible arrangements, wherein a capacitor structure 6b forms a support structure for the connecting element 6 .
  • the 5a shows a cross section of such a connecting element.
  • the capacitor structure 6b may be constructed of a ceramic material, such as low temperature fired ceramics (LTCC) or high temperature multilayer ceramics (HTCC) with metal spacers.
  • LTCC low temperature fired ceramics
  • HTCC high temperature multilayer ceramics
  • the production of multilayer ceramic capacitors is an industrial standard and can be cost-effective - ceramic capacitors of the corresponding voltage class can also be used cost-effectively as finished components. Further, the multilayer structure increases the capacity of the connection.
  • this connection structure can additionally act as a T-filter.
  • the layers 7 are applied to an outer shell of the capacitor structure 6b .
  • To 5a plates of the capacitor 6b are arranged parallel to a longitudinal axis of the connecting element 6 , wherein the conductivity of the structure is supported in the direction of an improved power supply line.
  • the connecting element 6 can be constructed from a combination between substrate 6a and capacitor structure 6b .
  • the latter forms an interdigital structure whose plates are present approximately parallel to the main substrate 8 of the power electronics module 2 . Due to the possible large number of plates, this structure detects an even lower inductance than the structure 5 b , on.
  • the capacitor structure is constructed of prefabricated, commercially available components.
  • a plurality of ceramic capacitors 6c are assembled to the capacitor structure 6b .
  • the connections are electrically connected, possibly via additional electrical conductors, both to the layers 4 of the main substrate 8 and to the layers 5 of the higher-level circuit carrier 3 .
  • the electrical and mechanical connection between the capacitors 6c and the layers 4, 5 can be made via a solder seam 17 .
  • the spaces between the individual capacitors 6c and the capacitors 6c and the main substrate 8 are encapsulated by means of an adhesive 19 of an organic material, such as an epoxy resin.
  • the capacitors 6c, as in 4c be shown, parallel or along the longitudinal axis of the connecting element 6 or normal to be arranged.
  • the space requirement of these additional components can be optimized be, whereby the integration density of the power electronics module 2 is increased.
  • the connecting element 6 may be mechanically and electrically connected to the components of the component assembly 1 via detachable and non-detachable electrical or electromechanical connections, in particular by soldering, the so-called press-fit or by means of press-fit contacts.
  • 6a to 6e show different embodiments of a compound or fasteners of connecting element 6 and power electronics module 2 ( 6a and 6b ). Possible connections between connecting element 6 and the higher-level circuit carrier 3 are in Fig.7a to 7e shown.
  • the substrate 8 of the power electronics module 2 have no recess, but only have a region without position.
  • the layer 7 is provided with a chamfer 24 at the first attachment section 13 and the layer 7 is connected to the layer 4 of the power electronics module 2 via a supply line 23 .
  • the supply line 23 may also be soldered to the layer 7 and the layer 4 is not detachable or designed as a resilient element between the layers.
  • the chamfer 24 can be made by cutting processes or - in the case of thick layers - by stepwise, layered application.
  • the main substrate 8 may be provided with a recess 24a .
  • the first attachment portion 13 can after Figure 6b also be formed as a foot 25, leading to a surface of the Substrate 8 is widened.
  • the layers 7 follow the outer contours of the foot 25 and are electrically connected via solder seams 17 with the surface layers 4 of the substrate. In this way, a gap in the main substrate 8 is avoided while still maintaining the necessary distance between the various electrical potentials.
  • the foot 25 may have unilateral bevels or else steps in further embodiments.
  • fasteners of connecting element 6 with superordinate circuit carrier 3 are provided depending on the adhesive or solder used as insoluble compounds.
  • Detachable connections are possible as an interference fit (press-fit) or plug-in contacts, such as in accordance with 7a .
  • the formation of an etched finger structure of the substrate 6a is advantageous.
  • bevels 26 are provided on the sheets 7 to more easily guide the connecting member 6 into the opening 3a.
  • the Figure 7b shows a detachable plug connection.
  • a two-part spring device For fastening a two-part spring device is provided, wherein a first spring 27a fixed to the parent circuit carrier 3 and a second spring 27b is fixedly connected to the connecting element 6 . If so required, the connection between higher-level circuit carrier 3 and connecting element 6 that can be produced can be achieved and allows a defective component of electronic component arrangement 1 to be replaced.
  • Fig.7d and Fig.7e Attachments are shown that do without a breakthrough or an opening in the parent circuit board 3 .
  • the substrate 6a of the connecting element 6 is formed as a foot 28 in both figures.
  • the foot is simply rectangular and forms with its front side a large contact surface on the parent circuit carrier 3.
  • the layers 7 are spaced apart and leave at the front side of the foot 28 a layer-free section (isolation distance 29) free, which serves as a creepage distance.
  • the foot is T-shaped, whereby a high insulation distance 29 is achieved in the area between higher-level circuit carrier 3 and the layers 7 .
  • a connecting element 6 can, like the Figure 8 represents not only be designed as a simple planar structure, but meet different requirements, with a recess 30 can serve to bridge sections or areas with traces or other components on the main substrate 8 of the power electronics module.
  • the recess 30 is substantially rectangular, but may be arbitrarily shaped, whereby parasitic inductances are minimized by the double-sided metallization, ie the electrically conductive layers 7 of the connecting element 6, and an additional connection plane is created.
EP15001912.3A 2014-07-04 2015-06-29 Agencement de composant electronique Withdrawn EP2964004A3 (fr)

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DE102014109385.2A DE102014109385A1 (de) 2014-07-04 2014-07-04 Elektronische Bauteilanordnung

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US20230074572A1 (en) * 2020-02-28 2023-03-09 Siemens Aktiengesellschaft Electronic Module, Method for Producing an Electronic Module, and Industrial Plant

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