EP2629340B1 - Structure semi-conductrice pour un détecteur de rayonnement basé sur l'effect d'avalanche ainsi que le détecteur rayonnement - Google Patents

Structure semi-conductrice pour un détecteur de rayonnement basé sur l'effect d'avalanche ainsi que le détecteur rayonnement Download PDF

Info

Publication number
EP2629340B1
EP2629340B1 EP13155452.9A EP13155452A EP2629340B1 EP 2629340 B1 EP2629340 B1 EP 2629340B1 EP 13155452 A EP13155452 A EP 13155452A EP 2629340 B1 EP2629340 B1 EP 2629340B1
Authority
EP
European Patent Office
Prior art keywords
doping
region
semiconductor substrate
semiconductor
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP13155452.9A
Other languages
German (de)
English (en)
Other versions
EP2629340A2 (fr
EP2629340A3 (fr
Inventor
Michael Pierschel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PIERSCHEL, MICHAEL
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of EP2629340A2 publication Critical patent/EP2629340A2/fr
Publication of EP2629340A3 publication Critical patent/EP2629340A3/fr
Application granted granted Critical
Publication of EP2629340B1 publication Critical patent/EP2629340B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • H01L31/035272Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/1446Devices controlled by radiation in a repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes

Definitions

  • the invention relates to technologies in the field of semiconductor detectors, in particular avalanche phototransistors.
  • Semiconductor detectors with signal amplification by means of the avalanche effect are often used in radiation receivers for the detection of single photons.
  • the document DE 690 11 809 T2 discloses a semiconductor arrangement with a semiconductor body with a first arrangement region with a first conductivity type, which forms a first pn junction with a second arrangement region with a second, opposite to the first conductivity type, which is provided next to one of the main surfaces of the semiconductor body, a first pn junction, which in at least one Operating mode of the arrangement is biased.
  • An open further region with the second conductivity type is provided, which is provided within the first arrangement region and in a remote arrangement from the main surfaces of the semiconductor body and at a distance from the second arrangement region, so that in one operating mode of the arrangement the depletion region of the first pn junction corresponds to the open reached a wider range before the first pn junction breaks down.
  • the further area forms a further pn junction with a highly doped separation area with a first conductivity type, which is provided within the first arrangement area between the open further area and the second arrangement area and at a distance from the second arrangement area.
  • the diode is formed with a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type provided in the first semiconductor layer, a first main electrode electrically connected to the first semiconductor layer, and a second main electrode, which has the second semiconductor layer in a contact region within an edge part of a transition region contacted between the first and the second semiconductor layer, wherein the edge portion is at the edge of the second semiconductor region.
  • the shortest lateral distance between the contact region and the edge part of the transition is not shorter than the diffusion length of minority charge carriers in the first semiconductor layer.
  • the document DE 10 2009 049 793 B3 discloses a semiconductor photodetector with a semiconductor substrate, an upper doping zone which is doped according to a first doping type and extends laterally in the semiconductor substrate on an upper side and a lower doping zone which is doped according to a second doping type and the upper doping zone for forming avalanche Is assigned to areas.
  • the lower doping zone extends laterally in the semiconductor substrate opposite the upper diode doping zone and is designed to be interrupted in that at least one intermediate region is formed.
  • a quenching resistance region is formed in the semiconductor substrate between the lower doping zone and a contact-making layer formed on the back of the semiconductor substrate.
  • a first additional doping zone doped corresponding to the first doping type is arranged in the semiconductor substrate in the region between the lower doping zone and the contact-making layer. It extends laterally below the at least one intermediate area and into the area below the lower doping zone and is interrupted in the area below the lower doping zone.
  • a second additional doping zone doped corresponding to the second doping type is in the semiconductor substrate in the area between the lower doping zone and the first additional doping zone Doping zone arranged. It extends laterally below the at least one intermediate region and forms a potential barrier between the upper doping zone and the first additional doping zone.
  • the object of the invention is to provide improved technologies for a semiconductor structure for a radiation detector and a radiation detector based thereon which avoid the disadvantages of the prior art.
  • the production of the operating point and yield should also be supported with greater precision.
  • this object is achieved by a semiconductor structure for a radiation detector according to independent claim 1. Furthermore, a radiation detector according to the dependent claim 12 is provided. Advantageous refinements of the invention are the subject of the dependent subclaims.
  • a semiconductor structure for a radiation detector with a substrate made of a semiconductor material of a first conductivity type and a semiconductor substrate formed thereon with a semiconductor layer, the semiconductor layer being of higher resistance compared to the substrate.
  • the semiconductor layer is also of the first conductivity type.
  • the semiconductor material of the semiconductor layer is electrically doped with a doping concentration. It can be provided that the semiconductor substrate has essentially the same electrical conductivity as the substrate.
  • doping regions are formed, which are buried therein and formed in isolation from one another. The doping regions have a second conductivity type which is opposite to the first conductivity type.
  • the doping regions are electrically doped with a doping concentration which is greater than the doping concentration in the semiconductor substrate.
  • At least one further doping region which is also buried therein, is provided in the semiconductor substrate.
  • the at least one further doping region is assigned to the first conductivity type and one or more of the doping regions.
  • the at least one further doping region is electrically doped with a doping concentration that is greater than the doping concentration in the semiconductor substrate.
  • the semiconductor structure has a cover layer which is arranged on the semiconductor substrate and is of the second conductivity type.
  • a radiation detector in particular an avalanche detector such as an avalanche phototransistor, with such a semiconductor structure is provided.
  • the doping regions are buried in the semiconductor substrate formed on the substrate, which means that they have a circumferential distance from the edges of the semiconductor substrate. They are isolated or formed separately from one another.
  • a planar arrangement of doping zones extending in one plane in the semiconductor substrate is preferably formed with the doping regions. In this way, a pixel arrangement extending in the area can be produced in the semiconductor structure.
  • the areal arrangement of the doping regions extends in the area of the semiconductor substrate.
  • At least one further doping area which for its part also preferably extends in the area of the semiconductor substrate, is now provided and assigned to one or more of the doping areas, which preferably means that in a plan view of the area in which the semiconductor substrate extends, an at least partially planar overlap of the at least one further doping region with the one or more associated doping regions is formed.
  • the semiconductor substrate has an electrical doping concentration with which a weak electrical doping is formed, such that the semiconductor substrate has a high resistance compared to the substrate, whereas the substrate has a low resistance.
  • the doping regions have a doping concentration that is sufficient to prevent a depletion of charge carriers during operation. The doping regions do not become depleted of charge carriers during operation.
  • an avalanche area is formed, i.e. an area of high electrical field strength (high field) in which, when the semiconductor structure is used in the radiation detector, there is a multiplication of free charge carriers due to impacts (avalanche effect).
  • the erasure area is produced in the semiconductor substrate in the area between the doping areas and the substrate.
  • the cover layer arranged on the semiconductor substrate is produced with a conductivity type which is opposite to the conductivity type of the semiconductor substrate underneath. In this way, a pn junction is formed between the cover layer and the semiconductor substrate, which, when the semiconductor structure is used in the radiation detector, acts as a top diode during operation.
  • the semiconductor substrate can have a specific resistance (more specific Volume resistivity) of at least 500 ohm cm.
  • the transition to the intrinsic electrical conduction of the substrate material can form an upper limit of the high resistance.
  • one or more further doping areas are also provided in the semiconductor substrate. They form additional doping zones in the semiconductor substrate and enable functions of the formerly low-resistance semiconductor substrate to be provided. In particular, a precise setting of the operating point is supported. With the aid of the at least one further doping area, which is assigned to one or more of the doping areas, decoupling takes place from the build-up of charge carrier depletion zones required in the overall semiconductor structure and the setting of the barrier heights required for operation.
  • the provision of the one or more further doping regions provides an additional degree of freedom in the design of the semiconductor structure, so that operating points can also be set here that can compensate for layer thickness fluctuations of epitaxial substrates used, for example.
  • the at least one further doping region is formed on a side of the doping regions facing the cover layer and / or on a side of the doping regions facing the substrate. In the case of the doping regions formed as a flat arrangement, this enables the at least one further doping region to be arranged below and / or above the flat arrangement. It can also be provided that the at least one further doping region in the planar arrangement of the doping regions in the semiconductor substrate extends in one or more intermediate regions between adjacent doping regions. When the at least one further doping region is formed on the side of the doping regions facing the cover layer, the at least one further doping region is preferably arranged in a region of the semiconductor substrate between the cover layer and the doping regions. When the at least one further doping region is provided on the side of the doping regions facing the substrate, the at least one further doping region is preferably arranged in a region of the semiconductor substrate between the doping regions and the substrate.
  • the at least one further doping region is formed in physical contact with the assigned doping region or regions.
  • the touch contact can be flat. It can be provided that the at least one further doping region overlaps with the assigned doping region in a region and is also formed into an intermediate region between the doping regions.
  • An advantageous embodiment provides that the at least one further doping area in an overlap area in which the at least one further doping area is formed overlapping with the assigned doping area (s) has a layer thickness that differs from a layer thickness of the at least one further doping area outside the overlap area is.
  • the overlap results in the viewing direction onto the photoactive surface of the radiation detector, which is formed with the aid of the semiconductor structure.
  • the layer thickness information relates to an extension transversely to the flat extension of the doping regions.
  • a further development preferably provides that, for the at least one further doping area, the layer thickness in the overlap area is less than outside the overlap area.
  • the at least one further doping region is formed as a contiguous doping region for several of the doping regions. In one configuration, the at least one further doping region is produced as a continuous layer.
  • a further development can provide that the at least one further doping region overlaps areally with one of the doping regions and an essentially circumferentially constant overhang is formed around the overlapping surface, in which the at least one further doping region protrudes laterally relative to one of the doping regions. In the direction of the planar arrangement of doping areas, this means that the at least one further doping area completely covers the assigned doping area and protrudes circumferentially to the same extent.
  • the at least one further doping region is formed, at least in sections, with the same layer thickness as the associated doping region or regions.
  • the specification of the layer thickness again relates to an extension transversely to the planar arrangement of the doping regions.
  • one or more additional upper doping regions are formed in a region of the semiconductor substrate between the cover layer and the doping regions, which in the semiconductor substrate limit the extent of the avalanche region away from the cover layer towards the doping regions .
  • a multiplication area is created in which free charge carriers are multiplied after the absorption of the incident light to be detected due to impacts. This takes place in the area of high field strength (high field).
  • high field high field
  • An advantageous embodiment provides that one or more additional lower doping regions are formed in a region of the semiconductor substrate between the substrate and the doping regions, which in the semiconductor substrate limit the extent of the erasure region away from the doping regions towards the substrate. With the help of the deletion area, the previously occurring avalanche effect is deleted again in order to enable subsequent photons to be detected quickly ("quenching" ). With the aid of the one or more additional lower doping regions, an individual configuration of the erase region in the semiconductor substrate is made possible.
  • the semiconductor substrate 14 is grown here as an epitaxial layer on a very low-resistance substrate 12 of the n-conductivity type.
  • the substrate 12 forms an epitaxial substrate.
  • the doping regions 13 designed as floating regions are of the p-conductivity type and are never completely depleted of charge carriers during operation. This is in contrast to the further doping regions 15, which can be completely depleted of charge carriers.
  • the semiconductor structure 100 is covered by a p-conducting cover layer 10 which, together with the adjacent semiconductor substrate 14, forms a pn junction for a top diode. To operate the semiconductor structure 100 as a radiation detector, a reverse voltage is applied between the cover layer 10 and the substrate 12.
  • FIG. 12 shows a schematic illustration of potentials along a line AA in the semiconductor structure 100 from FIG Fig. 2 .
  • Curve 16 shows the potential in thermodynamic equilibrium, which essentially maps the static diffusion potentials.
  • top diode which here serves as a collector of the charges and control electrode
  • 15 - further doping region which is referred to as the base region of the avalanche phototransistor
  • 13 the floating, non-depletion doping region, which is used here as an emitter for hole charges that is not directly connected to a potential
  • 12 - the counter electrode of the substrate the regions in the different crystal depths are marked: 10 - top layer (top diode), which here serves as a collector of the charges and control electrode; 15 - further doping region, which is referred to as the base region of the avalanche phototransistor; 13 the floating, non-depletion doping region, which is used here as an emitter for hole charges that is not directly connected to a potential; and 12 - the counter electrode of the substrate.
  • the further doping zone 15 With the very small dark currents required for the single photon detection, only very few electrons flow into the further doping zone 15, which forms a base region and can always flow off to the substrate 12 due to the lack of a barrier on the side.
  • the further doping zone 15 thus remains practically free of charge here, and the potential barrier 23 is established on the basis of the Fermi-Boltzmann statistics of the hole charges in the doping area 13, which forms an emitter area for these hole charge carriers. This contains naturally also hole charges of the dark current which are generated in the lower region in the direction of the substrate 12 and which flow into the doping zone 13 (emitter region).
  • the potential of the top diode is increased to the value 22.
  • the curve 18 shows the corresponding course of the potential.
  • the result is that the electric field strength in the upper area, near the cover layer 10 (top diode), exceeds the field strength required for an avalanche breakdown.
  • a single trigger event for example a single irradiated photon, triggers an avalanche breakdown.
  • Both types of charge carriers are generated here, i.e. electrons and holes.
  • the resulting holes move under the influence of the field in the direction of arrow 28 to the area of the top diode and are absorbed by it.
  • the electrons produced move in the direction of arrow 29 and are initially collected in the further doping zone 15 (base region). This process is very quick and only takes a few picoseconds.
  • the electron charges located in the base area cause the potential barrier formed there to be broken down and, due to their presence, shift the potential there in a negative direction.
  • the potential in doping zone 13 thus drops from value 39 to in Fig. 3 denoted by 38.
  • the semiconductor structure 100 in the front area (upper area below the cover layer 10) is switched to the Geiger mode again, regardless of how long the actual lateral discharge of the electron charges may still take.
  • This further drainage of the electron charges is no longer associated with an avalanche amplification of the electron charges flowing further to the substrate 12 and the flow of holes into the floating emitter area stops here in a self-limiting manner precisely when the field strength in the rear area falls below the critical for the avalanche effect.
  • the exact size of the potential swing between the upper potential 39 and the lower 37 depends, among other things, on the dimensioning of the further doping zone 15 and the potential barrier 23 set as a result as well as the total capacitance of all four Fig. 4 shown partial capacitances of the floating doping zone 13.
  • the path of the electron charges from the further doping zone 15 (base region) to the substrate 12 is also shown once again.
  • the approximate position of the zones with the highest field strength towards the substrate 12, in which parts of the electron charges are multiplied, is marked by means of dots.
  • the resulting hole charges flow back directly into the emitter region (doping zone 13) and thus reset the operating point.
  • D1 denotes the avalanche diode in the upper part of the semiconductor structure 100 of a pixel at position 34
  • D2 the avalanche diode in the lower part of the semiconductor structure 100 of a pixel
  • C1 and C2 the capacitances to the 'floating' emitter of the bipolar transistor T1.
  • the diode structures indicated by dashed lines are not actually present and are only intended to indicate that, firstly, the avalanche diode D2 is fed by the electron charges e - flowing from the base of the transistor T1 and the hole charges e + that arise there by means of avalanche multiplication flow into the emitter area .
  • FIG. 11 shows a schematic representation of time sequences in connection with the processes in the semiconductor structure 100 described above.
  • a single photon is absorbed in the upper avalanche diode D1 and an avalanche multiplication begins.
  • typically 25,000 to 100,000 charge carriers of both types are generated, since the electric field strength there and at this point in time is greater than the field strength required for the avalanche breakdown. These load carriers are separated from the field.
  • the hole charges flow into the top diode, the electron charges into the further doping region 15 (base region). It happens within a few picoseconds.
  • the potential of the barrier between the further doping region 15 and the floating doping region 13 is then reduced, and further hole charges begin which are stored on the capacitances C1, C2 are to flow to the top diode formed with the cover layer 10. This is recorded as an increase in electricity in area 46.
  • the total number of charge carriers flowing here depends on the current amplification of the bipolar structure and is between 10 ... 100 ... 1000. Due to the heavy loss of holes in the doping area 13, the potential of this area drops so far that the avalanche process in D1 comes to a standstill comes. In addition, a large part of the electron charges generated by the multiplication will recombine in the base region 15 here. This process is also very quick and only requires a few more picoseconds.
  • the barrier between the further doping region 15 and the doping region 13 becomes larger and the current flow to the top diode collapses, as shown in region 47.
  • the further doping region 15 (base) there are now only relatively few electron charges that can only flow away on the side of a pixel.
  • the first electron charges flowing there to the substrate 12 now start the second avalanche process in the lower diode D2. This process is also very fast, and in time period 48 the hole charge on the emitter capacitances C1, C2 is renewed and the entire structure is thus brought back into the Geiger mode of the upper avalanche diode D1, which is ready to receive photons.
  • the barrier height is set via the outflow of electrons to the n-type top diode. These electrons then cause a further avalanche breakdown with a very high probability, which is wrongly assigned as 'afterpulsing' to imaginary radiating photons from the neighboring pixels.
  • pseudo-afterpulsing caused by this wrong choice of material and due to the above-described process of restoring the working point by electron diffusion across the barrier.
  • the “floating” emitter and the top diode should always be of the p-conductivity type and the high-resistance semiconductor layer surrounding it and the further doping region 15 should be n-conductive, provided that silicon is chosen as the base material.
  • Fig. 7 and 8th each show a schematic illustration of a semiconductor structure 100 in section, with exemplary embodiments for different lateral dimensions of the further doping regions 15 being shown.
  • Fig. 11 shows a schematic representation of a semiconductor structure 100 with additional upper doping regions 41.
  • the area of high field strength (high field, avalanch area) is limited to an area 42 below the cover layer 10. This systematically enables lower operating voltages of the semiconductor structure 100.
  • Fig. 12 shows a schematic representation of a semiconductor structure 100 with additional lower doping regions 43. With the aid of the additional lower doping regions 43, the quenching region is limited to a region 44 below the doping regions 13.
  • FIG. 11 shows a schematic representation of a semiconductor structure 100 with additional upper and lower doping regions 41, 43.
  • the FIG Fig. 11 shown structure used near the surface. This results in two avalanche structures connected in series, which are coupled to one another via a bipolar transistor construction with a floating emitter.
  • the goal is often to make the pixel geometries larger in order to limit the problems of "afterpulsing". Smaller structural capacities are required for this.
  • problems can arise in such a way that the avalanche field required to reset the potential of the emitter can only be achieved with difficulty in the lower part of the structure.
  • the avalanche region can also be limited to the areas identified by 44 by means of the n-type doping zone 43. The entire required operating point voltage is thus further reduced.
  • the potential in the central area of the structure is large enough to be able to use the avalanche effect of the D2 diode for resetting, and not in the edge areas of the same detector due to the high-resistance coupling of the hole charges to the edge areas.
  • the high potential required for this is hardly achieved there.
  • the very fast times of active resetting in the central area and the significantly slower times in the peripheral areas are of course mixed here.
  • a new type of semiconductor detector was presented, which describes the coupling of avalanche regions with the construction of a bipolar transistor. This achieves very fast active "quenching" in each individual pixel.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Light Receiving Elements (AREA)
  • Measurement Of Radiation (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Claims (12)

  1. Structure semi-conductrice pour un détecteur de rayonnement, comportant:
    - un substrat (12) fait d'un matériau semi-conducteur d'un premier type de conductivité,
    - un substrat semi-conducteur (14), dans lequel le substrat semi-conducteur (14) présente
    - une couche semi-conductrice disposée sur le substrat (12) qui, par rapport au substrat (12), a une résistance plus élevée,
    - est du premier type de conductivité et
    - est dopé électriquement avec une concentration de dopage
    - des régions de dopage (13), dans lequel les régions de dopage (13)
    - sont enterrées dans le substrat semi-conducteur (14) et formées isolées les unes des autres,
    - sont d'un deuxième type de conductivité qui est opposé au premier type de conductivité, et
    - sont dopées électriquement avec une concentration de dopage qui est supérieure à la concentration de dopage dans le substrat semi-conducteur (14),
    - au moins une autre région de dopage (15), dans lequel la au moins une autre région de dopage (15)
    - est enterrée dans le substrat semi-conducteur (14) et affectée à une ou plusieurs des régions de dopage (13) de telle sorte que, dans une vue en plan de la région dans laquelle s'étend le substrat semi-conducteur (14), un chevauchement complet de la région d'au moins une autre région de dopage (15) et du dopage attribué une région est formée,
    - est du premier type de conductivité et
    - est dopée électriquement avec une concentration de dopage qui est supérieure à la concentration de dopage dans le substrat semi-conducteur (14), et
    - une couche de recouvrement (10), qui est disposée sur le substrat semi-conducteur (14) et est du deuxième type de conductivité,
    dans lequel dans le substrat semi-conducteur (14) entre les régions de dopage disposées à l'intérieur (13, 15) et la couche de recouvrement (10) disposée sur le substrat semi-conducteur (14), une région d'avalanche est formée, c'est-à-dire une région d'intensité de champ électrique élevé, dans laquelle une duplication des supports de charge gratuits a lieu pendant l'exploitation en raison des impacts et
    dans laquelle une région d'effacement est formée dans le substrat semi-conducteur (14) entre les régions de dopage (13, 15) disposées à l'intérieur et le substrat (12).
  2. Structure semi-conductrice selon la revendication 1, caractérisée en ce que la au moins une autre région de dopage (15) est formée d'un côté des régions de dopage (13) faisant face à la couche de recouvrement (10) et/ou d'un côté des régions de dopage faisant face au substrat (12).
  3. Structure semi-conductrice selon la revendication 1 ou 2, caractérisée en ce que la au moins une autre région de dopage (15) est formée en contact physique avec la ou les régions de dopage (13) qui lui sont affectées.
  4. Structure semi-conductrice selon au moins une des revendications précédentes, caractérisée en ce que la au moins une autre région de dopage (15) dans une région de chevauchement dans laquelle au moins une autre région de dopage (15) est formée en se superposant à la ou les régions de dopage (13) associées présente une épaisseur de couche qui est différente de l'épaisseur de couche de la au moins une autre région de dopage (15) en dehors de la région de chevauchement.
  5. Structure semi-conductrice selon la revendication 4, caractérisée en ce que pour la au moins une autre région de dopage (15) l'épaisseur de couche dans la région de chevauchement est inférieure à celle de l'extérieur de la région de chevauchement.
  6. Structure semi-conductrice selon au moins une des revendications précédentes, caractérisée en ce que la au moins une autre région de dopage (15) est formée comme une région de dopage cohérente pour plusieurs des régions de dopage (13).
  7. Structure semi-conductrice selon au moins une des revendications précédentes, caractérisée en ce que la au moins une autre région de dopage (15) chevauche exactement une des régions de dopage (13) et un surplomb sensiblement circonférentiellement constant est formé autour de la région de chevauchement, dans laquelle la au moins une autre région de dopage (15) fait saillie latéralement par rapport à laquelle l'une des régions de dopage (13).
  8. Structure semi-conductrice selon au moins une des revendications précédentes, caractérisée en ce que la au moins une autre région de dopage (15) est formée au moins en sections de même épaisseur de couche que la ou les régions de dopage associées (13).
  9. Structure semi-conductrice selon au moins une des revendications précédentes, caractérisée en ce que une ou plusieurs régions de dopage supérieures supplémentaires sont formées dans une région du substrat semi-conducteur (14) entre la couche de couverture (10) et les régions de dopage (13, 15), qui limitent la région d'avalanche (42) dans son extension dans le substrat semi-conducteur (14) à l'écart de la couche de couverture (10) vers les régions de dopage (13, 15).
  10. Structure semi-conductrice selon au moins une des revendications précédentes, caractérisée en ce que dans une région du substrat semi-conducteur (14) entre le substrat (12) et les régions de dopage (13, 15) une ou plusieurs régions de dopage inférieures supplémentaires (43) sont formées qui, dans le substrat semi-conducteur (14), limitent la région d'effacement (44) dans son extension à l'écart des régions de dopage (13, 15) vers le substrat (12).
  11. Structure semi-conductrice selon au moins une des revendications précédentes, caractérisée en ce que le substrat semi-conducteur (14) présente une résistance élevée avec une résistance spécifique d'au moins 500 ohm cm.
  12. Détecteur de rayonnement, en particulier détecteur de rayonnement d'avalanche, comportant une structure semi-conductrice selon au moins une des revendications précédentes.
EP13155452.9A 2012-02-15 2013-02-15 Structure semi-conductrice pour un détecteur de rayonnement basé sur l'effect d'avalanche ainsi que le détecteur rayonnement Active EP2629340B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102012101224 2012-02-15
DE102012103699A DE102012103699A1 (de) 2012-02-15 2012-04-26 Halbleiterstruktur für einen Strahlungsdetektor sowie Strahlungsdetektor

Publications (3)

Publication Number Publication Date
EP2629340A2 EP2629340A2 (fr) 2013-08-21
EP2629340A3 EP2629340A3 (fr) 2016-07-06
EP2629340B1 true EP2629340B1 (fr) 2021-04-07

Family

ID=47750454

Family Applications (1)

Application Number Title Priority Date Filing Date
EP13155452.9A Active EP2629340B1 (fr) 2012-02-15 2013-02-15 Structure semi-conductrice pour un détecteur de rayonnement basé sur l'effect d'avalanche ainsi que le détecteur rayonnement

Country Status (5)

Country Link
US (1) US8823124B2 (fr)
EP (1) EP2629340B1 (fr)
JP (1) JP6298234B2 (fr)
CN (1) CN103258873B (fr)
DE (1) DE102012103699A1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2524044B (en) * 2014-03-12 2019-03-27 Teledyne E2V Uk Ltd CMOS Image sensor
DE102015110484B4 (de) * 2015-06-30 2023-09-28 Infineon Technologies Austria Ag Halbleiterbauelemente und Verfahren zum Bilden eines Halbleiterbauelements
JP7169071B2 (ja) 2018-02-06 2022-11-10 ソニーセミコンダクタソリューションズ株式会社 画素構造、撮像素子、撮像装置、および電子機器
JP6975079B2 (ja) * 2018-03-15 2021-12-01 株式会社東芝 放射線検出器
JP7224823B2 (ja) 2018-09-19 2023-02-20 キヤノン株式会社 光検出装置
CN112955787B (zh) * 2018-11-06 2023-05-30 深圳帧观德芯科技有限公司 一种辐射检测器

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7709618A (nl) * 1977-09-01 1979-03-05 Philips Nv Stralingsgevoelige halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
CA1280196C (fr) * 1987-07-17 1991-02-12 Paul Perry Webb Photodiode avalanche
GB2237930A (en) * 1989-11-01 1991-05-15 Philips Electronic Associated A semiconductor device and method of manufacturing a semiconductor device
US5218226A (en) * 1989-11-01 1993-06-08 U.S. Philips Corp. Semiconductor device having high breakdown voltage
JP3444081B2 (ja) 1996-02-28 2003-09-08 株式会社日立製作所 ダイオード及び電力変換装置
US7899339B2 (en) * 2002-07-30 2011-03-01 Amplification Technologies Inc. High-sensitivity, high-resolution detector devices and arrays
US8519503B2 (en) * 2006-06-05 2013-08-27 Osi Optoelectronics, Inc. High speed backside illuminated, front side contact photodiode array
DE102007037020B3 (de) * 2007-08-06 2008-08-21 MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. Avalanche-Photodiode
DE102007045184A1 (de) * 2007-09-21 2009-04-02 Robert Bosch Gmbh Halbleitervorrichtung und Verfahren zu deren Herstellung
DE102008011280B4 (de) * 2008-02-27 2010-01-28 Ketek Gmbh Strahlungsempfangendes Halbleiterbauelement, Verfahren zum Betreiben und Verwendung desselben sowie Strahlungsdetektor und Halbleiteranordung mit dem Halbleiterbauelement
IT1392366B1 (it) * 2008-12-17 2012-02-28 St Microelectronics Rousset Fotodiodo operante in modalita' geiger con resistore di soppressione integrato e controllabile, schiera di fotodiodi e relativo procedimento di fabbricazione
IT1393781B1 (it) * 2009-04-23 2012-05-08 St Microelectronics Rousset Fotodiodo operante in modalita' geiger con resistore di soppressione integrato e controllabile ad effetto jfet, schiera di fotodiodi e relativo procedimento di fabbricazione
DE102009049793B3 (de) * 2009-10-16 2011-04-07 Silicon Sensor International Ag Halbleiter-Photodetektor und Strahlungsdetektorsystem
US8779543B2 (en) * 2011-09-19 2014-07-15 Technion Research And Development Foundation Ltd. Device having an avalanche photo diode and a method for sensing photons

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Also Published As

Publication number Publication date
DE102012103699A1 (de) 2013-08-22
EP2629340A2 (fr) 2013-08-21
US8823124B2 (en) 2014-09-02
CN103258873B (zh) 2017-06-09
CN103258873A (zh) 2013-08-21
US20130207216A1 (en) 2013-08-15
EP2629340A3 (fr) 2016-07-06
JP6298234B2 (ja) 2018-03-20
JP2013174588A (ja) 2013-09-05

Similar Documents

Publication Publication Date Title
EP2629340B1 (fr) Structure semi-conductrice pour un détecteur de rayonnement basé sur l'effect d'avalanche ainsi que le détecteur rayonnement
DE102007037020B3 (de) Avalanche-Photodiode
DE102007020659B4 (de) Halbleiterbauelement und Verfahren zur Herstellung desselben
DE102009038731B4 (de) Halbleiterbauelement mit Ladungsträgerkompensationsstruktur und Verfahren zur Herstellung eines Halbleiterbauelements
DE112015005000B4 (de) Halbleitervorrichtung
EP0179102B1 (fr) Element semiconducteur appauvri avec un minimum de potentiel pour des porteurs majoritaires
DE102012201911B4 (de) Super-Junction-Schottky-Oxid-PiN-Diode mit dünnen p-Schichten unter dem Schottky-Kontakt
DE112013002352T5 (de) Halbleitervorrichtung
WO2020201189A1 (fr) Réseau de photodiodes à avalanche
DE112013004146T5 (de) Halbleitervorrichtung
EP2549536B1 (fr) Structure semi-conductrice pour la détection de photons
DE102017129955B4 (de) Halbleitervorrichtung mit einem barrierengebiet sowie elektrische vorrichtung
DE102009049793B3 (de) Halbleiter-Photodetektor und Strahlungsdetektorsystem
DE102015110484B4 (de) Halbleiterbauelemente und Verfahren zum Bilden eines Halbleiterbauelements
DE10243743B4 (de) Quasivertikales Halbleiterbauelement
DE112014006158T5 (de) Leistungshalbleitervorrichtung
DE102005007358B4 (de) Lichtempfindliches Bauelement
DE102014009032B4 (de) Laterale ESD Schutzdioden und integrierte Schaltkreise mit diesen sowie laterale Bipolartransistoren und laterale PN-Diode
DE102004004862B4 (de) Integrierte Halbleiterdiodenanordnung und integriertes Halbleiterbauteil
DE112021000205T5 (de) Halbleitervorrichtung
EP1127379B1 (fr) Composant a semi-conducteur de puissance a structure verticale
DE102009029644B4 (de) Halbleiterbauelementanordnung zur Reduzierung von Querströmen in einem Halbleiterkörper
DE102007018367B4 (de) Halbleiterbauelement und Verfahren zu dessen Herstellung
DE10126309A1 (de) Rückwärtssperrendes Leistungshalbleiterbauelement
DE3427476A1 (de) Halbleiterelement

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

RIC1 Information provided on ipc code assigned before grant

Ipc: H01L 27/144 20060101ALI20160531BHEP

Ipc: H01L 31/107 20060101AFI20160531BHEP

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20170105

RBV Designated contracting states (corrected)

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: PIERSCHEL, MICHAEL

RIN1 Information on inventor provided before grant (corrected)

Inventor name: PIERSCHEL, MICHAEL

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: EXAMINATION IS IN PROGRESS

17Q First examination report despatched

Effective date: 20181114

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

INTG Intention to grant announced

Effective date: 20201002

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE PATENT HAS BEEN GRANTED

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

Free format text: NOT ENGLISH

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 1380810

Country of ref document: AT

Kind code of ref document: T

Effective date: 20210415

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 502013015621

Country of ref document: DE

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

Free format text: LANGUAGE OF EP DOCUMENT: GERMAN

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG9D

REG Reference to a national code

Ref country code: NL

Ref legal event code: MP

Effective date: 20210407

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210707

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210807

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210708

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210809

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210707

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 502013015621

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20220110

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210807

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 502013015621

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20220228

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20220215

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220215

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220228

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220228

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220215

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220215

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220901

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220228

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220228

REG Reference to a national code

Ref country code: AT

Ref legal event code: MM01

Ref document number: 1380810

Country of ref document: AT

Kind code of ref document: T

Effective date: 20220215

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20220215

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20130215

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20210407