EP2370821A1 - Testadapter für computer-chips - Google Patents

Testadapter für computer-chips

Info

Publication number
EP2370821A1
EP2370821A1 EP09756305A EP09756305A EP2370821A1 EP 2370821 A1 EP2370821 A1 EP 2370821A1 EP 09756305 A EP09756305 A EP 09756305A EP 09756305 A EP09756305 A EP 09756305A EP 2370821 A1 EP2370821 A1 EP 2370821A1
Authority
EP
European Patent Office
Prior art keywords
test adapter
chip
test
cover plate
connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09756305A
Other languages
German (de)
English (en)
French (fr)
Inventor
Richard Loveless
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huber and Suhner AG
Original Assignee
Huber and Suhner AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huber and Suhner AG filed Critical Huber and Suhner AG
Publication of EP2370821A1 publication Critical patent/EP2370821A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • G01R1/0433Sockets for IC's or transistors
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302Contactless testing
    • G01R31/303Contactless testing of integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/46Bases; Cases

Definitions

  • the invention is in the field of test devices, respectively test adapters for testing integrated circuits (IC), such as computer chips and (micro) processors.
  • IC integrated circuits
  • micro micro
  • Processors such as those used on standard computers (PCs), have more and more connections. In the future, up to 1,024 ports are expected to be used to transfer data and / or power to and from a processor core. The frequencies with which the data are transmitted are in the Cigaherz Symposium.
  • test devices are known for this purpose, which today contain a so-called test or loadboard. With these loadboards, many serial connections are routed from a test head to a measurement station. Currently, data rates of up to 6 Cbps are typically achieved.
  • a chip has contact fields of a few ⁇ m in diameter, which are to be connected to the measuring device (test device).
  • the state of the art uses planar structures for signal lines on PCBs (printed circuit boards), so-called microstrips.
  • a microstrip negatively affects the signal as attenuation increases with increasing line length.
  • a high precision is required.
  • Another problem is in the high mechanical loads that can occur because each pin must be contacted with a relatively high force, so that a secure connection results.
  • Loadboards are very large and also have mechanical disadvantages. In addition, they have a comparatively complicated structure.
  • US5896037 of Method Electronics, Inc. was published in 1999 and shows a type of test adapter for testing chips.
  • the test adapter has a multilayer construction. The individual connectors are connected via tracks.
  • the test adapter has a two-dimensional structure, ie all connections are in one plane.
  • An object of the invention is to show a device which avoids the problems of the prior art. Another object of the invention is to provide a device which can be easily retrofitted for testing different chips.
  • An embodiment of the invention includes a 3-dimensional test adapter which, if necessary, allows all ports of a chip to coaxially contact simultaneously.
  • the connections are transferred away from the chip via spatially curved lines to a three-dimensional connection field, which can easily be contacted from the outside.
  • the lines have, if necessary, at least partially the same length and are kept short compared to the prior art.
  • PCB prior art
  • the inventive 3D routing allows a much higher packing density.
  • optical conductors and connectors may also be used to transmit the signals to and from the chips.
  • the test adapter according to the invention can be designed for use in existing chip test devices and forms an operative connection between the chip test device, respectively a loadboard and the chip to be tested. If necessary can The test adapter can be inserted into a loadboard or take up additional functions and, for example, completely replace the loadboard.
  • test adapter adapted specifically to the chip is provided, which has a much simpler construction than a conventional loadboard and also allows a massive improvement of the signal quality.
  • test adapter may have an integrated coding which conveys or stores information about the chip to be tested to the test device.
  • the test adapter has an approximately cuboid, resp. cube-shaped design.
  • a side plate which normally forms the top of the cube (cuboid), has a chip-specific contact field.
  • the contact pad includes a plurality of specifically arranged connectors for temporarily engaging the chip with the test adapter.
  • a corresponding number of plug connectors or connector banks are mounted at an angle to the top side, which are operatively connected to the connectors of the contact field via preferably coaxial cables.
  • other or a mixture of several connector types may be provided. The number of connectors required determines the size and shape of the side surfaces.
  • the test adapter - in particular the side plate with the connector field - advantageously has a mechanically stable construction, so that the mechanical forces occurring during testing of the chip can be safely dissipated and no unwanted deformations occur. This ensures that all connections of the chip are contacted with the specified force.
  • the connectors attached to the side walls or the side walls themselves may be arranged differently. If necessary, more or less than four side walls can be provided. Also, a connector-free area can be provided. If necessary, the base of the test adapter can also have connectors.
  • the plug connectors of the side surfaces in connector banks can be combined with a bearing floating on at least one side.
  • the connector banks advantageously have a coaxial construction (multiple coaxial connector), as a result of which a higher signal quality is achieved.
  • the connector banks have a plurality of individual coaxial connectors arranged in one or two or more rows.
  • individual coaxial connectors are floatingly mounted on at least one connector side, e.g. are secured in recesses of a Crund stressess to compensate for tolerances.
  • the individual connector banks can be connected to one another at least on the cable side in a rigid or movable manner to a larger unit. If necessary, the individual connector banks have centering means by means of which the individual connector banks are aligned and adjusted separately. The individual connectors themselves can be designed as a centering aid.
  • the individual connectors can be pressed on each side of the connector in one or more housings, which serve to support the same - depending on the embodiment, rigid or floating - serve.
  • the housings are preferably made of injection-molded plastic.
  • the operative connection with the cables takes place by compression or soldering.
  • the individual connectors have spring elements by means of which the insertion force with the counterpart is determined and any deviations in a defined one Mass be balanced.
  • the spring elements are, for example, of bellows-shaped design or have a barrel-shaped configuration which is slotted if required in the longitudinal direction or at a certain angle, such that the load level does not exceed a certain value.
  • the multi-coaxial connector of a connector bank includes a female and at least one cable-side male connector part.
  • the cable-side connector part has at least one connector bank with a housing which has a body.
  • the Crund stresses has from one or two opposite sides accessible, comb-shaped arranged recesses, which serve for the lateralcount of individual connectors.
  • the cable-side connector part may have a plurality of side by side and operatively connected connector banks.
  • the cable-side connector banks may be e.g. be elastically connected with each other via elastic connecting elements. Depending on the embodiment, the cable-side connector banks can also be rigidly connected to one another.
  • the female connector part e.g.
  • the connectors may be pressed or snapped in the female connector part from the front or the back.
  • the one-piece housing may have multiple rows of openings.
  • the individual connectors can be mounted laterally floating at least in a housing. If necessary, the connector banks can have centering means by means of which the housings are centered when plugged together.
  • the test adapter has an inner, dimensionally stable frame which serves to hold a cover plate with a contact pad and the connectors arranged on the side walls. If necessary, the dimensionally stable frame Connection means by means of which the test adapter can be mechanically operatively connected to a test device.
  • test adapter An advantage of the test adapter according to the invention is that an identical line length can be ensured for each connection.
  • the test adapter is also mechanically much more stable and has a much smaller footprint due to its three-dimensional structure.
  • the cables located inside are largely protected against external mechanical influences. If necessary, the interior can also be shed.
  • a further advantage of the invention is that the interior of the three-dimensional test adapter can be used for further tasks. For example, It is possible to install sensors which give information about the test conditions and environmental parameters.
  • FIG. 4 shows in simplified form the internal structure of a test adapter 1.
  • the test adapter 1 has approximately the shape of a cube with a cover plate 2 which has a contact field 3 in the middle.
  • the contact pad 3 has a plurality of individual contact elements 9, which are arranged specifically to the contact regions of a chip to be tested (not shown in detail) and can vary from chip to chip.
  • the contact elements 9 can be designed such that they can be directly connected to the contact areas of a chip.
  • the contact elements may be formed as resilient pins, which reject at axial pressure against the force of a spring to the rear.
  • the pins can be provided with a pointed or a round head.
  • Other embodiments are possible. For example, it is possible to selectively use conductive polymer as an intermediate layer.
  • adapter plates can be provided, which are arranged during testing between the chip and the test adapter and serve the connection between the contact elements of the contact pad 3 and the chip.
  • the test adapter 1 can have holding means and / or centering means for adapter plates and / or the chip, so that they occupy a defined position with respect to the contact field during testing.
  • the holding or centering means can be operatively connected to the cover plate 2.
  • An advantage here is that with a suitable locking the forces in the cover plate can be concentrated, so that the immediate structure is not overloaded.
  • the cuboid test adapter has four side walls 4, which are arranged at an angle of 90 ° to the cover plate 2.
  • the test adapter may have the shape of a truncated pyramid, in which the side surfaces 4 have a larger angle greater than 90 °. have over the cover plate 2.
  • the test adapter may also have an oblique structure in which the bottom and the top plate are offset from each other or arranged at an angle to each other.
  • the side walls 4 have a number of individual connectors 5 corresponding to the number of contact elements 9 of the contact field 3. These can, as shown in the embodiment shown, be combined to multiple connectors 6, which are operatively connected to a test device via corresponding plug connectors 10. Depending on the field of application, other arrangements of the side walls 4 and connector 5 is possible. For example, could be provided more or less than four side walls.
  • the contact elements 9 of the contact pad 3 and the single connector 5 are preferably connected to each other via coaxial cable 1 1.
  • the cover plate has one or more passage openings (not shown in detail).
  • the test adapter can have a modular, segment-like subdivided structure, which enables a simple disassembly of the side walls and the contact elements 9 of the contact field 3 assigned to them (indicated schematically in FIG. 2).
  • the connector connector 1 0 of the embodiment shown are so-called Mehrfachkoaxialverbinder, each having eight coaxial single connector 5.
  • the multiple connectors 6 are typically operatively connected via cable-mounted multiple plugs (not shown) to a test device which serves to debug the functions of chips.
  • peripherally arranged posts 7 can be seen, which form part of the supporting structure and rigidly connect the cover plate 2 with a bottom plate 8.
  • the cover plate 2 has a thickness which is selected such that no negative impact formation occurs when a chip is pressed against the contact pad 3 during testing from above.
  • the side walls 4 can take over supporting functions.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
EP09756305A 2008-12-05 2009-11-19 Testadapter für computer-chips Withdrawn EP2370821A1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CH01910/08A CH700063A2 (de) 2008-12-05 2008-12-05 Testadapter für Computer-Chips.
US12/408,907 US8920046B2 (en) 2008-12-05 2009-03-23 Test adapter for computer chips
PCT/EP2009/065471 WO2010063588A1 (de) 2008-12-05 2009-11-19 Testadapter für computer-chips

Publications (1)

Publication Number Publication Date
EP2370821A1 true EP2370821A1 (de) 2011-10-05

Family

ID=42231168

Family Applications (1)

Application Number Title Priority Date Filing Date
EP09756305A Withdrawn EP2370821A1 (de) 2008-12-05 2009-11-19 Testadapter für computer-chips

Country Status (11)

Country Link
US (1) US8920046B2 (ja)
EP (1) EP2370821A1 (ja)
JP (1) JP5733577B2 (ja)
KR (1) KR20110099298A (ja)
CN (1) CN102227642A (ja)
CA (1) CA2745740C (ja)
CH (1) CH700063A2 (ja)
IL (1) IL212996A (ja)
MY (1) MY159941A (ja)
SG (1) SG171941A1 (ja)
WO (1) WO2010063588A1 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH705740B1 (de) * 2011-11-14 2015-08-14 Huber+Suhner Ag Kabelinterface für Koaxialkabel.
CN102621466B (zh) * 2012-03-22 2015-02-11 上海华力微电子有限公司 一种老化测试板及制作该板的方法
TW201409049A (zh) * 2012-08-17 2014-03-01 Lextar Electronics Corp 直立式連接模組
DE102016100366A1 (de) * 2016-01-11 2017-07-13 Tdk-Micronas Gmbh Adapter zur Aufnahme eines integrierten Schaltkreises
ES2952872T3 (es) * 2018-07-27 2023-11-06 Hubergroup Deutschland Gmbh Procedimiento y dispositivo de tratamiento de datos para determinar una receta de color

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05160214A (ja) * 1991-12-09 1993-06-25 Advantest Corp Ic試験装置のテストヘッドの構造

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US2046966A (en) * 1934-12-28 1936-07-07 Gen Electric Arc welding
US4554505A (en) * 1983-06-10 1985-11-19 Rockwell International Corporation Test socket for a leadless chip carrier
JPS62153776A (ja) 1985-12-27 1987-07-08 Hitachi Ltd 電子装置のテスト用アダプタ
US4931726A (en) 1987-06-22 1990-06-05 Hitachi, Ltd. Apparatus for testing semiconductor device
US5046966A (en) 1990-10-05 1991-09-10 International Business Machines Corporation Coaxial cable connector assembly
JPH04359172A (ja) 1991-06-06 1992-12-11 Nec Ic Microcomput Syst Ltd 高周波ic用特性試験治具
JPH08110366A (ja) 1994-10-11 1996-04-30 Murata Mfg Co Ltd 表面実装型電子部品の測定治具
US5896037A (en) 1996-10-10 1999-04-20 Methode Electronics, Inc. Interface test adapter for actively testing an integrated circuit chip package
US6078187A (en) 1997-05-23 2000-06-20 Credence Systems Corporation Hemispherical test head for integrated circuit tester employing radially distributed circuit cards
EP1370894B1 (en) * 2001-01-17 2013-03-13 The Whitaker LLC Optical cross connect
US6692159B2 (en) * 2001-04-14 2004-02-17 E20 Communications, Inc. De-latching mechanisms for fiber optic modules
US6796715B2 (en) * 2001-04-14 2004-09-28 E20 Communications, Inc. Fiber optic modules with pull-action de-latching mechanisms
US6727717B2 (en) 2001-09-27 2004-04-27 Sun Microsystems, Inc. Integrated circuit chip test adapter
TW551792U (en) * 2001-10-12 2003-09-01 Hon Hai Prec Ind Co Ltd Optical transceiver module
JP2003130919A (ja) * 2001-10-25 2003-05-08 Agilent Technologies Japan Ltd コネクションボックス及びdutボード評価システム及びその評価方法
US6686732B2 (en) 2001-12-20 2004-02-03 Teradyne, Inc. Low-cost tester interface module
US7118281B2 (en) * 2002-08-09 2006-10-10 Jds Uniphase Corporation Retention and release mechanisms for fiber optic modules
US6731510B1 (en) * 2003-05-08 2004-05-04 Hon Hai Precision Ind. Co., Ltd. RJ connector for transceiver module
JP2007147664A (ja) * 2004-10-28 2007-06-14 Sumitomo Electric Ind Ltd プラガブル光トランシーバ
US7458837B2 (en) 2006-01-13 2008-12-02 Advantest Corporation Connector housing block, interface member and electronic device testing apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05160214A (ja) * 1991-12-09 1993-06-25 Advantest Corp Ic試験装置のテストヘッドの構造

Also Published As

Publication number Publication date
IL212996A (en) 2016-08-31
JP5733577B2 (ja) 2015-06-10
MY159941A (en) 2017-02-15
SG171941A1 (en) 2011-07-28
JP2012511142A (ja) 2012-05-17
US8920046B2 (en) 2014-12-30
CN102227642A (zh) 2011-10-26
CH700063A2 (de) 2010-06-15
IL212996A0 (en) 2011-07-31
WO2010063588A1 (de) 2010-06-10
KR20110099298A (ko) 2011-09-07
CA2745740C (en) 2016-10-11
US20100142897A1 (en) 2010-06-10
CA2745740A1 (en) 2010-06-10

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