Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
  • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
  • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
  • H01L31/1892—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates
  • H01L31/1896—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof methods involving the use of temporary, removable substrates for thin-film semiconductors
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02436—Intermediate layers between substrates and deposited layers
  • H01L21/02439—Materials
  • H01L21/02441—Group 14 semiconducting materials
  • H01L21/02444—Carbon, e.g. diamond-like carbon
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02436—Intermediate layers between substrates and deposited layers
  • H01L21/02439—Materials
  • H01L21/02441—Group 14 semiconducting materials
  • H01L21/02447—Silicon carbide
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02521—Materials
  • H01L21/02524—Group 14 semiconducting materials
  • H01L21/02532—Silicon, silicon germanium, germanium
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02656—Special treatments
  • H01L21/02664—Aftertreatments
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
  • Y02E10/00—Energy generation through renewable energy sources
  • Y02E10/50—Photovoltaic [PV] energy
  • Y02E10/547—Monocrystalline silicon PV cells
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
  • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
  • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

• the invention relates to a recrystallization process making it possible to obtain self-supported silicon ribbons having a so-called coarse grain crystallographic structure, these ribbons being particularly advantageous for the production of photovoltaic cells.
• Photovoltaic cells are essentially made from mono- or poly-crystalline silicon.
• This silicon is generally obtained by solidifying silicon ingots from a liquid silicon bath. The ingot is then cut into platelets which are used for the manufacture of the cells.
• ESG Edge-defmed Film-fed Growth
• RAD Ribbon against Drop
• RGS Carbon Growth on Substrate
• the liquid silicon rises in a capillary duct and comes into contact with a seed that is then displaced vertically.
• This technique makes it possible to produce large octagonal tubes, with faces 125 mm wide (and 300 ⁇ m thick) in which the wafers are then cut.
• a flexible graphite sheet vertically passes through the liquid silicon bath and silicon-coated spring on both sides.
• the thickness of the ribbons depends on the speed of pulling.
• a moving cold substrate contacts a liquid bath and exits by driving a silicon film on one of its faces.
• the solidification is initiated from the substrate (solid / liquid front parallel to the ribbon plane) and generates a non-optimal small grain structure for photovoltaic application.
• These methods generally allow access to a thickness of silicon ranging from 100 to 500 microns.
• this liquid phase technology there is a technology based on a vapor deposition illustrated by the CVD (4) and PVD (5) techniques.
• the layers thus deposited are generally much thinner (maximum 20 ⁇ m) than those obtained with the liquid phase processes.
• This so-called vapor phase technology makes it possible to work at high deposition rates and thus to ensure satisfactory productivity.
• the crystallographic structure thus obtained does not allow high energy conversion efficiencies because of its small size of crystals.
• a particularly advantageous method for annealing films is that of zone melting, consisting in forming, within the material under consideration, a liquid bridge locally between two solid phases in a high temperature zone, and moving the material thus produced consecutively towards a zone. cold.
• zone melting consisting in forming, within the material under consideration, a liquid bridge locally between two solid phases in a high temperature zone, and moving the material thus produced consecutively towards a zone. cold.
• the technique is known since the 1950s for the growth of massive single crystals, especially silicon. It has recently been adapted to the crystallization of silicon thin films for photo voltaic applications (4).
• zone melting annealing is carried out to recrystallize a layer of a few micrometers thick to serve as an epitaxial substrate for the production of thin layer cells with methods based on vacuum deposit.
• the solidification processes of the liquid silicon film and the separation of the solid silicon film thus formed are closely related, by the choice of the temperature chosen for the substrate. .
• the thickness of the SiC layer formed at the Si / substrate interface is determined by the temperature of the substrate. It is known that a low substrate temperature limits, on the one hand, the diffusion of impurities and, on the other hand, the formation of the SiC layer, thus promoting detachment. Unfortunately, this low temperature induces at the same time a microstructure for solidification of fine-grained silicon that is unsuitable for photovoltaic applications. In addition, the advantages and disadvantages are reversed for high substrate temperatures.
• the technologies currently available do not make it possible to access, in a simple and rapid manner, silicon films which are on the one hand self-supported, that is to say without a support substrate, and on the other hand, with a coarse grain crystallographic structure, that is to say with a size greater than at least 1 mm.
• the present invention aims precisely to provide a method that satisfies the aforementioned requirements.
• the present invention aims at providing a simplified and low-cost method useful for accessing thin layers of silicon, in particular self-supported silicon ribbons or wafers.
• the present invention further aims to provide a method for direct access to thin layers of self-supported silicon and having a coarse grain crystallographic structure.
• Another object of the present invention is to propose a method for manufacturing thin or self-supported silicon layer (s) enabling the simultaneous large-grain silicon recrystallization and the detachment of said thin silicon layer. thus formed, of its original substrate.
• the present invention relates to a method for preparing a self-supported thin layer of crystallized silicon, said method comprising at least the steps of:
• the solidification step (3) is advantageously carried out under conditions conducive to the formation of silicon crystals, greater than 1 mm in size.
• steps (2), (3) and (4) can be carried out continuously.
• the method further comprises a step (5) comprising the elimination of the SiC layer, contiguous to the expected thin silicon layer.
• the face of the substrate contiguous with the sacrificial layer may be provided with a relief. The method according to the invention then allows the replication of this relief at the level of the thin silicon layer formed and thus to develop a thin layer of textured silicon.
• the solidification or crystallization carried out in step (3) can be initiated by germination, that is to say by bringing the molten zone into contact with at least one external silicon crystal.
• the two expected qualities namely obtaining a silicon layer having a coarse grain crystallographic structure and easy separation of said silicon layer from its original substrate , are not acquired to the detriment of one another.
• the invention relates to the use of the method as described above for preparing self-supported silicon ribbons whose crystallographic structure has a grain size greater than 1 mm.
• the subject of the present invention is also the silicon ribbons obtained according to this process, in particular self-supported, whose crystallographic structure has a grain size greater than 1 mm.
• the term "self-supported” means that the coarse-grained silicon layer formed according to the claimed method is not secured by adherence to a solid substrate.
• Material plate a) carbon-based layer In order not to pollute the silicon, the carbon is chosen as pure as possible and therefore advantageously has a purity greater than 99%, or even 99.9%.
• this carbon layer may vary from 10 nm to 2 ⁇ m, preferably from 20 nm to 200 nm. This layer must be sealed to silicon and must therefore be free from open porosity, to prevent the infiltration of liquid silicon.
• This carbon layer can be made according to conventional techniques within the skill of those skilled in the art.
• this carbonaceous layer may be formed on the surface of one side of the substrate by pyrolysis of a gaseous or liquid precursor or deposited by a liquid route with evaporation of the solvent.
• the carbonaceous layer at the interface of the substrate layer and the silicon layer to be recrystallized, is intended to be totally converted by contact with the liquid silicon, into a SiC layer whose present invention aims precisely to profit in several ways. Firstly, this SiC layer, by blocking the diffusion of the metal elements, if any present in the substrate layer, chemically protects the liquid silicon layer.
• the Si / SiC interface being energetically strong, it thus ensures a good wetting of SiC by the liquid Si and thus the morphological stability of the liquid silicon film.
• the good wetting of this SiC layer by the silicon is also conducive to the replication of a possible texture of the substrate, which is advantageous for the trapping of light in the cells and makes it possible to avoid the implementation of a additional step of etching on the solidified tape, to create the relief.
• thermomechanical stresses produced during cooling cause spontaneous detachment by adhesive failure, that is to say without cracking or deformation of the silicon and / or the substrate. .
• substrate With respect to the material forming the substrate, it can be of various natures.
• the substrate materials that are more particularly suitable for the invention are of the ceramic type, for example alumina or silicon nitride, and more particularly the poor heat-conducting materials such as alumina.
• This substrate material is advantageously in the form of a wafer or a ribbon, and in particular a ribbon with a width varying from 5 to 20 cm, and a thickness ranging from 500 ⁇ m to 10 mm, preferably from 1 to mm to 5 mm.
• the silicon layer it generally has a so-called low grain crystallographic structure that is precisely sought to increase via the method according to the invention.
• This so-called low grain crystallography generally has a size less than 100 microns, especially less than 10 microns.
• This silicon layer can be formed by any conventional method. It can in particular be formed by CVD, PVD or powder deposition, or even the RGS technique, on the surface of the carbonaceous layer.
• Its thickness can vary from 10 ⁇ m to 500 ⁇ m, in particular from 100 ⁇ m to 200 ⁇ m.
• FIG. 1 represents a schematic cross section of a wafer of material to be treated according to the invention
• FIG. 2 is a cross-sectional schematic section of a wafer obtained during step (2)
• FIG. 3 illustrates the step of detaching the thin Si / SiC layer from the substrate layer
• FIG. 4 is a schematic transverse section of a thin layer of silicon / SiC obtained according to the method of the invention.
• FIG. 5 represents the thin layer of silicon obtained after removal of the SiC layer
• FIG. 6 illustrates the longitudinal displacement of a wafer during its treatment according to the invention within a thermal enclosure and the recovery at the end of this enclosure of a thin Si / SiC layer by spontaneous detachment of the SiC layer of the substrate layer.
• step (2) at least one zone of the surface layer of a wafer of material to be recrystallized, in particular as defined above, is carried locally at a temperature above the melting temperature of silicon, that is to say a temperature greater than 1410 ° C.
• This temperature is, moreover, advantageously less than 1700 ° C., especially less than 1550 ° C., or even less than 1500 ° C.
• the size of the melted zone may vary from 5 mm to 5 cm, and in particular from 5 mm to 2 cm.
• this step (2) makes it possible, on the one hand, to melt the silicon of the zone exposed to local heating, and on the other hand, to transform the carbon, contiguous to this zone, into silicon carbide SiC.
• the area thus treated is then exposed to conditions conducive to recrystallization at a grain size greater than 1 mm.
• This cooling of the melted zone can be gradual with a cooling rate of 10 ° C. to 1000 ° C./hour, advantageously of 50 ° C. to 300 ° C./hour.
• this cooling which is favorable for the recrystallization of the molten silicon is carried out under conditions such that the heat exchanges in the thickness of the melted zone formed by the Si / SiC / substrate materials are significantly reduced.
• the heating means are advantageously located on either side of the wafer.
• a temperature gradient is beneficially substantially in the longitudinal direction at the substrate layer rather than in the thickness direction.
• the substrate can be advantageously exposed for cooling, that is to say during the cooling step (3), or even in step (2), at a temperature having a temperature delta with the crystallization temperature between 0 and 20 ° C.
• steps (2), (3) and (4) can be carried out continuously.
• steps (2) and (3) can be carried out in a heating chamber into which said wafer to be treated according to the invention is introduced.
• This chamber is able precisely to provide, on the one hand, the local heating required for step (2) and, on the other hand, the thermal energy necessary for heating the substrate, preferably with a temperature gradient exerted essentially in the longitudinal direction of the substrate and which is particularly advantageous for accessing the expected recrystallization size of the silicon according to the invention.
• substrates which are poor conductors of heat for example alumina.
• the material wafer and said enclosure are advantageously animated with a movement relative to each other so that any melt zone in step (2) is moved consecutively towards the zone of the enclosure, conducive to its recrystallization by cooling.
• the plate that is moved through the enclosure.
• step (2) it is advantageously adjusted within the enclosure to apply only to an area of said wafer material to be treated.
• This local heat treatment can be achieved by any conventional means conducive to localized heating.
• the modes induction heating are particularly suitable for the invention.
• heat treatments of the resistive type, infrared, laser, mirror oven ... can also be considered or any combination of these treatments.
• cooling it may be advantageous to proceed at the beginning of this cooling to bring the molten zone into contact with a silicon crystal seed, in particular by contact of this melted zone with a monocrystalline plate.
• This recrystallization technique is clearly within the skill of those skilled in the art.
• the Si / SiC bilayer wafer spontaneously separates from the substrate layer, that is to say without it being necessary to apply a mechanical stress to proceed with its detachment.
• a recrystallized silicon layer devoid of solid substrate is thus obtained. It is however coated on one of its faces with a silicon carbide layer of generally submicron thickness.
• This silicon carbide layer can be removed consecutively according to usual techniques and generally by a chemical treatment.
• the set is positioned on a conveyor belt passing through a high temperature enclosure.
• the substrate is heated by induction in its lower part, an IR lamp heater also being implemented in the upper part to provide additional heating.
• a maximum temperature of 1500 ° C. is thus reached on the sample (measurement by pyrometer), which leads to forming a zone of liquid silicon of centimeter dimension.
• the draw is initiated by setting the treadmill in motion at a speed of the order of 50 ⁇ m / s.
• the ribbon is detached from the ceramic substrate. After returning to ambient temperature, the sub-micron SiC layer adhering to silicon is removed chemically (nitric acid-hydrofluoric acid mixture).

Landscapes

• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Physics & Mathematics (AREA)
• Power Engineering (AREA)
• Electromagnetism (AREA)
• Crystals, And After-Treatments Of Crystals (AREA)
• Recrystallisation Techniques (AREA)
• Photovoltaic Devices (AREA)
• Silicon Compounds (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=40473397

Family Applications (1)

Country Status (9)

Families Citing this family (3)

Family Cites Families (20)

• 2008
  • 2008-09-05 FR FR0855969A patent/FR2935838B1/fr not_active Expired - Fee Related
• 2009
  • 2009-09-03 WO PCT/FR2009/051667 patent/WO2010026343A1/fr active Application Filing
  • 2009-09-03 CN CN2009801349587A patent/CN102144283B/zh not_active Expired - Fee Related
  • 2009-09-03 KR KR1020117007357A patent/KR101287525B1/ko not_active IP Right Cessation
  • 2009-09-03 BR BRPI0919145A patent/BRPI0919145A2/pt not_active IP Right Cessation
  • 2009-09-03 US US13/062,462 patent/US20110212630A1/en not_active Abandoned
  • 2009-09-03 RU RU2011107879/28A patent/RU2460167C1/ru not_active IP Right Cessation
  • 2009-09-03 EP EP09741364A patent/EP2319072A1/de not_active Withdrawn
  • 2009-09-03 JP JP2011525598A patent/JP5492209B2/ja not_active Expired - Fee Related

Non-Patent Citations (1)

Also Published As

Similar Documents

Legal Events