EP2100370A1 - Verfahren und vorrichtung zur strommessung in einem insbesondere mehrphasigen stromnetz - Google Patents

Verfahren und vorrichtung zur strommessung in einem insbesondere mehrphasigen stromnetz

Info

Publication number
EP2100370A1
EP2100370A1 EP07803566A EP07803566A EP2100370A1 EP 2100370 A1 EP2100370 A1 EP 2100370A1 EP 07803566 A EP07803566 A EP 07803566A EP 07803566 A EP07803566 A EP 07803566A EP 2100370 A1 EP2100370 A1 EP 2100370A1
Authority
EP
European Patent Office
Prior art keywords
phase
measurement
current
vector
current measurement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP07803566A
Other languages
German (de)
English (en)
French (fr)
Inventor
Gilles Schmitt
Sven Finke
Jochen Kurfiss
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2100370A1 publication Critical patent/EP2100370A1/de
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0009Devices or circuits for detecting current in a converter
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation

Definitions

  • the invention relates to a method for measuring current in a particular multi-phase power grid.
  • phase currents there is often a desire to detect the phase currents. If it is an energization of an electric motor by means of a controllable bridge, which has controllable switching elements in their individual bridge branches, then the electric motor can be energized in the desired manner. In order to detect the phase currents, a low-resistance resistor (shunt) is arranged in each phase line. The cost of this multiphase measuring arrangement is correspondingly large.
  • the invention has for its object to enable a very simple and cost-effective current measurement, in particular, no or only small noises occur by the measuring engagement and should also incur no or only a slight torque ripple. Furthermore, possibly involved components, such as DC link capacitors, are only slightly loaded.
  • the subject of the invention is basically provided that the current measurement is carried out only with a single shunt, wherein the phase currents are determined in sequential order. It is sufficient to measure, for example, a three-phase arrangement only two phases and to calculate the current of the third phase using Kirchhoff's laws. It is used a provided with controllable switching elements bridge circuit, for example, a B6 bridge, a DC intermediate circuit wherein the current flows through the common shunt in the supply and return line from / to the intermediate circuit and corresponds to the phase current to be measured. The control of the switching elements takes place with clock patterns of drive signals in a special, inventive manner.
  • the device according to the invention for current measurement with measuring amplifier circuit and analog-to-digital converter in a particular multi-phase power network is provided by at least one controllable switching element, a desired energization of the electrical load takes place and a control unit acting on the at least one controllable switching element control signals generated to achieve the desired energization of the consumer, wherein clock patterns of the control signals measuring windows for current measurement, in particular for the measurement of phase currents, are assigned and clock patterns are shifted in time to receive measurement windows of sufficient time, with a minimum time shift from the sum of a minimum dead time of the switching element, a minimum settling time of the sense amplifier circuit and a minimum sampling time of the analog-to-digital converter.
  • a minimum phase shift can be determined / calculated taking into account the hardware used.
  • reactive currents generated by the phase shift are also minimized, with the reactive currents contributing to the heating of the bridge circuit.
  • a minimization of the heating of the bridge circuit accordingly takes place.
  • the mentioned dead time of the switching element is required to ensure a safe switching. If the switching element has been put into the conducting state by means of a drive signal and then switched off again, the dead time must be waited for after switching off in order to guarantee a safe current zero crossing.
  • the settling time of the measuring amplifier circuit is to be awaited because of correspondingly steep edges of the measuring signal in order to guarantee the most accurate possible current measurement.
  • the sampling time (sample time) of the analog-to-digital converter has to be waited for in order to achieve the most error-free conversion possible.
  • the current measurement is performed at the end of the sampling time.
  • the invention further relates to a method or a device for measuring current, in particular as described above, in a polyphase power grid, in which / by controllable switching elements, a desired energization of an electrical load takes place and generates a control unit acting on the controllable switching elements control signals to the desired To achieve energization of the consumer, wherein clock patterns of the drive signals are associated with measurement windows for current measurement of phase currents and clock patterns are shifted in time to obtain measurement windows of sufficient time size, and wherein the
  • Clock pattern are selected taking into account a phase selection for the current measurement. Accordingly, the phase position is selected for a current measurement vector occurring due to the current measurement. Due to the measurement intervention, a vector error can occur in the respective drive period. By selecting the phase position, the vector error is minimized, possibly to zero. As a result, less noise occurs and there is a lower torque ripple.
  • the invention further relates to a method or a device for current measurement, in particular as described above, in a polyphase, a phase vector having power network, in which / by controllable switching elements, a desired energization of an electrical load takes place and generates a control unit acting on the controllable switching elements drive signals to achieve the desired energization of the consumer, wherein clock patterns of the drive signals are associated with measurement windows for current measurement of phase currents and clock patterns are shifted in time to obtain measurement windows of sufficient magnitude, and wherein the clock patterns are selected taking into account the instantaneous rotational angular position of the phase vector. This reduces the compensation of the current measuring vector with the result that a reduction of reactive current and torque ripple occurs.
  • the above-mentioned calculation / determination of the minimum phase shift in an asymmetric pulse width modulation takes into account the case that the phase current in the considered PWM period only to be measured once. For the minimum phase shift results in a different value, in the event that the respective phase current is to be measured twice to n times in the considered pulse width modulation period (PWM period).
  • the term: (n-1) adds to the aforementioned sum additively the minimum conversion time of the analog-to-digital converter.
  • n is the number of measurements of a phase current per PWM period. Consequently, the conversion time of the analog-to-digital converter is taken into account, the number of which depends on the number of measurements per PWM period.
  • pulse width modulation signals to be used as drive signals.
  • the control of the controllable switching elements is thus preferably carried out by means of pulse width modulation (PWM), which is present due to the inventive approach no symmetrical, but an asymmetric PWM.
  • PWM pulse width modulation
  • a particular multiphase asynchronous motor or a particular multi-phase permanent magnet synchronous motor is energized as a consumer.
  • the consumer in particular the mentioned motors, are preferably connected in star.
  • phase current of the load takes place in each case in a measuring window.
  • the switching elements are located in the individual branches of the bridge circuit, in particular a B6 bridge is used and the consumer a three-phase load in star connection, in particular a corresponding asynchronous motor or a corresponding permanent magnet synchronous motor.
  • the bridge circuit is preferably fed by a DC circuit, in particular a DC intermediate circuit.
  • the current measurement is carried out by means of only one shunt, which is preferably in the DC circuit, in particular DC intermediate circuit.
  • the control of the individual switching elements is to be selected for measuring the respective phase current such that the phase current flows through the shunt in the corresponding measuring window.
  • the signal at the shunt is then amplified by means of the measuring amplifier and converted by means of the analog-to-digital converter and is available for various purposes.
  • phase selection is performed such that a deviation generated by the current measurement is kept to a predetermined desired vector to zero or as small as possible. This minimizes losses.
  • a current measuring vector caused by the current measurement is selected in its phase position to minimize the abovementioned deviations.
  • the procedure is such that the phase position is selected, which leads to the lowest losses.
  • a current measuring vector caused by the current measurement rotates with the phase vector.
  • the current measurement is accordingly carried out so that not only the phase vector rotates, but also the current measuring vector.
  • the phase vector preferably consists of the combination of a moment-setting and field-forming vector.
  • the inventive method is used in particular in an electric steering for a motor vehicle, wherein the consumer is a suitably driven motor that operates the steering.
  • FIG. 1 is a circuit diagram
  • FIG. 1 shows a bridge circuit 1 which is connected to a DC circuit 2.
  • the bridge circuit 1 is designed as a B6 bridge with three bridge branches 3. Each bridge branch 3 has two controllable switching elements 4.
  • a consumer 5, which is designed as a three-phase asynchronous 6, is driven by the bridge circuit 1.
  • a control unit, not shown, generates control signals according to specific clock patterns, the control signals being supplied to control inputs 7 of the switching elements 4, whereby they are switchable into the conducting or blocking state.
  • the DC circuit 2 which is designed as a DC intermediate circuit 8, is a DC link capacitor 9.
  • the DC circuit 2 is connected via a shunt 10 to the bridge circuit 1.
  • a single shunt 10 is provided with which the phase currents of the asynchronous motor 6 can be determined in sequential order.
  • two phase currents of the three total phase currents are measured and the third phase current is calculated by means of Kirchoff's laws. It is a certain switching pattern, so a certain control of the controllable switching elements 4 required so that the current through the common shunt 10 in the supply or Return line from / to DC intermediate circuit 2 corresponds to the phase current to be measured.
  • a sense amplifier circuit 12 and an analog-to-digital converter 11 is connected, which converts the analog signal of the shunt 10 into a digital signal.
  • the measuring amplifier circuit 12 has a settling time E during operation.
  • the analog-to-digital converter 11 has a sampling time A and preferably designed as field effect transistors (FET) switching elements 4 have a dead time T.
  • FET field effect transistors
  • the control of the switching elements 4 by means of the control unit, not shown, is not shown in FIG 2, since in this figure, a known center-centered pulse width modulation is shown, that is, the drive signals shown there form a center-centered clock pattern for the individual phases U, V and W, within the in the figure 2 pulse width modulation period (PWM period). If one were to perform this control, the phase currents of the load 5 could not be determined with the aid of a single shunt 10 due to the simultaneity. Accordingly, according to FIG. 3, a different clock pattern is selected, that is, the switching times of the switching elements 4 are shifted in time according to FIG. 3, so that the measurement of at least two phase currents within a pulse width modulation period is possible.
  • Measurements are labeled Measurement 1 and Measurement 2 (1st measurement and 2nd measurement).
  • the current through the shunt 10 corresponds to the current in the phase U; at the time of the second measurement, the current through the shunt 10 corresponds to the inverse current in the phase W (this corresponds to the addition of the phase currents U and V).
  • the measurements are performed in the sub-period B of the pulse width modulation period.
  • Sub-period B is followed by sub-period A, the sum of sub-period B and sub-period A resulting in the pulse width modulation period.
  • a comparison of Figures 2 and 3 illustrates the shift of the switching times of the switching elements. 4
  • the sub-period B is illustrated in detail.
  • the states of the switching elements 4 designed as field-effect transistors are labeled "Hi-FET” and "Low-FET” for the individual phases U, V, W.
  • hardware issues are too consider. These include the dead time T of the switching elements 4, the settling time E of the measuring amplifier circuit 12 and the sampling time A of the digital-to-analog converter 11. If these three times are minimized, that is, made as small as possible, while nevertheless guaranteeing the respective function, the possible minimum phase shift (min. Phase shift) for the first measurement results according to FIG. 4 in the sum of these three times. At the end of the sampling time A, the first measurement can then take place.
  • the sum of these three times gives the minimum phase shift for the second measurement.
  • displacement dead time of the bridge branch + settling time of the measuring amplifier circuit + sampling time of the digital-to-analog converter.
  • Sub-period A is thus:
  • Sub-period A PWM period - sub-period B.
  • FIG. 5 clarifies once again that for a current measurement in at least two phases of the asynchronous motor 6, a clock pattern for driving the
  • Switching elements 4 is required such that the current through the common shunt 10, which is for example in the ground line, the current through the phases to be measured corresponds. This can - as already shown above - be achieved by phase shift in an asymmetric pulse width modulation.
  • the first measurement of FIG. 7 results in a first current measuring vector which has the phase position of U.
  • a second current measuring vector results from the second measurement in which portions of the phases V and W are present. If the two current measuring vectors are added vectorially, this results in a resulting current measuring vector in the half-period B.
  • this resulting current measuring vector is shown again and a reference vector is shown in the vector diagram, which is specified by the control unit as a phase vector, which is the torque-setting and field-forming one Vector is to view. If, in accordance with FIG. 9, the "vector in half-period A" is drawn in the half-period A, then the vectorial addition of the resulting current-measuring vector in half-cycle B with the vector in half-cycle A yields the desired vector Current measurement feasible.
  • FIG. 10 shows a phasor diagram which corresponds to the diagram of FIG. 6, in which a current measurement is not possible because there is no information about the phase U.
  • FIG. 11 illustrates by means of a phasor diagram the situation of FIG. 7, that is to say the asymmetrical pulse width modulation with phase shift and with intervention for the current measurement.
  • Recognizable is the vector in the half-period B, as it arises from the measurement intervention.
  • the vector is shown in the half-period A, so that this results in a resulting vector, which, however, does not correspond to the desired vector.
  • Between the resulting Vector and the desired vector gap vector error which is also shown in Figure 11.
  • a clearly audible noise is generated, which has the frequency of the measurement.
  • this measurement intervention leads to an increased reactive current component within the DC intermediate circuit 8 (capacitor).
  • the measurement intervention leads to an increase of the DC link current. This increase in current leads to a greater load on the DC link capacitor 9 and the final stage.
  • an increase of the torque ripple due to the occurring vector error takes place here if necessary. The effect of these effects is dependent on the amplitude of the measurement intervention vector.
  • the phase position for the two required current measuring vectors is selected according to the invention, then a reduction of the measuring intervention can be brought about, so that the noise decreases and the capacitor current and the torque ripple in the phase current measurement with only one shunt 10 are reduced.
  • FIG. 12 in which the first current measuring vector has the phase position V and the second current measuring vector is composed of the two phase positions of V and W, so that the resulting current measuring vector in the half-cycle B has the position resulting from FIG deviates from the position of the corresponding vector of Figure 11.
  • the desired vector is entered into the vector diagram corresponding to FIG. 12 and also the vector in the half period A, then it can be seen that the error vector (vector error) has become much smaller. This is shown by the comparison of FIGS. 13 and 11.
  • FIGS. 15 to 22 In the there taking place by means of the circuit of Figure 1 current measurement, a corresponding clock pattern is used. For reasons of noise, this clock pattern is set with each pulse width modulation period (16 kHz) and not just with each measurement intervention (1 kHz). The clock pattern is done with
  • Phase shift in the individual phases V and W as is apparent from the figure 15. Again, there is a division into a half-period A and a half-period B.
  • the half-period B is the current measurement. Again, a first measurement and a second measurement is again performed. However, if a very large vector is required for the measurement engagement compensation, it may happen that the clock pattern is "destroyed" in the current measurement because the time within the pulse width modulation period is no longer sufficient to produce this vector 16 shown.
  • FIGS. 17 to 22 A comparison of FIGS. 17 to 22 shows that a selection of the current measurement pattern can be made as a function of the position of the combination of moment-adjusting and field-forming vector, referred to below as phase vector.
  • this current sense pattern is placed in each pulse width modulation period in which the phase vector is within the framed area.
  • a phasor diagram is shown on the left and the corresponding pulse width modulation period is shown on the right.
  • the framed area respectively represents the area of the moment-adjusting vector.
  • a reference to the phasor diagram is made in the current measurement patterns associated with the phasor diagram only with respect to the half-period B. In the half period A, the position within the framed area in the phasor diagram is varied depending on the position.
  • the current angular position of the phase vector can be selected.
  • the current measurement vector caused by the current measurement rotates with the phase vector. This results in current reductions in the DC link. If the intervention is completely dependent on the field angle, the reactive current is almost completely reduced. This reduction also results for the summation current, which represents the effective current in the shunt 10.
  • the conversion time W of the analog-to-digital converter is to be understood as a complete conversion time, which is composed of a sampling time of a sample-and-hold element and a conversion time of the analog-to-digital converter. From FIG. 23 it can be seen that measurement 1.1 and measurement 1.2 are carried out in sub-period B with respect to the current measurement of a first phase. Thus, there are two current measurements of one phase in this period. In the subsequent period then within the sub-period B of this period, the measurement takes place 2.1 and 2.2, so two current measurements of another phase. The respective current in the third phase is then determined according to Kirchhof's laws.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Control Of Motors That Do Not Use Commutators (AREA)
  • Control Of Ac Motors In General (AREA)
EP07803566A 2006-11-07 2007-09-20 Verfahren und vorrichtung zur strommessung in einem insbesondere mehrphasigen stromnetz Ceased EP2100370A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006052467A DE102006052467A1 (de) 2006-11-07 2006-11-07 Verfahren und Vorrichtung zur Strommessung in einem insbesondere mehrphasigen Stromnetz
PCT/EP2007/059984 WO2008055741A1 (de) 2006-11-07 2007-09-20 Verfahren und vorrichtung zur strommessung in einem insbesondere mehrphasigen stromnetz

Publications (1)

Publication Number Publication Date
EP2100370A1 true EP2100370A1 (de) 2009-09-16

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Application Number Title Priority Date Filing Date
EP07803566A Ceased EP2100370A1 (de) 2006-11-07 2007-09-20 Verfahren und vorrichtung zur strommessung in einem insbesondere mehrphasigen stromnetz

Country Status (7)

Country Link
US (1) US8421394B2 (ko)
EP (1) EP2100370A1 (ko)
JP (2) JP5586230B2 (ko)
KR (1) KR101368707B1 (ko)
CN (1) CN101573862B (ko)
DE (1) DE102006052467A1 (ko)
WO (1) WO2008055741A1 (ko)

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US20100072980A1 (en) 2010-03-25
JP5586230B2 (ja) 2014-09-10
WO2008055741A1 (de) 2008-05-15
KR101368707B1 (ko) 2014-03-04
CN101573862A (zh) 2009-11-04
CN101573862B (zh) 2013-03-13
US8421394B2 (en) 2013-04-16
DE102006052467A1 (de) 2008-05-08
JP2013068639A (ja) 2013-04-18
JP2010508536A (ja) 2010-03-18

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