EP1760878A1 - Mélangeur à cellule de Gilbert utilisant sélection de bande - Google Patents

Mélangeur à cellule de Gilbert utilisant sélection de bande Download PDF

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Publication number
EP1760878A1
EP1760878A1 EP06017566A EP06017566A EP1760878A1 EP 1760878 A1 EP1760878 A1 EP 1760878A1 EP 06017566 A EP06017566 A EP 06017566A EP 06017566 A EP06017566 A EP 06017566A EP 1760878 A1 EP1760878 A1 EP 1760878A1
Authority
EP
European Patent Office
Prior art keywords
circuit
frequency
terminal
output
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06017566A
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German (de)
English (en)
Inventor
Masaki Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Publication of EP1760878A1 publication Critical patent/EP1760878A1/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1433—Balanced arrangements with transistors using bipolar transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1408—Balanced arrangements with diodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/14—Balanced arrangements
    • H03D7/1425—Balanced arrangements with transistors
    • H03D7/1458—Double balanced arrangements, i.e. where both input signals are differential
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
    • H03D2200/0001—Circuit elements of demodulators
    • H03D2200/0023—Balun circuits

Definitions

  • the present invention relates to an electronic circuit that has a balanced output and an unbalanced output together, and a television tuner having such an electronic circuit.
  • FIG. 7 is a block diagram showing the configuration of a television tuner according to the related art.
  • FIG. 7 shows the configuration from an antenna to an intermediate-frequency amplifying circuit.
  • a television tuner 100 shown in FIG. 7 includes a UHF-side block 101 and a VHF-side block 102.
  • the UHF-side block 101 includes an antenna tuning circuit 111, a high-frequency amplifying circuit 112, an interstage tuning circuit 113, and a mixing circuit 114. All the elements are sequentially connected in a cascade manner.
  • the VHF-side block 102 includes an antenna tuning circuit 121, a high-frequency amplifying circuit 122, an interstage tuning circuit 123, and a mixing circuit 124. All the elements are sequentially connected in a cascade manner.
  • a high-band or low-band high-frequency signal of a VHF band is extracted by the antenna tuning circuit 121, and the extracted signal is amplified by the high-frequency amplifying circuit 122.
  • a desired television signal is selected according to a tuning voltage corresponding to channel-selection data by the interstage tuning circuit 123, and the selected television signal is output to the mixing circuit 124 in an unbalance manner.
  • the interstage tuning circuit 113 of the VHF-side block 102 is an unbalanced circuit of an unbalanced output type.
  • the interstage tuning circuit 113 is coupled to only one input terminal of the mixing circuit 124 having a differential circuit, and the other input terminal thereof is fixedly grounded.
  • the mixing circuit 124 mixes a local oscillation signal, which is input from a VHF high-band oscillation circuit 125 or a VHF low-band oscillation circuit 126, and the selected television signal, and performs frequency conversion of the mixed signal into an intermediate-frequency signal.
  • the intermediate-frequency signal of the selected television signal is extracted by an intermediate-frequency tuning circuit 131, is amplified by an intermediate-frequency amplifier 132, and is input to a rear-stage circuit (not shown).
  • a television signal of a UHF band is extracted by the antenna tuning circuit 111 and is amplified by the high-frequency amplifying circuit 112. Then, a desired television signal is selected according to a tuning voltage corresponding to channel-selection data by the interstage tuning circuit 113, and the selected television signal is output to the mixing circuit 114 in a balanced manner.
  • the interstage tuning circuit 113 of the UHF-side block 101 is a balanced circuit of a balanced output type.
  • the interstage tuning circuit 113 is coupled to both input terminals of the mixing circuit 114 having a differential circuit.
  • the mixing circuit 114 mixes a local oscillation signal, which is input from a UHF oscillation circuit 127, and the selected television signal, and performs frequency conversion of the mixed signal into an intermediate-frequency signal.
  • the intermediate-frequency signal of the selected television signal is extracted by the intermediate-frequency tuning circuit 131, is amplified by the intermediate-frequency amplifier 132, and is input to the rear-stage circuit (not shown).
  • the unbalanced input type mixing circuit 124 corresponding to the unbalanced output of the interstage tuning circuit 123 of the VHF-side block 2 and the balanced input type mixing circuit 114 corresponding to the balanced output of the interstage tuning circuit 113 of the UHF-side block 101 are separately provided, costs are increased and the size of the circuit is increased.
  • a portion 140 (the mixing circuits and the local oscillation circuits) surrounded by a dotted line is integrated as an integrated circuit, it is difficult to reduce the size because the two mixing circuits 114 and 124 exist together.
  • the balanced input type mixing circuit 114 is provided to correspond to the balanced output of the interstage tuning circuit 113 of the UHF-side block 101
  • the unbalanced input type mixing circuit 124 is provided to correspond to the unbalanced output of the interstage tuning circuit 123 of the VHF-side block 102.
  • Two front-stage circuits of an unbalanced output type and a balanced output type are provided.
  • two types of differential amplifying circuits that is, an unbalanced input type differential amplifying circuit and a balanced input type differential amplifying circuit are also provided. In this case, costs and the size of the circuit are increased.
  • the invention has been finalized in view of the above-described problems, and it is an object of the invention to provide an electronic circuit that, even though a balanced output and an unbalanced output exist together, can cope with both a balanced output and an unbalanced output by one high-frequency circuit, without separately providing a balanced input type high-frequency circuit and an unbalanced input type high-frequency circuit, and can realize a reduction in costs and size, and a television tuner having such a television tuner.
  • an electronic circuit includes a first high-frequency circuit that has first and second input terminals serving as differential input terminals, a second high-frequency circuit that has a first output terminal serving as an unbalanced output terminal, a third high-frequency circuit that has second and third output terminals serving as balanced output terminals, and a switch circuit that, in a first mode where the second high-frequency circuit is connected to the first high-frequency circuit, couples the first output terminal of the second high-frequency circuit to the first input terminal of the first high-frequency terminal and grounds the second input terminal of the first high-frequency terminal, and, in a second mode where the third high-frequency circuit is connected to the first high-frequency circuit, couples the second output terminal of the third high-frequency circuit to the first input terminal of the first high-frequency circuit and couples the third output terminal to the second input terminal.
  • the second high-frequency circuit in the first mode, is coupled to the first high-frequency circuit, and the first high-frequency circuit can operate as an unbalanced input type.
  • the third high-frequency circuit is coupled to the first high-frequency circuit, and the first high-frequency circuit can operate as a balanced input type. Accordingly, one high-frequency circuit can be switched between the unbalanced input type and the balanced input type by the switch circuit, and thus costs and size can be reduced.
  • the switch circuit may have a first switch unit that is provided between the first output terminal of the second high-frequency circuit and the first input terminal of the first high-frequency terminal, a second switch unit that is provided between the second output terminal of the third high-frequency circuit and the first input terminal of the first high-frequency circuit, and a third switch unit that is provided between a connection point of the third output terminal of the third high-frequency circuit and the second input terminal of the first high-frequency circuit, and a ground.
  • the first switch unit and the third switch unit may be closed, and the second switch unit may be opened.
  • the first switch unit and the third switch unit may be opened, and the second switch unit may be closed.
  • the first switch unit and the third switch unit are closed, and the second switch unit is opened.
  • the second high-frequency circuit is coupled to the first high-frequency circuit, such that the first high-frequency circuit can operate as an unbalanced input type.
  • the first switch unit and the third switch unit are opened, and the second switch unit is closed.
  • the third high-frequency circuit is coupled to the first high-frequency circuit, such that the first high-frequency circuit can operate as a balanced input type.
  • the first high-frequency circuit and the first to third switch units may be formed on an integrated circuit. Therefore, the balanced input type high-frequency circuit and the unbalanced input type high-frequency circuit do not need to be separately provided, and thus the size of the integrated circuit can be reduced.
  • FIG. 1 is a diagram showing the configuration of a television tuner according to an embodiment of the invention.
  • FIG. 1 shows the configuration from an antenna to an intermediate-frequency amplifying circuit, like FIG. 7.
  • the same parts as those of the television tuner shown in Fig. 7 are represented by the same reference numerals.
  • a television tuner 1 shown in FIG. 1 includes a UHF-side block 2 and a VHF-side block 3.
  • the UHF-side block 2 which serves as a third high-frequency circuit, includes an antenna tuning circuit 111, a high-frequency amplifying circuit 112, an interstage tuning circuit 113, and a mixing circuit 10, which is shared by the VHF-side block 3. All the elements are sequentially connected in a cascade manner.
  • the VHF-side block 3, which serves as a second high-frequency circuit includes an antenna tuning circuit 121, a high-frequency amplifying circuit 122, an interstage tuning circuit 123, and the mixing circuit 10, which is shared by the UHF-side block 2. All the elements are sequentially connected in a cascade manner.
  • the interstage tuning circuit 113 of the UHF-side block 2 and the interstage tuning circuit 123 of the VHF-side block 3 are connected to the mixing circuit 10, which serves as a first high-frequency circuit, through a switch circuit 4.
  • Local oscillation signals are supplied to the mixing circuit 10 from a VHF high-band oscillation circuit 125 or a VHF low-band oscillation circuit 126 and a UHF oscillation circuit 127.
  • an output of the intermediate-frequency amplifying circuit 132 is extracted as an output of the television tuner 1 by a tuning circuit (not shown). Then, the output is extracted as a video signal by a video detection circuit through an intermediate-frequency amplifying circuit and a SAW filter that are provided in a television receiver (not shown).
  • FIG. 2 is a diagram showing the circuit configuration from secondary sides of the interstage tuning circuits 113 and 123 to the mixing circuit 10.
  • an inductive element 141 On the secondary side of the interstage tuning circuit 123 of the VHF-side block 3, one end of an inductive element 141 is connected to a first terminal 11 of an IC board 20, on which the mixing circuit 10 is mounted, through a varactor diode 142, and is connected to a ground through another varactor diode 143.
  • a connection terminal to the first terminal 11 of the interstage tuning circuit 123 becomes a first output terminal serving as an unbalanced output terminal.
  • the other end of the inductive element 141 is connected in series to another inductive element 145 through a capacitor 144.
  • An oscillation voltage Vtu is applied to cathodes of the varactor diodes 142 and 143, and an unbalanced output signal of the interstage tuning circuit 123 is input to the first terminal 11 of the mixing circuit 10.
  • the other end of the inductive element 145 is connected to an inductive element of the primary side and a ground through another inductive element.
  • a varactor diode 152 is connected in parallel with an inductive element 151.
  • One end of the inductive element 151 is connected to a second terminal 12 of the IC board 20, on which the mixing circuit 10 is mounted, through an LC parallel circuit 153.
  • the other end of the inductive element 151 is connected to a third terminal 13 of the IC board 20 through an LC parallel circuit 154.
  • a connection terminal to the second terminal 12 of the interstage tuning circuit 113 becomes a third output terminal serving as a balanced output terminal.
  • a connection terminal to the third terminal 13 of the interstage tuning circuit 113 becomes a third output terminal serving as the other balanced output terminal.
  • a capacitor 155 is provided between one end of the inductive element 151 and the LC parallel circuit 153.
  • a capacitor 156 is provided between the other end of the inductive element 151 and the LC parallel circuit 154.
  • the other end of the inductive element 151 is connected to a ground through a resistive element 157.
  • the tuning voltage Vtu is applied to a cathode of the varactor diode 152, and the balanced output of the interstage tuning circuit 113 is applied to the second terminal 12 and the third terminal 13.
  • the first to third terminals 11 to 13 are provided on the IC board 20 having the mixing circuit 10, and the high-band oscillation circuit 125, the low-band oscillation circuit 126, and the UHF oscillation circuit 127 (not shown).
  • the switch circuit 4 has first to fourth transistors 14 to 17 as main parts.
  • the first transistor 14 that serves as a first switch unit, a base thereof is connected to a collector thereof and the first terminal 11.
  • An emitter of the first transistor 14 is connected to a base of a transistor Q1, which serves as a first input terminal of the mixing circuit 10. At the same time, the emitter thereof is connected to a ground through a resistive element 18.
  • the second transistor 15 that serves as a second switch unit, a base thereof is connected to a collector thereof and the second terminal 12. An emitter of the second transistor 15 is connected to the base of the transistor Q1, which serves as the first input terminal of the mixing circuit 10. At the same time, the emitter thereof is connected to the ground through the resistive element 18.
  • the third transistor 16 serving as a third switch unit has a collector, which is connected to the third terminal 13, the second terminal 12 through a resistive element 19, and a base of a transistor Q2, which serves a second input terminal of the mixing circuit 10. In addition, an emitter of the third transistor 16 is connected to the ground.
  • the third transistor 16 when the third transistor 16 is turned on, the second and third terminals 12 and 13, to which the balanced output of the UHF-side block 2 is applied, can be grounded. At the same time, the second input terminal (the base of the transistor Q2) of the mixing circuit 10 can also be grounded.
  • a bias voltage Vcc is applied to a collector of the fourth transistor 17.
  • An emitter of the fourth transistor 17 is connected to a collector and a base of the first transistor 14 through a resistive element 21.
  • the collector of the first transistor 14 is connected to the base thereof and is grounded through a resistive element 24.
  • the television tuner 1 has an IC for channel selection that has a PLL circuit therein.
  • the IC for channel selection outputs a band-switching voltage or a tuning voltage according to channel-selection data input from the television receiver.
  • the band-switching voltage includes Vlo for selecting a low-band of a VHF band, Vhi for selecting a high-band of a VHF band, and Vu for selecting a UHF band.
  • Vlo for selecting a low-band of a VHF band
  • Vhi for selecting a high-band of a VHF band
  • Vu for selecting a UHF band.
  • the ON signals BS1 and BS2, and the OFF signal BSE are applied to the bases of the third transistor 16 and the fourth transistor 17.
  • the PPL circuit of the IC for channel selection generates a tuning voltage on the basis of the channel-selection data, local oscillation signals output from the high-band oscillation circuit 125, the low-band oscillation circuit 126, and the UHF oscillation circuit 127, and a reference signal output from a reference oscillation circuit.
  • the relationship between the oscillation voltage Vtu and channel-selection data ch is shown in FIG. 5. On the basis of a tuning curve shown in FIG. 5, the tuning voltage Vtu depending on a selected channel is output.
  • a first differential circuit has the transistors Q1 and Q2.
  • Emitters of transistors Q3 and Q4 are connected to each other.
  • a second differential circuit has the transistors Q3 and Q4.
  • a connection point of the emitters of the transistors Q3 and Q4 is connected to the collector of the transistor Q1 constituting the first differential circuit.
  • Emitters of transistors Q5 and Q6 are connected to each other.
  • a third differential circuit is configured to have the transistors Q5 and Q6.
  • a connection point of the emitters of the transistors Q5 and Q6 is connected to the collector of the transistor Q2 constituting the first differential circuit.
  • a base of the transistor Q3 and a base of the transistor Q5 are connected to each other.
  • the base of the transistor Q4 and a base of the transistor Q6 are connected to each other.
  • Local oscillation signals from the respective oscillation circuits 125 to 127 are applied to the connection points of the transistors Q3 and Q5, and the transistors Q4 and Q6.
  • An intermediate-frequency signal is output between collectors of the transistors Q3 and Q6 that are connected to each other. Further, an intermediate-frequency signal is output between collectors of the transistors Q4 and Q5 that are connected to each other.
  • the intermediate-frequency signal is extracted from an output terminal (Mix out) of the IC board 20, and is input to the intermediate-frequency tuning circuit 131.
  • the ON signal BS1 is supplied so as to turn on the third transistor 16 and the fourth transistor 17.
  • a reference voltage of a mixing input circuit in the IC is controlled as a bias voltage BB1 for optimizing a mixing operation of the mixing circuit 10.
  • the mixing input circuit in the IC means an input circuit that guides a select television signal to the bases of the transistors Q1 and Q2.
  • the ON signal BS2 is supplied so as to turn on the third transistor 16 and the fourth transistor 17.
  • the reference voltage of the mixing input circuit in the IC is controlled as a bias voltage BB2 for optimizing a mixing operation of the mixing circuit 10.
  • FIG. 3 is a diagram illustrating the operation when the low-band or the high-band of the VHF band is selected.
  • the ON signals BS1 and BS2 for turning on the third transistor 16 and the fourth transistor 17 are supplied, as regards a balanced output of the interstage tuning circuit 113 of the UHF-side block 2, the second terminal 12 and the third terminal 13, to which the balanced output is applied from the interstage tuning circuit 113, are grounded through the collector and the emitter of the third transistor 16.
  • the first transistor 14 that has a gate connected to the first terminal 11 is turned on. In this case, the unbalanced output of the interstage tuning circuit 123 is applied to the first terminal 11.
  • the interstage tuning circuit 123 of the VHF-side block 3 is connected to the gate of the transistor Q1 serving as the first input terminal of the mixing circuit 10.
  • the gate of the transistor Q2 serving as the second input terminal of the mixing circuit 10 is grounded through the collector and the emitter of the third transistor 16.
  • the balanced input of the interstage tuning circuit 113 of the UHF-side block 2 is cut off, but the unbalanced input of the interstage tuning circuit 123 of the VHF-side block 3 is coupled to one input terminal of the mixing circuit 10. Further, the other input terminal of the mixing circuit 10 is grounded. Accordingly, the unbalanced input type mixing circuit 10 is formed.
  • the OFF signal BSE is supplied so as to turn off the third transistor 16 and the fourth transistor 17.
  • the reference voltage of the mixing input circuit in the IC is controlled as the bias voltage BBE for optimizing a mixing operation of the mixing circuit 10.
  • FIG. 4 is a diagram illustrating the operation when the UHF band is selected.
  • the OFF signal BSE is supplied so as to turn off the third transistor 16 and the fourth transistor 17.
  • the bias voltage Vcc is not applied to the collector of the first transistor 14, and the base of the first transistor 14 is grounded through the resistive elements 21 and 24.
  • the first transistor 14 is turned off, and the interstage tuning circuit 123 of the VHF-side block 3 and the first terminal (the base of the transistor 01) of the mixing circuit 10 are disconnected from each other.
  • the second terminal 12, to which one balanced output is applied from the interstage tuning circuit 113 of the UHF-side block 2 is coupled to the first input terminal (the gate of the transistor 01) of the mixing circuit 10 through the second transistor 15.
  • the third terminal 13, to which the other balanced output is applied from the interstage tuning circuit 113 of the UHF-side block 2 is coupled to the second input terminal (the base of the transistor Q2) of the mixing circuit 10.
  • the balanced input type mixing circuit 10 is formed, such that the interstage tuning circuit 113 of the UHF-side block 2 is coupled to the first input terminal (the base of the transistor Q1) and the second input terminal (the base of the transistor Q2) of the mixing circuit 10.
  • FIG. 6 is a gain characteristic diagram in the circuit configuration shown in FIG. 2.
  • FIG. 6 shows a gain of an IF output from the intermediate-frequency amplifying circuit 132 to an RF input to the antenna tuning circuits 111 and 121 when the UHF band is selected, when the high-band of the VHF band is selected, and when the low-band of the VHF band is selected.
  • a flat gain characteristic is obtained for all channels in the UHF band and the high band of the VHF band.
  • a flat gain characteristic is also obtained for a considerable number of channels in the low-band of the VHF band.
  • the mixing circuit 10, to which the balanced output is supplied from the interstage tuning circuit 113 of the UHF-side block 2, and the unbalanced output is supplied from the interstage tuning circuit 123 of the VHF-side block 3, can be switched between the balanced input type or the unbalanced input type by the switch circuit 4. Therefore, it is possible to cope with both the unbalanced output and the balanced output by using one mixing circuit 10. As a result, with one mixing circuit, a reduction in cost and size can be realized.
  • the invention may be applied to an electronic circuit which amplifies a balanced output and an unbalanced output from a front-stage high-frequency circuit by a rear-stage high-frequency amplifying circuit.
  • the unbalanced output is input to the high-frequency amplifying circuit, in a state where a second input terminal of the high-frequency amplifying circuit is grounded by a switch circuit, a first input terminal thereof is coupled to the front-stage unbalanced output type high-frequency circuit, and the front-stage balanced output type high-frequency circuit is disconnected.
  • the first input terminal and the second input terminal of the high-frequency amplifying circuit are coupled to the front-stage balanced output type high-frequency circuit by the switch circuit, and the front-stage unbalanced output type high-frequency circuit is disconnected.
  • the invention may be applied to a high-frequency circuit that is of an unbalanced input type or a balanced input type, like the above-described embodiment.
  • the television tuner is illustrated, but an electronic circuit according to the invention is not limited to the television tuner.
  • the invention may be applied to various kinds of electronic devices that have a balanced output and an unbalanced output together.
  • an electronic circuit that, even though a balanced output and an unbalanced output exist together, can cope with both a balanced output and an unbalanced output by one high-frequency circuit, without separately providing a balanced input type high-frequency circuit and an unbalanced input type high-frequency circuit, and can realize a reduction in costs and size, and a television tuner having such an electronic circuit.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Superheterodyne Receivers (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
EP06017566A 2005-08-29 2006-08-23 Mélangeur à cellule de Gilbert utilisant sélection de bande Withdrawn EP1760878A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005248236A JP4451827B2 (ja) 2005-08-29 2005-08-29 電子回路及びテレビジョンチューナ

Publications (1)

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EP1760878A1 true EP1760878A1 (fr) 2007-03-07

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EP06017566A Withdrawn EP1760878A1 (fr) 2005-08-29 2006-08-23 Mélangeur à cellule de Gilbert utilisant sélection de bande

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EP (1) EP1760878A1 (fr)
JP (1) JP4451827B2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6146345B2 (ja) * 2014-03-04 2017-06-14 ソニー株式会社 受信装置、チューナーおよび回路
TWI729588B (zh) * 2019-11-26 2021-06-01 立積電子股份有限公司 多模式處理電路及其多模式控制方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4912520A (en) * 1987-06-11 1990-03-27 Hitachi, Ltd. (501) Mixer circuit for use in a tuner of a television set or the like

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4499602A (en) * 1983-06-28 1985-02-12 Rca Corporation Double conversion tuner for broadcast and cable television channels
JPS6115426A (ja) * 1984-06-29 1986-01-23 Matsushita Electric Ind Co Ltd ミキサ装置
JPH0716134A (ja) 1993-06-30 1995-01-20 Naigai:Kk 簡易組み立て式折り畳み棚
US5619283A (en) * 1994-08-08 1997-04-08 Thomson Consumer Electronics, Inc. Double tuned RF circuit with balanced secondary
JP4626107B2 (ja) 2001-08-08 2011-02-02 ソニー株式会社 データ送信装置、ミキサ回路、及び携帯電話端末装置
EP1328064A1 (fr) * 2002-01-15 2003-07-16 Alps Electric Co., Ltd. Circuit d' accord de télévision intégré
JP2003309777A (ja) 2002-04-16 2003-10-31 Alps Electric Co Ltd テレビジョンチューナ

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4912520A (en) * 1987-06-11 1990-03-27 Hitachi, Ltd. (501) Mixer circuit for use in a tuner of a television set or the like

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US20070046834A1 (en) 2007-03-01
US7650124B2 (en) 2010-01-19
JP4451827B2 (ja) 2010-04-14
JP2007067566A (ja) 2007-03-15

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