EP1622274A3 - DC free data modulation - Google Patents

DC free data modulation Download PDF

Info

Publication number
EP1622274A3
EP1622274A3 EP05023733A EP05023733A EP1622274A3 EP 1622274 A3 EP1622274 A3 EP 1622274A3 EP 05023733 A EP05023733 A EP 05023733A EP 05023733 A EP05023733 A EP 05023733A EP 1622274 A3 EP1622274 A3 EP 1622274A3
Authority
EP
European Patent Office
Prior art keywords
data streams
multiplexed
code
rll
random data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP05023733A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP1622274A2 (en
Inventor
Jae-Seong Shim
Jin-Han Kim
Kiu-Hae Jung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020020058809A external-priority patent/KR100657259B1/ko
Priority claimed from KR1020020063534A external-priority patent/KR100677105B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of EP1622274A2 publication Critical patent/EP1622274A2/en
Publication of EP1622274A3 publication Critical patent/EP1622274A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • H03M5/145—Conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Dc Digital Transmission (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
EP05023733A 2002-09-27 2003-09-25 DC free data modulation Withdrawn EP1622274A3 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1020020058809A KR100657259B1 (ko) 2002-09-27 2002-09-27 데이터 변조 방법 및 코드 배치 방법
KR1020020063534A KR100677105B1 (ko) 2002-10-17 2002-10-17 데이터 변조 방법과 장치, 데이터 복조 방법 및 장치
EP03256024A EP1404022A3 (en) 2002-09-27 2003-09-25 DC free data modulation

Related Parent Applications (2)

Application Number Title Priority Date Filing Date
EP03256024A Division EP1404022A3 (en) 2002-09-27 2003-09-25 DC free data modulation
EP03256024.5 Division 2003-09-25

Publications (2)

Publication Number Publication Date
EP1622274A2 EP1622274A2 (en) 2006-02-01
EP1622274A3 true EP1622274A3 (en) 2011-11-23

Family

ID=31980695

Family Applications (2)

Application Number Title Priority Date Filing Date
EP05023733A Withdrawn EP1622274A3 (en) 2002-09-27 2003-09-25 DC free data modulation
EP03256024A Ceased EP1404022A3 (en) 2002-09-27 2003-09-25 DC free data modulation

Family Applications After (1)

Application Number Title Priority Date Filing Date
EP03256024A Ceased EP1404022A3 (en) 2002-09-27 2003-09-25 DC free data modulation

Country Status (5)

Country Link
US (9) US7034719B2 (ja)
EP (2) EP1622274A3 (ja)
JP (2) JP3947510B2 (ja)
CN (2) CN1510840B (ja)
TW (2) TWI288532B (ja)

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JP3602509B2 (ja) * 2002-02-26 2004-12-15 松下電器産業株式会社 復調装置および復調方法
US7218255B1 (en) * 2002-12-04 2007-05-15 Marvell International Ltd. Methods and apparatus for improving minimum Hamming weights of a sequence
US7158058B1 (en) 2002-12-09 2007-01-02 Marvell International Ltd. Method and apparatus for generating a seed set in a data dependent seed selector
TWI256198B (en) * 2005-02-03 2006-06-01 Ind Tech Res Inst Method and apparatus of converting data words into code words
US7587641B1 (en) * 2006-06-07 2009-09-08 Neil James Alexander Sloane Encoding of data into constant weight codes
JP2008004195A (ja) * 2006-06-23 2008-01-10 Toshiba Corp ラン長制限装置及びラン長制限方法
US8218685B2 (en) * 2009-03-30 2012-07-10 Applied Micro Circuits Corporation Data slicer threshold adjustment for disparity controlled signals

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EP1251641A2 (en) * 2001-04-20 2002-10-23 Samsung Electronics Co., Ltd. Code generation and allocation method

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Publication number Priority date Publication date Assignee Title
EP0343930A2 (en) * 1988-05-24 1989-11-29 Sony Corporation Data signal processing apparatus
US6324138B1 (en) * 1996-10-11 2001-11-27 Sanyo Electric Co., Ltd. Digital disk recording and reproduction apparatus
EP1047197A2 (en) * 1999-04-21 2000-10-25 Samsung Electronics Co., Ltd. RLL modulation with enhanced DC suppression
EP1187335A2 (en) * 2000-09-06 2002-03-13 Samsung Electronics Co., Ltd. Method of modulating and/or demodulating RLL code having enhanced direct current suppression capability
EP1251641A2 (en) * 2001-04-20 2002-10-23 Samsung Electronics Co., Ltd. Code generation and allocation method

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Also Published As

Publication number Publication date
US20040061631A1 (en) 2004-04-01
US7450034B2 (en) 2008-11-11
US7450035B2 (en) 2008-11-11
TW200405672A (en) 2004-04-01
US7142133B2 (en) 2006-11-28
CN1510840A (zh) 2004-07-07
JP2004120763A (ja) 2004-04-15
US20060202877A1 (en) 2006-09-14
US7312728B2 (en) 2007-12-25
JP3947510B2 (ja) 2007-07-25
CN1601643A (zh) 2005-03-30
CN1510840B (zh) 2010-05-26
EP1404022A3 (en) 2005-11-16
US20080068232A1 (en) 2008-03-20
US20060092060A1 (en) 2006-05-04
US7876241B2 (en) 2011-01-25
TWI288532B (en) 2007-10-11
US7142136B2 (en) 2006-11-28
US7034719B2 (en) 2006-04-25
US20080094262A1 (en) 2008-04-24
JP2004236364A (ja) 2004-08-19
TWI271936B (en) 2007-01-21
TW200419927A (en) 2004-10-01
JP4559112B2 (ja) 2010-10-06
US20050073447A1 (en) 2005-04-07
US20080068233A1 (en) 2008-03-20
EP1622274A2 (en) 2006-02-01
US7164373B2 (en) 2007-01-16
EP1404022A2 (en) 2004-03-31
US20050275569A1 (en) 2005-12-15
US20060202878A1 (en) 2006-09-14
US7315263B2 (en) 2008-01-01

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