EP1332516A1 - Procede pour l'application d'un substrat - Google Patents

Procede pour l'application d'un substrat

Info

Publication number
EP1332516A1
EP1332516A1 EP01988946A EP01988946A EP1332516A1 EP 1332516 A1 EP1332516 A1 EP 1332516A1 EP 01988946 A EP01988946 A EP 01988946A EP 01988946 A EP01988946 A EP 01988946A EP 1332516 A1 EP1332516 A1 EP 1332516A1
Authority
EP
European Patent Office
Prior art keywords
substrate
protective layer
wafer
pressure
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01988946A
Other languages
German (de)
English (en)
Inventor
Pirmin Gerhard Muffler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suess Microtec Lithography GmbH
Original Assignee
SUESS MICROTEC LABORATORY EQUIPMENT GmbH
Suess Microtec Laboratory Equipment GmbH
SUSS MicroTec Laboratory Equipment GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SUESS MICROTEC LABORATORY EQUIPMENT GmbH, Suess Microtec Laboratory Equipment GmbH, SUSS MicroTec Laboratory Equipment GmbH filed Critical SUESS MICROTEC LABORATORY EQUIPMENT GmbH
Publication of EP1332516A1 publication Critical patent/EP1332516A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/0007Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding involving treatment or provisions in order to avoid deformation or air inclusion, e.g. to improve surface quality
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/18Handling of layers or the laminate
    • B32B38/1866Handling of layers or the laminate conforming the layers or laminate to a convex or concave profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67132Apparatus for placing on an insulating substrate, e.g. tape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices

Definitions

  • the invention relates to a method for applying a substrate according to the preamble of claim 1 and an apparatus for performing this method.
  • a semiconductor wafer is subjected to different, successive processes.
  • An important step after applying different structures and layers on the front (active side or side on which the applied layers are located) is the application of a protective layer on this active side.
  • This protective layer has the task of the top and the wafer to protect their sensitive surface during the subsequent processing process, for example thinning the wafer by grinding or lapping. The thinning process takes place on the back of the wafer and has a decisive influence on the remaining thickness of the wafer.
  • a wafer surface that is as flat as possible is very important.
  • One parameter for this surface quality is the quality of the wafer base, which is formed from the mounting support itself and the applied protective layer. Unevenness of these two elements affect the back of the wafer to be processed. Methods to improve this situation are known.
  • EP-A2-0 924 759 describes a special mixture of substances for assembling and disassembling a semiconductor wafer.
  • DE-A 1 -43 32 488 a film is drawn as flat as possible by means of the adhesive force.
  • Reversible adhesive layers are also common. It has been shown that despite the complex preparation of the wafer base there is a disadvantage inherent in the system.
  • the inclusion of a protective layer between the active wafer side and the mounting carrier creates air pockets which cause unevenness on the back of the wafer. These air pockets can hardly be removed by increasing the contact pressure or by distributing the local pressure locations. Even repeated repetitions of the pressing process do not lead to the desired success. Such manipulations also increase the risk of the wafer breaking in an uncontrolled manner.
  • Adhesive tape to be removed.
  • the object of the invention is to remedy this and to connect the wafer to the protective layer without any undue procedural effort without any air bubbles whatsoever.
  • the protective layer is initially arranged at a distance from the protective layer and is convexly curved by means of a printing medium
  • Wafer edge remains held.
  • the wafer is then brought into contact with the protective layer and / or adhesive layer in a linear movement.
  • the wafer is placed over the entire surface of the protective layer from the first contact point to its edge. This ensures that a homogeneous displacement movement between the layers takes place from a central point by transferring the dome-shaped wafer shape into a flat surface. Due to the pressure medium, the wafer can react flexibly to irregularities in the upper protective layer surface. With this procedure, air bubbles hardly arise or are pushed outwards in the radial direction and safely eliminated.
  • the substrate is exposed to an almost constant pressure when it is placed on the protective layer. This ensures a largely constant, uniform and only slight penetration depth of the substrate into the protective layer. This is achieved by continuously monitoring the distance between the two bodies as the preformed substrate approaches the protective layer.
  • the substrate curvature and the laying of the substrate on the protective layer are carried out from a carrier body by controlling the medium pressure in the cavity between the substrate and the carrier body.
  • speed and the spatial shape of the substrate are changed accordingly so that the outer surface of the dome-shaped substrate spreads two-dimensionally on the protective layer without any noteworthy local differences
  • the degree of the curvature can be freely controlled in terms of time and space in order to ensure a uniform depositing of the substrate on the protective layer.
  • the medium pressure is controlled in such a way that first a maximum pressure is maintained until the substrate comes into contact with the protective layer and then the maximum pressure is gradually reduced until the substrate edge is in place.
  • the substrate edge is held with negative pressure.
  • the invention also relates to a device with a support body which is movable with respect to the mounting support, the side of which facing the protective layer is planar, supports the substrate and is provided with flow openings for the medium, which are designed as centrally formed pressure channels and peripheral suction grooves close to the periphery.
  • the pressure channels with their supply air lines serve to bend the wafer by means of overpressure
  • the suction grooves are provided with suction lines in order to hold the substrate at its edges by means of vacuum and also to set it down.
  • a further embodiment of the invention provides that the side of the support body facing the protective layer is preferably circular, oval or n-shaped.
  • the said side is preferably circular in plan view; however, other shapes are also possible, such as oval or polygonal.
  • the method makes it possible to provide the active side of the substrate with a protective layer, thereby completely eliminating the inclusion of air bubbles. As a result, the back of the substrate is not affected by unevenness in the following work step. By using the method it is possible to optimize the thinning of the substrate thickness. Furthermore, the favorable initial position of the surface can reduce possible damage (micro cracks, etc.).
  • FIGS. 1-4 show the time sequence of the method according to the invention for applying the active side of a wafer 4 into a protective layer 5.
  • FIG. 1 shows the initial phase of the process that takes place according to the method.
  • Feed arm 1 guides a support body 2 in a linear movement to an assembly support 6, on which a prepared protective layer 5 is applied.
  • the supporting body 2 has at least one preferably central, open channel 7 on its lower side, which is supplied with excess pressure by a medium (see arrows).
  • Circular groove-shaped flow openings 3 are provided on the periphery of the underside of the support body 2, through which the medium is sucked off. In the initial phase, this negative pressure serves to hold and fix the wafer 4 at the edges of its rear side. As soon as a sufficient holding force is achieved through the suction effect, an overpressure is applied concentrically via the channel 7.
  • This overpressure is dimensioned such that the wafer bulges outwards, but does not exceed the holding force due to the suction effect at the edge of the wafer 4.
  • the spatial shape of the wafer 4 is thus changed, but is still fixed in the center.
  • the wafer 4 is gradually moved toward the mounting support 6 with the protective layer 5.
  • FIG. 2 shows that the wafer has reached the destination, the protective layer 5. This phase is detected by appropriate sensors and the feed speed is reduced so that the protruding part of the curved
  • FIG. 3 shows that the correlation between the reshaping of the bulged wafer and the remaining feed path has now taken place.
  • Channel 7 is withdrawn, the wafer reverts to its original shape, and at the same time an almost constant contact pressure between the active wafer side and the protective layer 5 is ensured by further lowering the feed arm 1.
  • the surface of the wafer unrolls evenly from the central point of contact to the edge and systematically pushes possible air bubbles in front of it towards the edge.
  • the wafer 4 shows the final phase of the application of the wafer 4 into the protective layer 5.
  • the wafer 4 has completely reverted into its elongated shape and now rests in the protective layer parallel to the mounting carrier 6.
  • the negative pressure in the flow openings 3 for holding the wafer 4 is lifted, and the wafer 4 detaches from the support body 2, which then moves back.
  • the wafer 4 could also be attached to the mounting bracket 6 electrostatically.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Quality & Reliability (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

L'invention concerne un procédé pour l'application d'un substrat plan à paroi mince, notamment d'une plaquette de semi-conducteur, sur un support de montage pourvu de préférence d'une couche protectrice plane, par exemple de la cire. Selon l'invention, le substrat est placé à distance de la couche protectrice et cintré pour présenter une courbure convexe, puis mis en contact avec la couche protectrice avant d'être finalement posé sur toute sa surface sur la couche protectrice, à partir du point de contact et jusqu'à son bord. La courbure du substrat est obtenue au moyen d'un milieu de pression, notamment de l'air ou un liquide, qui agit sur la face du substrat opposée à la couche protectrice alors que le bord du substrat est maintenu.
EP01988946A 2000-10-20 2001-10-15 Procede pour l'application d'un substrat Withdrawn EP1332516A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10052293 2000-10-20
DE10052293A DE10052293A1 (de) 2000-10-20 2000-10-20 Verfahren zum Aufbringen eines Substrats
PCT/EP2001/011897 WO2002035591A1 (fr) 2000-10-20 2001-10-15 Procede pour l'application d'un substrat

Publications (1)

Publication Number Publication Date
EP1332516A1 true EP1332516A1 (fr) 2003-08-06

Family

ID=7660612

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01988946A Withdrawn EP1332516A1 (fr) 2000-10-20 2001-10-15 Procede pour l'application d'un substrat

Country Status (5)

Country Link
US (1) US6841027B2 (fr)
EP (1) EP1332516A1 (fr)
AU (1) AU2002220632A1 (fr)
DE (1) DE10052293A1 (fr)
WO (1) WO2002035591A1 (fr)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ITTO20010823A1 (it) * 2001-08-22 2003-02-22 Taltos S P A Processo per la realizzazione di un pannello composito pietra-vetro epannello ottenuto con tale processo.
JP2005235243A (ja) * 2004-02-17 2005-09-02 Tdk Corp 情報記録媒体製造方法および情報記録媒体製造装置
JP4841412B2 (ja) * 2006-12-06 2011-12-21 日東電工株式会社 基板貼合せ装置
US8123894B2 (en) * 2008-05-07 2012-02-28 Apple Inc. 3-dimensional curved substrate lamination
EP2593586B1 (fr) 2010-07-15 2017-09-06 Luxembourg Institute of Science and Technology (LIST) Support de substrat, et procédé de réunir un premier et un second substrat
US8808483B2 (en) 2010-11-05 2014-08-19 Apple Inc. Method of making a curved touch panel
JP5973203B2 (ja) * 2012-03-29 2016-08-23 リンテック株式会社 シート貼付装置および貼付方法
KR101382601B1 (ko) * 2012-07-02 2014-04-17 삼성디스플레이 주식회사 유기 발광 표시 장치의 제조 장치 및 그 방법
KR101932124B1 (ko) * 2013-04-03 2018-12-26 삼성디스플레이 주식회사 지그 조립체, 라미네이트 장치 및 이를 이용한 라미네이트 방법
WO2015048276A1 (fr) * 2013-09-27 2015-04-02 3M Innovative Properties Company Procédé d'application de décalcomanie automatique assisté par un robot sur des surfaces en trois dimensions complexes
DE102014106100A1 (de) * 2014-04-30 2015-11-05 Ev Group E. Thallner Gmbh Verfahren und Vorrichtung zum Vergleichmäßigen eines Substratstapels
CN111798780B (zh) * 2020-08-10 2023-07-28 京东方科技集团股份有限公司 测试装置及测试方法
CN112894277A (zh) * 2021-01-19 2021-06-04 湖北凯梦科技有限公司 一种流线体形薄壁件的制备方法及其应用
CN116130384B (zh) * 2022-12-16 2023-10-24 江苏宝浦莱半导体有限公司 一种半导体晶圆贴膜工艺

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US3322598A (en) * 1963-10-02 1967-05-30 Alvin M Marks Laminator for securing continuous flexible film to a base
US3554834A (en) * 1968-07-24 1971-01-12 Corning Glass Works Decal applying
US3955163A (en) * 1974-06-24 1976-05-04 The Computervision Corporation Method of positioning a semiconductor wafer for contact printing
DE2608427C2 (de) * 1976-03-01 1984-07-19 Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH, 8263 Burghausen Verfahren zum Aufkitten von Halbleiterscheiben
JPS6035250B2 (ja) * 1978-06-19 1985-08-13 松下電器産業株式会社 可撓性フイルムの接着方法
JP2808794B2 (ja) * 1990-02-22 1998-10-08 ソニー株式会社 両面光ディスク
US5131968A (en) * 1990-07-31 1992-07-21 Motorola, Inc. Gradient chuck method for wafer bonding employing a convex pressure
DE4332488C2 (de) * 1993-09-24 1996-05-30 Bosch Gmbh Robert Vorrichtung zum Aufbringen einer Trägerfolie
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JPH1012578A (ja) * 1996-06-26 1998-01-16 Mitsubishi Electric Corp ウエハ・支持基板貼付け方法,及びウエハ・支持基板貼付け装置
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JPH10275852A (ja) * 1997-03-31 1998-10-13 Shin Etsu Handotai Co Ltd 半導体基板の接着方法および接着装置
EP1038315A4 (fr) 1997-11-11 2001-07-11 Irvine Sensors Corp Procede d'amincissement de plaquettes en semi-conducteur a circuits et plaquettes ainsi produites
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Also Published As

Publication number Publication date
US6841027B2 (en) 2005-01-11
AU2002220632A1 (en) 2002-05-06
WO2002035591A1 (fr) 2002-05-02
US20020062921A1 (en) 2002-05-30
DE10052293A1 (de) 2002-04-25

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