EP1269455B1 - Method and apparatus for driving a digital display by distributing pwm pulses over time - Google Patents

Method and apparatus for driving a digital display by distributing pwm pulses over time Download PDF

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Publication number
EP1269455B1
EP1269455B1 EP01915598A EP01915598A EP1269455B1 EP 1269455 B1 EP1269455 B1 EP 1269455B1 EP 01915598 A EP01915598 A EP 01915598A EP 01915598 A EP01915598 A EP 01915598A EP 1269455 B1 EP1269455 B1 EP 1269455B1
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EP
European Patent Office
Prior art keywords
time period
signals
pulsed signals
output
signal
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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EP01915598A
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German (de)
English (en)
French (fr)
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EP1269455A1 (en
Inventor
Antony Van De Ven
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Lighthouse Technologies Ltd
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Lighthouse Technologies Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/04—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
    • G09G3/06—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources
    • G09G3/12—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources using electroluminescent elements
    • G09G3/14—Semiconductor devices, e.g. diodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0261—Improving the quality of display appearance in the context of movement of objects on the screen or movement of the observer relative to the screen

Definitions

  • This invention relates to a method and apparatus for driving a digital display by distributing pulse width modulated pulses over time.
  • a method and apparatus may be implemented in the field of digital display screens such as LED or LCD screens or projectors, plasma television or other display screens using digital information.
  • each pixel may comprise a plurality of different coloured LED elements to provide the desired colour range. Again, typically, these may comprise a red, blue and green LED element.
  • the range of colours can be provided by providing different intensities to the illumination of the red, green and blue elements individually.
  • the variation in intensity for each LED element is typically achieved by the relative percentage of time that each element is energized.
  • Such digital displays may operate at a variety of refresh frequencies.
  • a typical frequency would be around 60 Hz to provide a relatively continuous apparent signal to the human eye.
  • each pixel needs to display the desired colour and provide the appropriate energy levels to each LED element within a period of 1/60 th of a second.
  • the variation in energy level over the refresh period is provided by only illuminating the LED element for a suitable portion of that refresh period.
  • the elements are not generally manipulated by providing higher or lower energy levels over the time period but instead by providing a set power level to illuminate the element only for that percentage of the refresh period as is necessary to provide the relevant percentage of intensity of that colour averaged over the period. Often there may be non-linear response to changes in current applied to such elements. Therefore, it is generally more desirable to vary the amount of time the element is energized rather than vary the instantaneous current supplied and maintaining this for the whole period.
  • the various degrees of intensity of each colour are provided by illuminating the appropriate element for the appropriate portion of "T" as is required.
  • the element may be energized for the first half of the time period "T". Different intensities are provided by changing this portion of the time period "T" from the commencement of the period.
  • a 50% intensity may provide the energization of the element only through the first half of the time period "T". If the image is static, the subsequent time period "T" is similarly energized and the average distribution creates no particular visual distortion. However, if a moving image is projected on the screen, pixels on the boundary of that moving image are required to significantly change intensity between successive refresh cycles.
  • This visual effect of shimmer creates a bright or dark line that trails moving images across the screen.
  • the first approach is to significantly reduce the refresh cycle. Although this does not stop the effect from occurring, the significantly faster refresh cycle may reduce the effect apparent to the human eye. Generally the effect will become apparent on images that move across the display faster.
  • the difficulty with such a proposal is that a decrease in the refresh cycle significantly increases the processing required for the display and complicates the hardware involved to increase cost.
  • the most economic refresh period is just slightly faster than the detection rate of the human eye.
  • PWM pulse width modulation
  • time intervals may represent a block of period "T” representing 50% of the period "T”, a second block representing 25% of the period "T”, a further block representing 12.5% of the period "T”, etc.
  • the 50% and 12.5% discrete time intervals can be utilized to provide this value. If these are non-adjacent time intervals throughout the overall time period "T", some averaging occurs. Typically, the 50% time interval may be adjacent to one end of the time period "T", the 25% interval adjacent that 50% interval, the 12.5% interval adjacent the 25% interval and distal from the 50% interval, etc.
  • the 5/8 or 62.5% intensity provides two blocks of time during which the display element such as an LED element is illuminated, separated by the 25% time interval during which the element is not energized.
  • Eproms include lookup tables to provide the required averaged signals.
  • FIG. 1 A typical apparatus to implement this is shown schematically in Fig. 1 .
  • FIG. 2 A portion of individual lines of memory within the Eprom shown for typical memory locations 128 and 64 are provided in Fig. 2 for the sake of explanation.
  • FIG. 1 a simplified portion of apparatus is shown to drive a single LED element 1.
  • a video signal or similar may be received by an overall system in analogue form and converted to digital format.
  • the data is expressed as a digital number representing the degree of intensity of that particular LED within that refresh cycle time period.
  • the data may be provided as a digital signal 2 in the form of an 8-bit binary number.
  • the number of bits in the binary digital signal simply determine the number of graduations of intensity for each element.
  • An 8-bit signal provides 256 discrete binary numbers that can represent 256 separate degrees of intensity for the LED element 1 over the time period "T". This can change as desired and it should be noted, at least when provided to a pixelated screen having red, blue and green components, the final colour of the pixel is determined by the mixed ratio of each of these three elements. Therefore, 256 graduations for each of the three colours provides an overall range of colours for the final pixel in excess of 16.7 million.
  • the data signal is provided to an Eprom 3.
  • the Eprom 3 would hold at least 256 discrete memory locations, one for each possible degree of intensity desired from the incoming data.
  • Attached to the Eprom is a counter 4 which, in this prior art embodiment, is provided as a matching 8-bit counter.
  • a clock 5 drives the counter 4.
  • the number of bits for the counter do not need to match the number of data bits and can be increased if desired. It is unlikely that the number of bits would be reduced as this will reduce some of the discrete degrees of intensity available to the LED 1.
  • the clock 5 drives the counter so that the refresh cycle "T" is split into a number of discrete smaller time portions. In the case of an 8-bit counter 4, this will comprise 256 discrete time portions each represented by a successive binary number from the counter 4.
  • the memory location may similarly comprise a sequence of bits with the length of the sequence being determined by the number of discrete values generated by the counter 4.
  • each memory location in the Eprom may comprise a string of 256 individual bits.
  • FIG. 2 a portion of the memory locations for the memory locations representing a data input of 128 or 64 are shown. These are merely typical portions of memory locations to aid the explanation of this prior art.
  • the data 2 may be provided as the binary number equivalent to 128 of the 256 possible binary numbers of an 8-bit representation.
  • the memory location 128 as shown in Fig. 2 shows the first 16 of some 256 bits in the memory location 128.
  • every second bit in the 128 address contains a "1" to illuminate the LED 1.
  • the Eprom successfully distributes pulses over the period of time "T" for each discrete incoming data signal.
  • Eproms are capable of generating signals for multiple individual LED elements. Therefore, it is not necessary to provide a separate Eprom for each LED element.
  • the actual number of LED elements 1 that can be addressed by each Eprom 3 is determined by more than simply the speed of the Eprom 3 but also the ability to provide a communication path to the LED element 1 that operates at sufficient speed also.
  • a typical prior art system may utilize 6 Eproms on a driving board for a section of 512 pixels, each containing 3 LED elements.
  • JP 10 268826 A discloses a device and method for displaying a video signal, in which a counter/comparator combination is used to generate pulse width modulated gray scale selection waveforms. Between the counter and comparator the bits are reordered such that the gray scale selection waveforms consist of distributed pulses.
  • JP 03 246592 A discloses a gradational display, in which a dot clock signal and a vertical synchronising signal which are synchronised with display data are inputted to pattern waveform generating circuits. 3-bit display data is inputted to a decoder circuit, to output decoding outputs.
  • the decoder output signals are inputted to an AND and OR circuit together with output signals of thinned-out pattern waveform generating circuits.
  • the output signal of the AND and OR circuit is a data thinned-5 out gradation control signal and inputted as display data to an interface circuit.
  • the present invention is a method of driving a digital display as defined in 5 Claim 1 of the appended claims, and apparatus as defined in Claim 5.
  • This invention relates to a method and apparatus for driving a digital display by distributing pulse width modulated pulses over a period of time.
  • the implementation is in the form of a display screen that displays a digital data signal 2.
  • the display screen may be represented by a single LED element 1.
  • the invention is implemented through the control of a plurality of such LED elements 1 formed into individual pixels.
  • the invention is not restricted to LED elements as digital data for other display systems such as plasma TV, LCD projectors, LCD screens and similar apparatus all suffer from the same inherent problems and the need to distribute a pulse width modulated signal over the refresh cycle.
  • a preferred embodiment shown in Fig. 3 shows an embodiment to drive a single LED 1 with a pulse width modulated signal 6.
  • FIG. 3 the apparatus will be described with reference to providing a distributed pulse width modulated signal representing a single 8-bit item of data 2. Although this apparatus is described with reference to 8-bit digital data, this is merely due to 8-bit digital data being relatively standard in the industry. Variations on this can and do occur.
  • the invention provides a signal generator 7 that outputs a plurality of pulsed signals 8.
  • Each of the pulsed signals 8 may be combined with any one or more of the other pulsed signals 8 to provide a variety of distributions of pulses over the overall time period.
  • the data 2 may be combined with these individual pulsed signals 8 to determine the mix of those signals necessary to correctly represent the data 2. This is then provided as the pulsed signal 6 in cumulative form through to the LED 1.
  • the signal generator 7 to provide the plurality of signals seeks to provide signals that can be easily combined to provide the variety of ranges necessary to represent the various graduations of the digital data. Furthermore, it is desired that the signals be able to be combined so that the pulses provide a variety of the percentages of the time period covered by pulses compared with the period of time without any pulses. It is not intended that they be combined to increase the amplitude of individual pulses.
  • the plurality of pulsed signals 8 are ideally comprised of pulsed signals where any individual pulse of any signal covers a discrete time period compared with the pulses of the other signals with which it may be combined. At any particular instance within the time period, a pulse can only be provided by one of the plurality of pulsed signals 8.
  • the invention seeks to implement the invention with a logic circuit to generate these pulses and act as a signal generator 7.
  • the circuit in this preferred embodiment comprises a clock 5, counter 4, priority encoder 9 and a decoder 10.
  • this data may comprise any one of 256 unique binary numbers representing the decimal numbers 0 to 255.
  • this preferred embodiment utilizes a clock 5 and an 8-bit counter 4 such that the time period "T" matching the refresh cycle may be split into a plurality of smaller time divisions.
  • the use of an 8-bit counter 4 splits the refresh time period "T” into 256 smaller time periods, each represented by a successive binary output from the counter 4.
  • the number of time divisions into which the refresh cycle is split does not need to match the number of graduations possible in the digital data.
  • the digital data comprises an 8-bit signal
  • this preferred form matches that data with an 8-bit counter 4 for the sake of full processing of the data and clear explanation.
  • the counter 4 can be a greater number such as a 10-bit counter with the increase in bits used for other purposes.
  • a counter 4 using a smaller bit signal such as a 6-bit signal is also possible although this would reduce the combinations possible and not fully utilize all the graduations available from the 8-bit digital signal.
  • the counter 4 generates 256 numeric binary signals within the time period "T".
  • Each of the 8 output bits designated as Q 0 to Q 7 on counter 4 are mapped to input bits on the priority encoder 9.
  • a priority encoder seeks to determine the order of the incoming binary number. Priority encoders generally identify the highest active bit within the 8-bit combination.
  • the preferred signals comprise a signal having a pulse covering every second of the 256 time divisions, a further signal having a pulse every 4 th time division, a further pulsed signal having a pulse every 8 th time division, etc. and where the pulses do not overlap with each other.
  • the frequency of these pulses matches the frequency occurrence of the activity of the bits from the counter 4.
  • the output bit Q 7 is the highest active bit for 50% of the time period being the highest active bit for half the numbers generated by the counter 4. However, it is the highest active bit only for the last 50% of the numbers generated and to consider this as a possible source for signal generation would lead to a pulsed signal which, although representing half of the available time period, is concentrated over the final 50% of the time period and not distributed throughout the time period.
  • the invention recognizes that the desired distribution of pulses is generated not by the highest active bit but instead by the lowest active bit from the counter 4.
  • the Q 0 bit will be the lowest active bit on every second of the 256 binary numbers.
  • the output bit Q 7 is the lowest active bit only for the binary number "10000000". This is a single occurrence only.
  • the priority encoder 9 is connected to the counter 4 such that, instead of recognizing the highest active bit, it actually recognizes the lowest active bit from the counter 4. This is simply achieved by reversing the mapping of output and input bits between the connection such that the lowest output bit of the counter 4 being bit Q 0 is mapped to the highest input bit I 7 of the priority encoder 9. This is shown by connections 11 as shown in Fig. 3 .
  • the output from the priority encoder 9 comprises 256 successive binary numbers, each being a 3-bit number representing the decimal numbers 0 to 7 indicating the highest active bit as recognized by the input to the priority encoder 9. This succession of 3-bit numbers may be communicated by connections 12 to a decoder 10.
  • a signal along the communication 12 to the decoder 10 comprises a sequence of numbers generally in the form of the sequence :7, 6, 7, 5, 7, 6, 7, 4, 7....
  • the decoder 10 seeks to translate these 256 individual numbers into 8 pulsed signals. These are outputs by the decoder 10 from the output bits P 7 to P 0 .
  • the decoder 10 upon receiving an input signal representing the decimal number 7, outputs a pulse on output P 7 . Similarly, receipt of an input representing the decimal number 4 will create a pulse on output P 4 , etc.
  • the frequency of the occurrence of the decimal number 7 in the output from the priority encoder 9 is such that it occurs on every second of the 256 discrete outputs.
  • the output from the decoder 10 on output P 7 is a pulse every second of the 256 individual time segments.
  • FIG. 4 A simplified version of an output from a possible embodiment is shown in Figs. 4 and 5 .
  • the output from the decoder of a 3-bit generator would comprise a pulsed signal P 2 where a pulse is generated every second pulse, a signal P 1 where a pulse is generated every 4 th time division and a signal P 0 comprising a single pulse.
  • P 2 a pulsed signal
  • P 1 a pulse is generated every 4 th time division
  • P 0 a signal comprising a single pulse.
  • a cumulative output is shown representing the combination of the signals P 2 and P 0 . This provides five pulses distributed over the time period "T".
  • the pulses are not perfectly evenly distributed over the time period "T" for all combinations. As shown in Fig.5 , the five individual pulses are distributed as a single pulse, a block of three pulses and a further single pulse. As we are working with digital data, generating pulses during 8 discrete smaller time divisions of the overall period "T" does not allow perfectly even distribution unless the start and end points of the smaller time divisions "T" can themselves be asynchronized.
  • the data 2 may be combined with each of the plurality of signals 8 through the provision of AND gates 14.
  • the data 2 comprises a binary number from 0 to 255. If we take an example, the number 128 is represented in binary as "10000000". As shown in Fig. 3 , the data 2 may be provided through a buffer or similar 15 and the output of a signal such as the number 128 would create a "1" on the output O 7 . All the other outputs would be zero.
  • Tube O 7 bit from the data 2 is ANDed with the P 7 signal from the decoder 10.
  • the P 7 signal comprises 128 individual pulses timed at every second of the smaller time divisions.
  • the appearance of a "1" on the O 7 data bit and its incorporation through an AND gate leads to an output 16 of the P 7 signal.
  • the remaining data bits O 0 to O 6 are all zeros and their incorporation through AND gates with the signals on P 0 to P 6 respectively will suppress all the remaining pulsed signals on the outputs from the AND gates 14.
  • the output 6 supplied to the LED 1 is simply the P 7 output from the decoder 10.
  • a further example can be considered if the data 2 is the binary representation of the numeral 129.
  • the output from the buffer 15 will create a "1" on the O 7 bit and a "1" on the O 0 bit.
  • the P 7 and P 0 outputs from the decoder 10 are still in existence. All the other pulsed signals are suppressed.
  • These two signals are combined through the OR gate 17 such that the output 6 comprises some 129 pulses. This is the pulsed signal P 7 plus one additional pulse in the middle which will create a block of three consecutive pulses intermediate of the time period. This is sufficiently close to an even distribution to overcome the shimmer effects as described previously.
  • the invention provides both a method and apparatus that generates a series of pulses distributed over the time period to represent the various energy levels intended to be supplied to the display element 1.
  • the invention performs this without the need for expensive Eproms utilizing lookup tables or memory address segments and instead utilizes a logic circuit.
  • the logic circuit utilizes the frequency of occurrence of the lowest order bit from a counter to generate the required signals for subsequent combination with the incoming data.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of El Displays (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Liquid Crystal (AREA)
EP01915598A 2000-03-27 2001-03-26 Method and apparatus for driving a digital display by distributing pwm pulses over time Expired - Lifetime EP1269455B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US53552800A 2000-03-27 2000-03-27
US535528 2000-03-27
PCT/IB2001/000477 WO2001073736A1 (en) 2000-03-27 2001-03-26 Method and apparatus for driving a digital display by distributing pwm pulses over time

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EP1269455A1 EP1269455A1 (en) 2003-01-02
EP1269455B1 true EP1269455B1 (en) 2011-11-23

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EP (1) EP1269455B1 (zh)
JP (1) JP2003529100A (zh)
KR (1) KR20020093011A (zh)
CN (1) CN1272757C (zh)
AT (1) ATE534984T1 (zh)
AU (1) AU779338B2 (zh)
CA (1) CA2403939C (zh)
EA (1) EA005964B1 (zh)
HK (1) HK1052789B (zh)
MY (1) MY126157A (zh)
TW (1) TW581999B (zh)
WO (1) WO2001073736A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018208850A1 (en) * 2017-05-08 2018-11-15 Compound Photonics Limited Drive techniques for modulation devices

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JP3923341B2 (ja) 2002-03-06 2007-05-30 株式会社半導体エネルギー研究所 半導体集積回路およびその駆動方法
GB2403841B (en) * 2003-07-07 2006-08-09 Pelikon Ltd Control of Electroluminescent displays
JP4016942B2 (ja) * 2003-12-10 2007-12-05 セイコーエプソン株式会社 Ｐｗｍ信号生成回路及び表示ドライバ
KR100718962B1 (ko) * 2004-12-28 2007-05-16 엘지전자 주식회사 프로젝션 디스플레이 구동 장치
WO2012022235A1 (zh) * 2010-08-19 2012-02-23 深圳市明微电子股份有限公司 显示控制的倍频方法及装置
CN112985325B (zh) * 2021-04-21 2021-08-17 天津飞旋科技股份有限公司 正余弦编码器的位置解码方法、装置及计算机可读介质

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JPH03246592A (ja) * 1990-02-23 1991-11-01 Seiko Instr Inc 表示装置の階調表示回路
JP3500899B2 (ja) * 1997-03-27 2004-02-23 三菱電機株式会社 画像表示方法及び画像表示装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018208850A1 (en) * 2017-05-08 2018-11-15 Compound Photonics Limited Drive techniques for modulation devices

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CN1421028A (zh) 2003-05-28
TW581999B (en) 2004-04-01
CA2403939C (en) 2012-03-27
HK1052789A1 (en) 2003-09-26
CN1272757C (zh) 2006-08-30
HK1052789B (zh) 2012-03-09
EA005964B1 (ru) 2005-08-25
WO2001073736A1 (en) 2001-10-04
MY126157A (en) 2006-09-29
AU779338B2 (en) 2005-01-20
KR20020093011A (ko) 2002-12-12
EP1269455A1 (en) 2003-01-02
EA200201021A1 (ru) 2003-02-27
CA2403939A1 (en) 2001-10-04
ATE534984T1 (de) 2011-12-15
AU4268001A (en) 2001-10-08
JP2003529100A (ja) 2003-09-30

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