AU4268001A - Method and apparatus for driving a digital display by distributing pwm pulses over time - Google Patents

Abstract

This invention provides a method and apparatus to distribute pulses of a pulse width modulated signal over a time period. When applied to a digital display, the invention provides a signal representing the digital data comprising a plurality of smaller pulses distributed over the refresh time period to drive the display element. A logic circuit is provided to generate a plurality of combinable signals so that the incoming data can be combined with the signals to determine the mix of signals generated as a final output. The individual signals are generated by identifying the lowest order active bit of a counter that is subdividing the appropriate time period into smaller time divisions and generating a pulse on one of a plurality of outputs with each unique lowest order bit identified ouptut on a separate output and successive common lowest order bits identified generating pulses on the same output.

Description

WO 01/73736 PCT/IBO1/00477 METHOD AND APPARATUS FOR DRIVING A DIGITAL DISPLAY BY DISTRIBUTING PWM PULSES OVER TIME FIELD OF THE INVENTION 5 This invention relates to a method and apparatus for driving a digital display by distributing pulse width modulated pulses over time. In particular, although not necessarily solely, such a method and apparatus may be implemented in the field of digital display screens such as LED or LCD screens or projectors, plasma television or other display screens using digital information. 10 BACKGROUND TO THE INVENTION Digital display screens have become more prominent in recent times. These come in a variety of forms and although the invention will generally be described with reference to LED screens, it will be readily appreciated that the same considerations 15 apply in other digital display systems. Taking the example of an LED screen, these can typically be provided by a screen containing a plurality of pixels. Each pixel may comprise a plurality of different coloured LED elements to provide the desired colour range. Again, 20 typically, these may comprise a red, blue and green LED element. To provide a particular colour in the pixel over a set period of time, the range of colours can be provided by providing different intensities to the illumination of the red, green and blue elements individually. 25 CONFIRMATION COPY WO 01/73736 PCT/IBO1/00477 With the use of digital displays, the variation in intensity for each LED element is typically achieved by the relative percentage of time that each element is energized. 5 Such digital displays may operate at a variety of refresh frequencies. A typical frequency would be around 60 Hz to provide a relatively continuous apparent signal to the human eye. At a frequency of 60 Hz, each pixel needs to display the desired colour and provide the appropriate energy levels to each LED element within a period of 1/60th of a second. 10 As the data is provided to the LEDs in digital form and the LEDs operate substantially instaneously, the variation in energy level over the refresh period is provided by only illuminating the LED element for a suitable portion of that refresh period. With digital displays, the elements are not generally manipulated by 15 providing higher or lower energy levels over the time period but instead by providing a set power level to illuminate the element only for that percentage of the refresh period as is necessary to provide the relevant percentage of intensity of that colour averaged over the period. Often there may be non-linear response to changes in current applied to such elements. Therefore, it is generally more desirable to vary the 20 amount of time the element is energized rather than vary the instantaneous current supplied and maintaining this for the whole period. Assuming that the refresh period is a time represented by "T", the various degrees of intensity of each colour are provided by illuminating the appropriate 25 element for the appropriate portion of "T" as is required.

WO 01/73736 PCT/IBO1/00477 Perhaps the simplest method of performing this function is to switch the element at the start of the period "T" and energize that element for the appropriate portion of the period before switching the element off. For example, if it is desired to have the colour involving a 50% intensity of red, the red element may be energized 5 for the first half of the time period "T". Different intensities are provided by changing this portion of the time period "T" from the commencement of the period. A particular visual effect occurs when such a system is utilized. This visual effect is referred to as "shimmer". 10 Although the mechanisms of this visual effect may not be entirely understood, it is believed that the effect occurs due to the uneven distribution of the energy over the time period "T". 15 As indicated in the previous example, a 50% intensity may provide the energization of the element only through the first half of the time period "T". If the image is static, the subsequent time period "T" is similarly energized and the average distribution creates no particular visual distortion. However, if a moving image is projected on the screen, pixels on the boundary of that moving image are required to 20 significantly change intensity between successive refresh cycles. If we consider the circumstance where an element is energized for 50% during one cycle and 25% in the next, the simple execution of the element for the first half of the first refresh period and the first quarter of the next refresh period does provide the 25 correct average energy for each individual refresh period. However, the WO 01/73736 PCT/IBO1/00477 commencement and termination of the refresh period is not synchronized with the mind of the viewer. If a slightly longer time period is considered such as time period "T" plus 25% commencing from the start of the first of the two cycles, both the 50% "T" and the 25% "T" energization periods occur within the single 1.25 "T" time 5 period. This leads to an average energy distribution over the 1.25 "T" period of 60%. Clearly, this is a greater intensity over that extended period than even the intensity of the first time period "T" let alone the reduced subsequent time period "T". This visual effect of shimmer creates a bright or dark line that trails moving 10 images across the screen. In general, two approaches have been taken to try and overcome this effect. The first approach is to significantly reduce the refresh cycle. Although this 15 does not stop the effect from occurring, the significantly faster refresh cycle may reduce the effect apparent to the human eye. Generally the effect will become apparent on images that move across the display faster. The difficulty with such a proposal is that a decrease in the refresh cycle significantly increases the processing required for the display and complicates the hardware involved to increase cost. The 20 most economic refresh period is just slightly faster than the detection rate of the human eye. The system as described thus far uses pulse width modulation "PWM" of the signal to provide the required intensity. As previously described, the simplest form of

A

WO 01/73736 PCT/IBO1/00477 this is merely to match the length of a single pulse to the percentage of the time period "T" desired. Due to the cost difficulties of increasing the refresh cycle and still address the 5 shimmer problem, other methods have been utilized to manipulate the required length of pulse within time period "T" into a series of pulses distributed over that time period. This averaging of the pulses throughout the time period "T" overcomes the problem. 10 One simple method of performing this function splits the time period "T" into a series of discreet time intervals. These time intervals may represent a block of period "T" representing 50% of the period "T", a second block representing 25% of the period "T", a further block representing 12.5% of the period "T", etc. 15 As these time periods are discreetly distributed over the period "T", if it is desired to provide an intensity of 5/8 of the available full intensity, the 50% and 12.5% discreet time intervals can be utilized to provide this value. If these are non adjacent time intervals throughout the overall time period "T", some averaging occurs. Typically, the 50% time interval may be adjacent to one end of the time 20 period "T", the 25% interval adjacent that 50% interval, the 12.5% interval adjacent the 25% interval and distal from the 50% interval, etc. The 5/8 or 62.5% intensity provides two blocks of time during which the display element such as an LED element is illuminated, separated by the 25% time interval during which the element is not energized. 25 WO 01/73736 PCT/IBO1/00477 Depending upon the number of segments in which the time period "T" is divided, more complex arrangements can be provided. However, this type of systems still provides difficulties if the intensity for the 5 pixel approaches one of the discreet time period boundaries. For example, if the intensity is intended to be 50%, this is still provided by a single pulse at one end of the time period "T". Similarly, a percentage of intensity just over that 50% value would be represented by a single 50% pulse and a small further pulse, typically provided at the other end of the time period "T". This does little to average the pulse 10 over all the time period "T" when the intensity value is close to those particular time block boundaries. To provide a better solution, more recent products have incorporated memory in the form of Eproms. The Eproms include lookup tables to provide the required 15 averaged signals. A typical apparatus to implement this is shown schematically in Fig. 1. A portion of individual lines of memory within the Eprom shown for typical memory locations 128 and 64 are provided in Fig. 2 for the sake of explanation. 20 Referring to Fig. 1, a simplified portion of apparatus is shown to drive a single LED element 1. In general, a video signal or similar may be received by an overall system in 25 analogue form and converted to digital format. In the case of a display having red, WO 01/73736 PCT/IBO1/00477 blue and green individual elements within a pixel, the data is expressed as a digital number representing the degree of intensity of that particular LED within that refresh cycle time period. 5 As shown in this simplified version for explanation, the data may be provided as a digital signal 2 in the form of an 8-bit binary number. The number of bits in the binary digital signal simply determine the number of graduations of intensity for each element. An 8-bit signal provides 256 discreet binary numbers that can represent 256 separate degrees of intensity for the LED element 1 over the time period "T". This 10 can change as desired and it should be noted, at least when provided to a pixelated screen having red, blue and green components, the final colour of the pixel is determined by the mixed ratio of each of these three elements. Therefore, 256 graduations for each of the three colours provides an overall range of colours for the final pixel in excess of 16.7 million. 15 As shown in this prior art example, the data signal is provided to an Eprom 3. Typically, the Eprom 3 would hold at least 256 discreet memory locations, one for each possible degree of intensity desired from the incoming data. 20 Attached to the Eprom is a counter 4 which, in this prior art embodiment, is provided as a matching 8-bit counter. A clock 5 drives the counter 4. As explained subsequently in the description, the number of bits for the counter do not need to match the number of data bits and can be increased if desired. It is unlikely that the number of bits would be reduced as this will reduce some of the discreet degrees of 25 intensity available to the LED 1. 7 WO 01/73736 PCT/IBO1/00477 The clock 5 drives the counter so that the refresh cycle "T" is split into a number of discreet smaller time portions. In the case of an 8-bit counter 4, this will comprise 256 discreet time portions each represented by a successive binary number from the counter 4. 5 Within a single memory location in the Eprom, the memory location may similarly comprise a sequence of bits with the length of the sequence being determined by the number of discreet values generated by the counter 4. In this particular example shown in Fig. 1, each memory location in the Eprom may 10 comprise a string of 256 individual bits. To explain the operation of this prior art embodiment, reference may be made to Fig. 2 in which a portion of the memory locations for the memory locations representing a data input of 128 or 64 are shown. These are merely typical portions of 15 memory locations to aid the explanation of this prior art. If the data 2 wishes to drive the LED 1 for 50% of the time, the data 2 may be provided as the binary number equivalent to 128 of the 256 possible binary numbers of an 8-bit representation. The memory location 128 as shown in Fig. 2 shows the 20 first 16 of some 256 bits in the memory location 128. As the counter 4 cycles through each of its 256 discreet numbers driven by the clock 5, a successive bit in the 128 memory address is considered. As shown in this first 16 bits, every second bit in the 128 address contains a "1" to illuminate the LED 25 1.

WO 01/73736 PCT/IBO1/00477 The result is that the output 6 from the Eprom 3 compromises 128 individual pulses, the total of which summate to 50% of the total time period "T". Referring to the memory location within the Eprom 3 representing a data 2 in 5 the form of the binary representation of the numeral 64, it can be seen from the first 16 bits shown in Fig. 2 that every 4 th bit contains a "1" causing the output 6 to comprise 64 discreet distributed pulses totalling 25% of the available time "T". As shown in this prior art, the Eprom successfully distributes pulses over the 10 period of time "T" for each discreet incoming data signal. In practice, such Eproms are capable of generating signals for multiple individual LED elements. Therefore, it is not necessary to provide a separate Eprom for each LED element. The actual number of LED elements 1 that can be addressed 15 by each Eprom 3 is determined by more than simply the speed of the Eprom 3 but also the ability to provide a communication path to the LED element 1 that operates at sufficient speed also. With current levels of technology, it is still necessary to provide a plurality of 20 Eproms to drive any realistic segment of display screen. A typical prior art system may utilize 6 Eproms on a driving board for a section of 512 pixels, each containing 3 LED elements. Although this prior art overcomes the problem of shimmer, the use of Eproms 25 and their connection to the driving circuits for the LEDs is expensive. Although the WO 01/73736 PCT/IBO1/00477 number of Eproms required may be reduced by including multiplexers or other technology to allow the Eproms to address even more LEDs on average, such multiplexers also increase overall costs. 5 OBJECT OF THE INVENTION It is an object of the present invention to provide a method and apparatus for driving a digital display by distributing a PWM signal over time that may overcome some of the disadvantages of the prior art by providing some averaging of the pulses over time while reducing the need for costly items such as Eproms or similar. 10 SUMMARY OF THE INVENTION Accordingly, in the first aspect, the invention may broadly be said to consist in a method of driving a digital display by distributing a pulse width modulated signal over a time period comprising the steps of: 15 - generating a plurality of pulsed signals over the time period "T"; - each of said plurality of pulsed signals providing at least one individual pulse over the time period "T"; - each pulse of the plurality of pulsed signals being generated over a discreet time interval within the period "T" with respect to any other 20 pulse within any of said plurality of pulsed signals; and - combining said pulsed signals in accordance with the data to generate an output signal containing distributed pulses which, in summation, represent the portion of the time period "T" intended by the incoming data. 25 1 i WO 01/73736 PCT/IBO1/00477 Accordingly, in a second aspect, the invention may broadly be said to consist in an apparatus to drive a digital display by distributing a pulse width modulated signal over a time period "T" comprising: - at least one signal generator to generate a plurality of pulsed signals 5 wherein each of said signals comprises a distribution of individual pulses with each of said individual pulses being provided over a discreet time period within the overall period "T" with respect to the individual pulses of all the pulsed signals; - AND connection means to combine bits of an incoming data signal 10 with said plurality of pulsed signals to select which of said pulsed signals should be combined to represent the incoming data signal; and - OR connection means to combine said plurality of selected signals into a single series of distributed pulses over the time period "T" representing the incoming data. 15 Accordingly, in a third aspect, the invention may broadly be said to consist in a method of driving a digital display by generating a plurality of time discreet pulsed signals suitable for subsequent combination comprising: - generating a succession of binary numbers subdividing a desired time 20 period; - identifying the order of the lowest active bit of the succession of binary numbers generated to output a sequence of numbers, each for a single time period subdivision, identifying the lowest order bit; and - generating an output pulse on one of a plurality of combinable outputs 25 with an individual pulse being generated for each subdivision of the 11 WO 01/73736 PCT/IBO1/00477 time period and pulses generated by common lowest order bit identifiers being generated on a common output. Accordingly, in a fourth aspect, the invention may broadly be said to consist in 5 an apparatus for driving a digital display by the generation of a plurality of combinable pulsed signals over a time period comprising: - a counter to generate a sequence of binary numbers to subdivide the time period; - a lowest order bit identifier to identify the lowest active bit in the 10 binary sequence output from the counter and output a succession of signals representing the lowest active bit, one such signal for each of said time division; and - a pulse generator to activate a pulse on a discreet output for each unique lowest order bit identified and successive pulses for common 15 lowest order bits to be generated on a common output BRIEF DESCRIPTION OF THE DRAWINGS Preferred embodiments of the invention will now be described with reference to the following drawings in which: 20 - Fig. 1 shows a prior art apparatus for providing a pulse width modulated signal distributed over time; - Fig. 2 shows portions of representative memory address of an Eprom in accordance with the apparatus of Fig. 1; - Fig. 3 shows a schematic diagram of a preferred embodiment of the 25 present invention; 17 WO 01/73736 PCT/IBO1/00477 - Fig. 4 shows a plurality of pulsed signals in accordance with a simplified embodiment of the invention; and - Fig. 5 is a diagrammatic representation of a possible output from a simplified version of the invention. 5 DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS This invention relates to a method and apparatus for driving a digital display by distributing pulse width modulated pulses over a period of time. 10 In this preferred form, the implementation is in the form of a display screen that displays a digital data signal 2. For the sake of this description, the display screen may be represented by a single LED element 1. Of course, in practice, the invention is implemented through the control of a plurality of such LED elements 1 formed into individual pixels. 15 Furthermore, the invention is not restricted to LED elements as digital data for other display systems such as plasma TV, LCD projectors, LCD screens and similar apparatus all suffer from the same inherent problems and the need to distribute a pulse width modulated signal over the refresh cycle. 20 For the sake of simplicity, a preferred embodiment shown in Fig. 3 shows an embodiment to drive a single LED 1 with a pulse width modulated signal 6. Referring to Fig. 3, the apparatus will be described with reference to providing 25 a distributed pulse width modulated signal representing a single 8-bit item of data 2. 1 WO 01/73736 PCT/IBO1/00477 Although this apparatus is described with reference to 8-bit digital data, this is merely due to 8-bit digital data being relatively standard in the industry. Variations on this can and do occur. 5 In this embodiment, the invention provides a signal generator 7 that outputs a plurality of pulsed signals 8. Each of the pulsed signals 8 may be combined with any one or more of the other pulsed signals 8 to provide a variety of distributions of pulses over the overall time period. 10 As shown in Fig. 3, the data 2 may be combined with these individual pulsed signals 8 to determine the mix of those signals necessary to correctly represent the data 2. This is then provided as the pulsed signal 6 in cumulative form through to the LED 1. 15 The signal generator 7 to provide the plurality of signals seeks to provide signals that can be easily combined to provide the variety of ranges necessary to represent the various graduations of the digital data. Furthermore, it is desired that the signals be able to be combined so that the pulses provide a variety of the percentages of the time period covered by pulses compared with the period of time without any 20 pulses. It is not intended that they be combined to increase the amplitude of individual pulses. To this end, the plurality of pulsed signals 8 are ideally comprised of pulsed signals where any individual pulse of any signal covers a discreet time period compared with the pulses of the other signals with which it may be combined. At any particular instance within the time period, a pulse can only be provided by one 25 of the plurality of pulsed signals 8. 1A WO 01/73736 PCT/IBO1/00477 The invention seeks to implement the invention with a logic circuit to generate these pulses and act as a signal generator 7. The circuit in this preferred embodiment comprises a clock 5, counter 4, priority encoder 9 and a decoder 10. 5 If we take the example as shown in this preferred embodiment of 8-bit digital data 2, this data may comprise any one of 256 unique binary numbers representing the decimal numbers 0 to 255. Although it is not strictly necessary, this preferred embodiment utilizes a clock 10 5 and an 8-bit counter 4 such that the time period "T" matching the refresh cycle may be split into a plurality of smaller time divisions. The use of an 8-bit counter 4 splits the refresh time period "T" into 256 smaller time periods, each represented by a successive binary output from the counter 4. 15 It should be noted that, similar to the prior art discussed in relation to Fig. 1, the number of time divisions into which the refresh cycle is split does not need to match the number of graduations possible in the digital data. In this example where the digital data comprises an 8-bit signal, this preferred form matches that data with an 8-bit counter 4 for the sake of full processing of the data and clear explanation. 20 However, the counter 4 can be a greater number such as a 10-bit counter with the increase in bits used for other purposes. Alternatively, a counter 4 using a smaller bit signal such as a 6-bit signal is also possible although this would reduce the combinations possible and not fully 25 utilize all the graduations available from the 8-bit digital signal. I1 C WO 01/73736 PCT/IBO1/00477 Referring to the signal generator 7, it will be appreciated that the counter 4 generates 256 numeric binary signals within the time period "T". Each of the 8 output bits designated as Qo to Q7 on counter 4 are mapped to input bits on the priority encoder 9. 5 A priority encoder seeks to determine the order of the incoming binary number. Priority encoders generally identify the highest active bit within the 8-bit combination. 10 To generate the desired plurality of output signals 8, it should be recognized that the preferred signals comprise a signal having a pulse covering every second of the 256 time divisions, a further signal having a pulse every 4 th time division, a further pulsed signal having a pulse every 8 th time division, etc. and where the pulses do not overlap with each other. The frequency of these pulses matches the frequency 15 occurrence of the activity of the bits from the counter 4. The pulsed signals comprise signals having pulses over substantially %" T where n = 1, 2, 3, ... etc. The maximum n will match the binary order of the total time divisions. In this example, 256 time divisions is 28 hence the sequence ends when n = 8. 20 If we consider the counter 4 mapped directly to a priority encoder 9, it will be appreciated that the distribution of signals relating to the highest active bit are not adequately distributed over time. For example, the output bit Q7 is the highest active bit for 50% of the time period being the highest active bit for half the numbers generated by the counter 4. However, it is the highest active bit only for the last 50% 25 of the numbers generated and to consider this as a possible source for signal 16 WO 01/73736 PCT/IBO1/00477 generation would lead to a pulsed signal which, although representing half of the available time period, is concentrated over the final 50% of the time period and not distributed throughout the time period. 5 In contrast, the invention recognizes that the desired distribution of pulses is generated not by the highest active bit but instead by the lowest active bit from the counter 4. In generating the 256 unique binary numbers from the counter 4, the Qo bit 10 will be the lowest active bit on every second of the 256 binary numbers. In contrast, the output bit Q7 is the lowest active bit only for the binary number "10000000". This is a single occurrence only. Using this methodology, the priority encoder 9 is connected to the counter 4 15 such that, instead of recognizing the highest active bit, it actually recognizes the lowest active bit from the counter 4. This is simply achieved by reversing the mapping of output and input bits between the connection such that the lowest output bit of the counter 4 being bit Q o is mapped to the highest input bit 17 of the priority encoder 9. This is shown by connections 11 as shown in Fig. 3. 20 The output from the priority encoder 9 comprises 256 successive binary numbers, each being a 3-bit number representing the decimal numbers 0 to 7 indicating the highest active bit as recognized by the input to the priority encoder 9. This succession of 3-bit numbers may be communicated by connections 12 to a 25 decoder 10. 17 WO 01/73736 PCT/IBO1/00477 A signal along the communication 12 to the decoder 10 comprises a sequence of numbers generally in the form of the sequence :7, 6, 7, 5, 7, 6, 7, 4, 7.... The decoder 10 seeks to translate these 256 individual numbers into 8 pulsed 5 signals. These are outputs by the decoder 10 from the output bits P 7 to Po. The decoder 10, upon receiving an input signal representing the decimal number 7, outputs a pulse on output P 7 . Similarly, receipt of an input representing the decimal number 4 will create a pulse on output P 4 , etc. 10 The frequency of the occurrence of the decimal number 7 in the output from the priority encoder 9 is such that it occurs on every second of the 256 discreet outputs. Hence the output from the decoder 10 on output P 7 is a pulse every second of the 256 individual time segments. 15 A simplified version of an output from a possible embodiment is shown in Figs. 4 and 5. Referring to Fig. 4, a representative output of a 3-bit system is shown. Using 20 the same methodology, the output from the decoder of a 3-bit generator would comprise a pulsed signal P 2 where a pulse is generated every second pulse, a signal Pi where a pulse is generated every 4 th time division and a signal Po comprising a single pulse. These may be combined as desired to represent 8 discreet signals as represented by numbers 0 through 7. It should be noted that the number 0 is 25 represented by exclusion of all pulses.

WO 01/73736 PCT/IBO1/00477 Referring to Fig. 5, a cumulative output is shown representing the combination of the signals P 2 and P 0 . This provides five pulses distributed over the time period "T". 5 In these embodiments, it should be noted that the pulses are not perfectly evenly distributed over the time period "T" for all combinations. As shown in Fig.5, the five individual pulses are distributed as a single pulse, a block of three pulses and a further single pulse. As we are working with digital data, generating pulses during 8 discreet smaller time divisions of the overall period "T" does not allow perfectly even 10 distribution unless the start and end points of the smaller time divisions "T" can themselves be asynchronized. Although this leads to a less than ideal distribution in the 3-bit signal, as the number of bits increases, the combination of a sequence of three consecutive pulses as 15 shown in Fig. 5 becomes of less overall effect on the distribution. Returning to the 8-bit embodiment shown in Fig. 3, it can be seen that the data 2 may be combined with each of the plurality of signals 8 through the provision of AND gates 14. 20 The data 2 comprises a binary number from 0 to 255. If we take an example, the number 128 is represented in binary as "10000000". As shown in Fig. 3, the data 2 may be provided through a buffer or similar 15 and the output of a signal such as the number 128 would create a "1" on the output 07. All the other outputs would be zero. 1 0 WO 01/73736 PCT/IBO1/00477 The 07 bit from the data 2 is ANDed with the P 7 signal from the decoder 10. As mentioned previously, the P 7 signal comprises 128 individual pulses timed at every second of the smaller time divisions. The appearance of a "1" on the 07 data bit and its incorporation through an AND gate leads to an output 16 of the P 7 signal. The 5 remaining data bits Oo to 06 are all zeros and their incorporation through AND gates with the signals on Po to P 6 respectively will suppress all the remaining pulsed signals on the outputs from the AND gates 14. As a result, the output 6 supplied to the LED 1 is simply the P 7 output from the decoder 10. 10 A further example can be considered if the data 2 is the binary representation of the numeral 129. In binary, the output from the buffer 15 will create a "1" on the 07 bit and a "1" on the Oo bit. Hence, downstream from the AND gates, only the P 7 and P 0 outputs from the decoder 10 are still in existence. All the other pulsed signals are suppressed. These two signals are combined through the OR gate 17 such that the 15 output 6 comprises some 129 pulses. This is the pulsed signal P 7 plus one additional pulse in the middle which will create a block of three consecutive pulses intermediate of the time period. This is sufficiently close to an even distribution to overcome the shimmer effects as described previously. 20 Thus it can be seen that the invention provides both a method and apparatus that generates a series of pulses distributed over the time period to represent the various energy levels intended to be supplied to the display element 1. The invention performs this without the need for expensive Eproms utilizing lookup tables or memory address segments and instead utilizes a logic circuit. 25 WO 01/73736 PCT/IBO1/00477 The logic circuit utilizes the frequency of occurrence of the lowest order bit from a counter to generate the required signals for subsequent combination with the incoming data. 5 Further aspects of this invention may become apparent to those skilled in the art upon reading the description. The description in relation to the preferred embodiment is not considered limiting to the invention but instead is merely illustrative of one preferred embodiment and application of the invention. 10 Specific integers referred to throughout the description may be substituted for functional equivalents where desired.

Claims (16)

1. A method of driving a digital display by distributing a pulse width modulated signal over a time period comprising the steps of: 5 - generating a plurality of pulsed signals over the time period "T"; - each of said plurality of pulsed signals providing at least one individual pulse over the time period "T"; - each pulse of the plurality of pulsed signals being generated over a discreet time interval within the period "T" with respect to any other 10 pulse within any of said plurality of pulsed signals; and - combining said pulsed signals in accordance with the data to generate an output signal containing distributed pulses which, in summation, represent the portion of the time period "T" intended by the incoming data. 15

2. A method of driving a digital display by distributing a pulse width modulated signal over a time period as claimed in claim 1 wherein the number of said plurality of pulsed signals equals the number of binary digits necessary to represent the highest number of said data. 20

3. A method of driving a digital display by distributing a pulse width modulated signal over a time period as claimed in claim 1 wherein said plurality of pulsed signals include signals containing pulses over substantially 2" T of the time period "T" where n = 1, 2, 3 etc. and the maximum n equals the order of the 25 number of discreet time intervals into which the period "T" is subdivided. 117 WO 01/73736 PCT/IBO1/00477

4. A method of driving a digital display by distributing a pulse width modulated signal over a time period as claimed in claim 1 wherein said combining said pulsed signals with data comprises selecting said pulsed signals by utilizing said data and then combining selected signals into a single trying signal. 5

5. A method of driving a digital display by distributing a pulse width modulated signal over a time period as claimed in claim 4 wherein said selection is performed by matching an active bit in an incoming binary data value with a pulsed signal to select that signal for combination. 10

6. An apparatus to drive a digital display by distributing a pulse width modulated signal over a time period "T" comprising: - at least one signal generator to generate a plurality of pulsed signals wherein each of said signals comprises a distribution of individual 15 pulses with each of said individual pulses being provided over a discreet time period within the overall period "T" with respect to the individual pulses of all the pulsed signals; - AND connection means to combine bits of an incoming data signal with said plurality of pulsed signals to select which of said pulsed 20 signals should be combined to represent the incoming data signal; and - OR connection means to combine said plurality of selected signals into a single series of distributed pulses over the time period "T" representing the incoming data. WO 01/73736 PCT/IBO1/00477

7. An apparatus to drive a digital display by distributing a pulse width modulated signal over a time period "T" as claimed in claim 6 wherein said plurality of pulsed signals comprises a pulsed signal for each binary bit of said incoming data signal. 5

8. An apparatus to drive a digital display by distributing a pulse width modulated signal over a time period "T" as claimed in claim 6 wherein said plurality of pulsed signals include signals containing pulses over substantially 2 " T of the time period "T" where n = 1, 2, 3 etc. until n equals the binary order of the 10 number of discreet time periods into which the overall period "T" is subdivided.

9. An apparatus to drive a digital display by distributing a pulse width modulated signal over a time period "T" as claimed in claim 6 wherein said signal 15 generator includes a clock-driven counter to generate a sequence of binary numbers designating subdivisions of the period "T", an encoder to identify the lowest active bit of said counter and generate a sequence of signals, one for each time division, identifying the lowest active bit and a decoder to generate an output pulse on a discreet output for each unique lowest active bit and a 20 subsequent pulse on the same output for each common lowest active bit identified.

10. A method of driving a digital display by generating a plurality of time discreet pulsed signals suitable for subsequent combination comprising: WO 01/73736 PCT/IBO1/00477 - generating a succession of binary numbers subdividing a desired time period; - identifying the order of the lowest active bit of the succession of binary numbers generated to output a sequence of numbers, each for a single 5 time period subdivision, identifying the lowest order bit; and - generating an output pulse on one of a plurality of combinable outputs with an individual pulse being generated for each subdivision of the time period and pulses generated by common lowest order bit identifiers being generated on a common output. 10

11. A method of driving a digital display by generating a plurality of time discreet pulsed signals suitable for subsequent combination as claimed in claim 10 wherein said output pulses are generated on a unique output for each unique lowest order bit identified. 15

12. An apparatus for driving a digital display by the generation of a plurality of combinable pulsed signals over a time period comprising: - a counter to generate a sequence of binary numbers to subdivide the time period; 20 - a lowest order bit identifier to identify the lowest active bit in the binary sequence output from the counter and output a succession of signals representing the lowest active bit, one such signal for each of said time division; and 25 WO 01/73736 PCT/IBO1/00477 a pulse generator to activate a pulse on a discreet output for each unique lowest order bit identified and successive pulses for common lowest order bits to be generated on a common output. 5

13. An apparatus for driving a digital display by generation of a plurality of combinable pulsed signals over a time period as claimed in claim 12 wherein said lowest order bit identifier comprises a priority encoder connected to said counter such that the highest order input of said encoder is connected to the lowest order output of said counter. 10

14. An apparatus for driving a digital display by generation of a plurality of combinable pulsed signals over a time period as claimed in claim 13 wherein said pulse generator includes a decoder to receive signals from said priority encoder. 15

15. An apparatus for driving a digital display by generation of a plurality of combinable pulsed signals over a time period as claimed in claim 12 wherein said counter is driven to generate said sequence of binary numbers and subdivide the time period by a clock. 20

16. An apparatus for driving a digital display by generation of a plurality of combinable pulsed signals over a time period as claimed in claim 12 wherein said plurality of combinable signals comprises n signals where n is the order of the binary number representing the number of time subdivisions from the 25 counter.