EP1075708A2 - Procede de realisation de structures de contact dans des cellules solaires - Google Patents

Procede de realisation de structures de contact dans des cellules solaires

Info

Publication number
EP1075708A2
EP1075708A2 EP99929034A EP99929034A EP1075708A2 EP 1075708 A2 EP1075708 A2 EP 1075708A2 EP 99929034 A EP99929034 A EP 99929034A EP 99929034 A EP99929034 A EP 99929034A EP 1075708 A2 EP1075708 A2 EP 1075708A2
Authority
EP
European Patent Office
Prior art keywords
layer
etching
mask
sequence
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99929034A
Other languages
German (de)
English (en)
Inventor
Ralf LÜDEMANN
Sebastian Schaefer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Original Assignee
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV filed Critical Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority to EP00125466A priority Critical patent/EP1091420A3/fr
Publication of EP1075708A2 publication Critical patent/EP1075708A2/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/7688—Filling of holes, grooves or trenches, e.g. vias, with conductive material by deposition over sacrificial masking layer, e.g. lift-off
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the invention relates to a method for producing contact structures in solar cells, and to solar cells with these contact structures.
  • the invention relates in particular to structures of trenches or holes and methods for their implementation, which enable novel contacts to be made with solar cells.
  • Solar cells are components that convert light into electrical energy. They usually consist of a semiconductor material which contains regions or layers of different mobility for positive and negative charge carriers, n- or p-conducting regions. The areas are called emitters or bases. Positive and negative charge carriers generated by incident light are separated and can be removed by means of metallic contacts provided on the respective areas. Accordingly, only those charge carriers that reach the contacts and do not previously recombine with another charge carrier contribute to the usable electrical power of the solar cells.
  • the metallic contacts are generally produced by evaporating metal, which is then galvanically thickened, by electroless deposition of nickel or by printing a metal paste on the surface of the areas to be contacted. If these areas do not extend over the entire solar cell surface or for other reasons (eg shadowing of the light, increased recombination at the contact, etc.)
  • the metal may only be applied in places, as described below, this is ensured by using masks during manufacture.
  • a photolithographically produced resist mask (3) is usually applied directly to the surface of the layer (1) to be contacted, as shown in FIG.
  • a metal layer (4) is then deposited from the metal vapor (5) over the entire surface and the paint mask is removed.
  • Another structuring option is to put on or clip on a shadow mask (3), as shown in FIG. 1b.
  • the further process steps take place as described in connection with FIG.
  • Printing processes can also be used to apply the metallization.
  • masks are used, for example screen printing masks (3) or preformed clichés (stamp or pad printing).
  • Figure lc shows the screen printing process, in which metal in the form of a metal paste (6) is pressed into the spaces between the mask by means of a doctor blade (7).
  • the metal contacts produced with the methods just described are usually realized in a comb-like form, i.e. they form so-called grids.
  • solar cells consist of full-surface base and emitter areas, with the emitter mostly on the side facing the light
  • Figure 2 shows a solar cell with the base layer (1), the emitter layer (2) and the emitter grid (8) for contacting the emitter.
  • the front, from which the light (10) is incident, is formed by the emitter layer (2).
  • the base contact (9) is applied over the entire surface of the back of the base layer (1).
  • Emitter layer contacted via trenches, which in turn are in contact with a grid applied to the surface of the solar cell.
  • the trenches are produced in this solar cell using an etching process. Due to the arrangement and shape of the grids, undesirable shading of the surface of the solar cell must also be accepted.
  • a disadvantage of this method is that the trenching using a laser is a very complex process.
  • the laser beam must be guided over the entire surface of the solar cell via a precise deflection or displacement device.
  • the action of the laser beam also damages the solar cell, so that the trenches must then be etched in order to remove the damaged layer.
  • This also applies to mechanically generated, for example sawn, trenches.
  • simplifying production and developing cheaper starting materials represent the most important challenges for solar cell technology.
  • the elimination of masks during metallization means a significant simplification.
  • Two recently described methods for the mask-free production of grids are based on the texturing of the surface by sawn trenches similar to a sawtooth pattern.
  • the solar cell consists only of a thin semiconductor layer (3-50 ⁇ m), which is applied to a carrier material.
  • a thin semiconductor layer (3-50 ⁇ m)
  • many of these substrates are not conductive. Therefore, the base cannot be contacted from the back through the substrate. Instead, a so-called single-sided grid must be used, which consists of two interlocking grids, each for contacting the base and the emitter.
  • FIG. 4a shows an example of the structure of a thin-film solar cell with one-sided contact.
  • the base layer (1) is applied here on an insulating substrate (11).
  • the selective emitter regions or layers (2) are embedded in the base layer. Both the emitter regions and the base are contacted by intermeshing emitter (8) or base grids (9), as shown in the figure.
  • the concept of single-sided contacting can simultaneously be used to connect several solar cells to one another on a substrate, as in German patent application P 197 15 138.8 is described.
  • both contacts and the selective emitter regions (2) are made on the back of the base layer (1) in order to completely eliminate the shadowing of light (10) on the front. If the contacts are implemented as narrow grids (8, 9), light that reaches the solar cell from the rear can also contribute to electricity generation (so-called "bifacial cell").
  • the method should enable the simple implementation of single-sided contacting of thin-film and rear-side contact solar cells.
  • the depressions are etched through to the first layer or layer sequence up to or into the underlying second layer.
  • the etching takes place in such a way that the etching mask is underetched.
  • electrically conductive material is introduced into the depressions, the etching mask forming a shadow mask for the introduction of the material due to the undercut and the resulting protruding edges.
  • the conductive material is introduced into the depressions only to an extent or up to a height such that there is no contact between the conductive material and the first shift or shift sequence.
  • the etching mask is removed.
  • the first steps are carried out as in the method according to claim 1.
  • the etching of the depressions is carried out in such a way that at least a region of the first layer or layer sequence receives or undercuts negative flanks.
  • the etching mask can already be removed.
  • electrically conductive material is introduced into the depressions, in which case the region of the first layer or layer sequence with negative flanks forms a shadow mask for the introduction of the material due to the resulting protruding edges.
  • the conductive material is only introduced into the depressions to an extent or up to a height such that there is no contact between the conductive material and the first layer or layer sequence.
  • contacting of the second layer through the first layer can be realized without additional masking or isolation.
  • This enables a base layer to be contacted through the emitter layer of a solar cell.
  • any pattern such as trenches or holes and combinations of trenches and holes, can be realized in one step.
  • photolithographically structured lacquer layers can be used as etching masks. It is also possible to use oxide, nitride or metal layers, for example, as etching masks. A particular advantage of the method is the possibility of using shadow masks that are simply placed on or clamped on, so that no additional masking step is required.
  • the electrically conductive material can be introduced by known methods, such as, for example, the methods described in the introduction to the description in connection with FIG. 1.
  • a solar cell according to the invention which has been provided with a contact structure in accordance with the method according to claim 2, has depressions or openings in the first layer or layer sequence which extend to or into the second layer or layer sequence.
  • the depressions have inclined flanks, at least in a region of the first layer or layer sequence, the mutual spacings of which increase with the depth (negative flanks).
  • Electrically conductive material is introduced into the depressions only to an extent or up to a height such that there is no contact between the conductive material and the first layer or layer sequence.
  • inclined flanks are to be understood to mean both straight and curved flanks, in other words any flank shape that deviates from the normal (to the surface of the solar cell or the first layer or etching mask). Of course, this also includes steps in the flank, which have horizontal areas which lead to the enlargement of the cross section of the depression with the depth, as oblique or negative flanks in the present sense.
  • the method according to the invention is an improvement of known contact structures or contacting methods for solar cells.
  • the core of the method according to claims 1 and 2 are specially shaped depressions.
  • the specified etching processes are preferably implemented using a plasma etching process (cf. claim 8).
  • the depressions in the form of trenches or holes are distinguished by the fact that they cause partial self-masking due to specific undercut or flank shape (cf. FIG. 6, claim 2).
  • This shape of the depressions can be realized by specifically controlling the etching or else by different etching behavior of the materials in different surface layers. Due to the (self-) masking achieved in this way, parts of the structure are not metallized during vapor deposition, so that short circuits between the emitter and base are prevented during the metallization.
  • this self-masking effect can also be achieved by etching processes which do not attack the mask necessary for producing the structure, but undercut so that the mask partially masks the flanks of the depressions during the metallization (see FIG. 7, Claim 1). Since the same mask is used for the structure generation and for the metallization, these are so-called self-aligning contact structures.
  • the trenches or holes should be narrow and deep, i.e. have a high aspect ratio (ratio of depth to width).
  • the trench or hole structures according to the invention cannot be produced by means of lasers or by mechanical shaping.
  • the structures can be realized to a limited extent, for example, by wet chemical etching.
  • wet chemical etching the property of some etching solutions can be exploited to etch faster in certain crystal directions than in others. This can lead to the desired structures on appropriately cut single-crystal material.
  • their size and geometry are determined by the crystal structure of the material.
  • etching solutions can be used which etch equally quickly in all crystal directions, and undercut the etching mask, but do not attack.
  • this purely isotropic etching erosion only produces hemispherical structures, ie a poor aspect ratio.
  • Plasma etching methods are therefore preferably used, with which the slope or undercut can advantageously be checked.
  • a high aspect ratio can also be achieved with plasma etching processes.
  • reactive and / or inert gases are ignited into plasmas by means of high-frequency and / or microwave radiation.
  • the resulting radicals can react with the sample surface (isotropic chemical etching) and / or ions are accelerated thereon by an electric field.
  • reactive ion etching RIE, “Reactive Ion Etching”
  • reactive ions mainly reactive ions are used, which not only knock out surface atoms or support chemical reactions through their energy, but can also react with surface atoms.
  • the directed ion current causes anisotropic removal. The ratio of isotropic and anisotropic etching and thus the undercutting or
  • Flank shape of the structures can be influenced in a targeted manner. This is independent of the material to be etched and its crystal orientation and can therefore also be used for inexpensive multicrystalline material.
  • plasma etching processes are dry-chemical processes extends the field of application beyond the wet-chemical processes.
  • plasma etching processes are dry processes, the material to be treated does not come into contact with liquids. Shadow masks can also be used as an etching mask, which is much cheaper than the photo-lithographic masks required for wet chemistry.
  • FIG. 1 shows examples of metallization processes in solar cells according to the prior art
  • Figure 2 is a schematic of a simple solar cell according to the
  • FIG. 3 examples of a maskless metallization of sawtooth structures according to the prior art
  • FIG. 4 examples of single-sided contacting of a thin-film solar cell (a) and a rear-side contact cell (b) according to the prior art
  • FIG. 5 shows an example of the steps for producing a selective emitter according to the prior art
  • FIG. 6 examples of the design of self-masking contact structures according to the invention
  • Figure 7 Examples of the self-adjusting
  • FIG. 8 shows an example of the steps in the self-adjusting production of buried contacts according to the invention
  • FIG. 9 shows an example of the contacting of the base of a solar cell according to the invention through a homogeneous emitter layer
  • FIG. 10 shows an example of the result of the metallization of a structure without using the method according to the invention
  • FIG. 11 shows an example of the metallization of the emitter and base according to the invention in the case of rear-side contact
  • FIGS. 12 shows an example of the inventive equal ⁇ term metallization of Einactivityorial- grids.
  • the examples of methods for metallization, contacting and configuration of solar cells in the prior art shown in FIGS. 1 to 5 have already been explained in the introduction to the description.
  • FIG. 6 shows examples of contact structures which were produced by undercutting or by etching negative flanks in a region of the emitter layer (2) located on the base layer (1) of a solar cell. All structures shown have a self-masking effect in the case of metal vapor deposition, so that after the metal has been deposited on the surface of the emitter layer, the emitter contact (8) and in the depressions the base contact (9) is formed in the form shown schematically. The depressions are only filled to the extent that the metal is deposited only for as long as there is no contact between the base contact (9) and the emitter layer (2).
  • flanks of the depressions shown in the figure show (in the figures from left to right) negative straight flanks, vertical flanks in the base layer with a negative area in the emitter layer, any flank shape with a negative area in the emitter layer, and a flank shape Isotropic etching with a negative area in the emitter layer.
  • the flank shapes shown can arise, for example, from different etching behavior in the emitter and base.
  • FIG. 7 shows examples of self-masking by under-etching the etching mask (3) according to one aspect presented the invention.
  • the meaning of the reference numerals corresponds to that of FIG. 6.
  • the etching mask (3) itself is not attacked during this under-etching.
  • the exact shape of the depressions no longer plays a role, ie no negative flanks in the emitter layer (2) as in FIG. 6 are required.
  • the right illustration shows an SEM image of a structure realized with the method.
  • This structure can be generated, for example, in an ECR reactor in the downstream mode.
  • an etching gas such as sulfur hexafluoride SF 6 at a gas flow of 30 sccm, a pressure of 3 Pa, a microwave power of 400W, a sample temperature of 10 ° C, a distance between sample and plasma of 200 mm and an etching time of 15 min Trench depth of 15 ⁇ m can be achieved.
  • additional high frequency (RIE) power of 20 W is used, the trenches can be made narrower and deeper in the same time.
  • One application example (example 1) of the method according to the invention is the self-aligning metallization of buried contacts in a solar cell.
  • the method represents an improvement in the trenches produced by laser or by sawing with regard to aspect ratio and damage to a buried contact cell.
  • an emitter contact can be implemented. If the structuring takes place on the base area of the solar cell, a base contact is realized.
  • a mask (3) is used to create the trenches (or holes). This can either be a photo - IS
  • lithographically generated paint mask or a shadow mask Correspondingly opened, existing layers (oxides, nitrides, metals, etc.) on the solar cell (1) can also be used as a mask.
  • a very narrow, deep structure can be produced by plasma etching (e.g. RIE or microwave-assisted RIE methods such as ECR-RIE) without damaging the mask, as is shown in FIG. 8a.
  • An undercut of the mask (3) can be seen in FIG. 8a. Accordingly, the mask also becomes
  • Metallization used and only then removed in a so-called "lift-off" process After removing the mask, a metallized trench (4) is obtained (FIG. 8b). This eliminates the need to adjust the metallization mask to the structure.
  • the metallization can be done either by vapor deposition or by filling the structures with metal paste. This can be done by doctoring or printing over the entire surface.
  • FIG. 9 Another exemplary embodiment according to the invention (example 2) allows for the first time the contacting of the base of a solar cell through a homogeneous emitter, ie through an emitter layer covering the entire surface.
  • This corresponds to a self-adjusting contact on the base with one-sided contact.
  • a single mask is sufficient for the production of the trenches or holes according to the invention and the subsequent metallization. Both the elaborate manufacture of a selective emitter and the adjustment of the metallization mask to the structure are eliminated. This provides a simple solar cell contact from one side, which applies to both thin-film cells insulating substrate as well as for back contact cells.
  • the trenches or holes are produced as in the previous example (example 1) by using a mask (3) on the emitter layer (2) (FIG. 9a).
  • the emitter layer (2) is located on the base layer (1).
  • the mask (3) is under-etched ( Figures 9b and 9d) or the flank shape of the recesses is etched ( Figure 9c) so that masking of the emitter (2) is ensured during the metallization.
  • the metallization is carried out by vapor deposition and possibly subsequent galvanic thickening of the metal. Since the vapor deposition does not take place exactly vertically, the emitter area in the structure or the depressions must also be masked, comparable to casting a shadow. This is ensured by the structure according to the invention.
  • the deposition or application of the metal may only take place up to a height within the depressions at which the metallization (9) is not yet in contact with the emitter layer (2).
  • This can be seen in the lower figures of FIGS. 9b to 9d.
  • the cross-sectional shape of the metallization (9) shown results from the masking.
  • the trenches or holes can also be produced wet-chemically in this application.
  • the etching rate is then isotropic, ie horizontally and vertically the same, only very broad structures can be realized, which result in a correspondingly large shading of the solar cell or a high contact resistance and low current conductivity of the contacts.
  • FIG. 9d shows a form of the vertical fung or trench, as can be generated by wet-chemical etching.
  • Suitable etching solutions or materials or crystal directions or the appropriate choice of parameters in the plasma etching process for producing the structures according to the invention can be found in the specialist literature at any time.
  • FIG. 11 shows an exemplary embodiment (example 3) for the simultaneous self-adjusting metallization of emitter and base in the case of rear-side contact cells. Since the entire rear side can be metallized in the case of rear-side contact cells, the trenches or holes according to the invention enable the self-adjusting contacting of the emitter and base at the same time.
  • structures are etched into the base (1) by the emitter (2). The self-masking shape of the structural flanks is crucial.
  • FIG. 11 shows the underetching of regions of the emitter layer (2) near the surface, as a result of which the depression in the region of the emitter layer receives oblique flanks, the spacing of which increases with depth.
  • the mask is then removed and it is a full-surface metallization follows.
  • the metallization on the emitter layer (2) forms the emitter contact (8)
  • the metallization in the recess forms the base contact (9).
  • different types of masks for generating the structures are possible. Due to the shape of the trenches or holes with protruding edges of the regions of the emitter layer near the surface, the metal is deposited as shown in FIG. 11, so that a short circuit between emitter (8) and base contact (9) is excluded. With the example shown, the emitter (2) and the base (1) are advantageously contacted simultaneously when a single mask is used.
  • the emitter contact (8) cannot be implemented over the entire surface, for example for realizing an emitter grid.
  • an additional metallization mask (13) is required.
  • the metallization of emitter (2) and base (1) can still be carried out in one step.
  • the additional mask (13) for defining the emitter contact is applied.
  • the emitter and base are contacted simultaneously.
  • the additional mask is then removed. This form of simultaneous metallization of the emitter and base can also be used for one-sided contacting from the front. It has the same advantages as in the previous example.

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Abstract

L'invention concerne un procédé permettant de réaliser des structures de contact dans des composants à semi-conducteur, en particulier des cellules solaires, ainsi que des composants à semi-conducteur pourvus de ces structures de contact. Selon un aspect de la présente invention, après positionnement d'un masque d'attaque (3) sur une première couche ou série de couches (2), des évidements sont formés par attaque à travers la première couche jusqu'à une seconde couche (1) se trouvant sous la première, voire dans cette seconde couche. L'attaque est réalisée de telle sorte que le masque d'attaque (3) soit attaqué par dessous et/ou qu'au moins une zone de la première couche (2) soit pourvue de flancs négatifs. Ensuite, un matériau électroconducteur (9) est introduit dans les évidements, le masque d'attaque (3) ou la première couche (2) formant un masque d'ombre pour l'introduction du matériau. Le matériau électroconducteur n'est introduit dans les évidements que jusqu'à une hauteur à laquelle il n'y a encore aucun contact entre ledit matériau électroconducteur (9) et la première couche (2). Les structures produites permettent pour la première fois la métallisation de la base par l'émetteur, sans masquage additionnel. L'invention permet ainsi la réalisation simple et bon marché de contacts métalliques sur des cellules solaires.
EP99929034A 1998-04-29 1999-04-27 Procede de realisation de structures de contact dans des cellules solaires Withdrawn EP1075708A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP00125466A EP1091420A3 (fr) 1998-04-29 1999-04-27 Procédé de réalisation de structures de contact dans des cellules solaires

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19819200 1998-04-29
DE19819200A DE19819200B4 (de) 1998-04-29 1998-04-29 Solarzelle mit Kontaktstrukturen und Verfahren zur Herstellung der Kontaktstrukturen
PCT/DE1999/001246 WO1999056324A2 (fr) 1998-04-29 1999-04-27 Procede de realisation de structures de contact dans des cellules solaires

Related Child Applications (1)

Application Number Title Priority Date Filing Date
EP00125466.3 Division-Into 2000-11-21

Publications (1)

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EP1075708A2 true EP1075708A2 (fr) 2001-02-14

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EP99929034A Withdrawn EP1075708A2 (fr) 1998-04-29 1999-04-27 Procede de realisation de structures de contact dans des cellules solaires
EP00125466A Withdrawn EP1091420A3 (fr) 1998-04-29 1999-04-27 Procédé de réalisation de structures de contact dans des cellules solaires

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US (1) US6423567B1 (fr)
EP (2) EP1075708A2 (fr)
JP (1) JP2002513212A (fr)
AU (1) AU739818B2 (fr)
DE (1) DE19819200B4 (fr)
WO (1) WO1999056324A2 (fr)

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Also Published As

Publication number Publication date
JP2002513212A (ja) 2002-05-08
WO1999056324A2 (fr) 1999-11-04
WO1999056324A3 (fr) 1999-12-16
EP1091420A2 (fr) 2001-04-11
AU739818B2 (en) 2001-10-18
DE19819200A1 (de) 1999-11-11
DE19819200B4 (de) 2006-01-05
EP1091420A3 (fr) 2001-05-23
AU4600599A (en) 1999-11-16
US6423567B1 (en) 2002-07-23

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