Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W99/00—Subject matter not provided for in other groups of this subclass
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
  • H10W70/01—Manufacture or treatment
  • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
  • H10W70/097—Cleaning
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W72/00—Interconnections or connectors in packages
  • H10W72/071—Connecting or disconnecting
  • H10W72/073—Connecting or disconnecting of die-attach connectors

Definitions

• This invention relates generally to a method of assembly of a semiconductor device in a flip chip configuration. More specifically this invention relates to a method of flux cleaning using environmentally friendly solvents.
• Flip chip technology is defined as mounting the semiconductor chip to a substrate with any kind of interconnect materials and methods such as fluxless solder bumps, tape- automated bonding (TAB), wire interconnects, conductive polymers, anisotropic conductive adhesives, metallurgy bumps, compliant bumps, and pressure contacts as long as the active chip surface is facing the substrate.
• interconnect materials and methods such as fluxless solder bumps, tape- automated bonding (TAB), wire interconnects, conductive polymers, anisotropic conductive adhesives, metallurgy bumps, compliant bumps, and pressure contacts as long as the active chip surface is facing the substrate.
• the flip chip interconnects are being used in the semiconductor industry primarily because of their high I/O density capability, small profiles, and good electrical performance. Demands on performance, reliability, and cost have resulted in the development of a variety of flip chip technologies using solder, conductive epoxy, hard metal bump (such as gold) and anisotropic conductive epoxy interconnects. Among these materials, solders have remained a preferred choice as the material forming electrical connections in flip chip assemblies.
• Solder flip chip interconnect systems consist of essentially three basic elements. These include the chip, the solder bump, and the substrate. The bumps are first deposited on a wafer and reflowed. The wafer is then diced into chips. The chips are flipped over, aligned to a substrate, tacked, and reflowed. .An underfill may be used to improve the reliability of the interconnects.
• Each of these elements and the processes used to assemble them together affect the performance and the cost of the interconnect system. Therefore, the performance and cost must be compared on the basis of the interconnect system as a whole, and not merely on any single element of the interconnect assembly.
• the materials and processes involved in the manufacture of the flip chip interconnect system determine its performance.
• the semiconductor device or the chip may be silicon or gallium arsenide.
• the bond pad metallization on the wafer can be Ni-Au, Cr-Cu-Au, TiW-Cu, Ti-Cu, or TiW-Au.
• the bump material can be one of a variety of Pb-based or Pb-free solders.
• the substrate can be silicon, alumina, glass, or one of a variety of organic substrates.
• the substrate metallization can be gold or copper. Underfills are used primarily to improve reliability of flip chip interconnect systems. These materials fill the gap between the chip and substrate around the solder joints, reducing the thermal stresses imposed on the solder joint.
• the process step used in the manufacture of the interconnect systems can be varied and include process technologies such as plating, evaporation, wire bumping, dispensing, and printing.
• the reflow process may be performed in air with flux or in a controlled ambient.
• Flip chip bonding processes include those based on the controlled-collapse chip connection (C4) approach or those in which the geometry of the bump is controlled by the bonding equipment.
• C4 controlled-collapse chip connection
• the assembly of a typical flip chip interconnect system involves two overall tasks: (1) flip chip bonding and (2) encapsulation or underfill. During flip chip bonding, the bumped die is first aligned and attached to the bond pads on the substrate using a tacky flux.
• the bumps can be formed on the substrate or on both the substrate and die and that the bond pads can be formed on the die. Then the module is heated so that the solder melts and forms a metallurgical bond with the bond pad (the reflow process). Following the flip chip bonding process the flux residues are cleaned.
• the solvent materials necessary to clean the flux residues are typically highly flammable and/or hazardous materials and some may be carcinogenic. Typical solvents used for such cleaning are
• Xylene, Toluene, and Terpene which are either safety hazards or health hazards. Because of these characteristics of the solvent materials, the cleaning step is very expensive because it requires highly specialized equipment. The equipment may have to be explosion proof, it may have to have special filtering systems to protect the surrounding community as well as the technicians from air pollution and/or water pollution.
• the foregoing and other objects and advantages are attained by a method of assembling a substrate and die in a flip chip configuration using an environmentally friendly non-hazardous solvent.
• Ionox from Kyzen Corporation is used as the cleaning solvent.
• the cleaning process is carried out with the following process parameters: time 10 -30 minutes temperature 70 - 90°C pressure 40 - 70 psi rotation speed and reversals 100-1000 rpm and 25 - reversal cycles.
• the method of the invention uses a non-hazardous cleaning solvent and allows the use of standard commercially available cleaning equipment.
• Figure 1 is a flow diagram showing the method of assembling a substrate and die in a flip chip configuration in accordance with the present invention.
• Figures 2A-2F show views of the substrate/die during the process steps of assembling the substrate/die module in accordance with the present invention.
• Figure 1 is a flow diagram showing the method of assembling a chip and a substrate in a flip chip configuration in accordance with the present invention.
• Figure 1 shows a substrate, indicated at 100 that has been formed by standard methods in the semiconductor manufacturing art.
• the substrate could be silicon, alumina (ceramic), glass, or one of a variety of organic substrates. Bond pads or solder bumps are formed on the substrate. Flux is applied to the substrate and bond pads or solder bumps as indicated at 102 by either brushing or spraying the flux onto the appropriate portion of the substrate.
• the die, indicated at 104 is a normal die and can be made on a silicon substrate or a gallium arsenide substrate.
• Bond pads or solder bumps are formed on the die and correspond to the bond pads or solder bumps formed on the substrate as discussed above.
• the bump material can be a variety of Pb-based or Pb-free solders.
• the bond pad metallization of the wafer can be Ni-Au, Cr-Cu-Au, TiW-Cu, Ti-Cu, or TiW-Au.
• the die is placed on the substrate in a flip chip configuration as indicated at 106.
• a flip chip configuration is one in which the active surface area is placed "face-down" onto the substrate.
• the substrate/chip combination is then heated to cause the solder to reflow as indicated at 108.
• the substrate/chip combination is cleaned as indicated at 110, and underfill is applied between the substrate and die as indicated at 112 and subjected to normal manufacturing steps as indicated at 114.
• Figures 2A-2F show views of the substrate, die, and substrate/die module during the process steps of assembling the substrate/die module in accordance with the present invention.
• Figure 2A shows a substrate 200 with bond pads, one of which is indicated at 202 formed on the substrate 200.
• the substrate could be silicon, alumina (ceramic), glass, or one of a variety of organic substrates.
• the bond pad metallization of the wafer can be Ni-Au, Cr-Cu-Au, TiW-Cu, Ti-Cu, or TiW-Au.
• the selection of the bond pad material is partially dependent upon the material of the substrate. For example, if the substrate is a ceramic material, the bond pad material is Ni-Au and if the substrate is an organic material, the bond pad material is Cu.
• Figure 2B shows a flux 204 having been applied to the substrate 200.
• One of the main purposes of the flux 204 is to provide a tacky surface to hold the die (to be discussed) to the substrate 200 during the reflow process (to be discussed).
• Fluxes commonly contain three constituents: a solvent (e.g., alcohol), a vehicle (e.g., a high-boiling-point solvent such as aliphatic alcohol), and an activator (e.g., carboxylic acids).
• the solvent facilitates uniform spreading of the flux 204 on the bond pads.
• the reflow process usually consists of a preheat step where the solvent is vaporized. This promotes a uniform coating of the flux 204 on the solder and bond pad metallization.
• the flux 204 also becomes more viscous and tacky. Further increase in temperature causes the vehicle to flow along with the activator.
• the activator reduces the oxides, while both the vehicle and activator volatilize.
• Figure 2C shows a die 206 with bumps, one of which is indicated at 208, formed on the active surface of the die 206.
• the die 206 is placed face down on the substrate in a flip chip configuration forming a substrate/die module 210.
• the tackiness of the flux 204 holds the die 206 is proper alignment with the substrate 200 so that the bond pads 202 and the solder bumps 208 are properly aligned.
• the substrate/die module 210 is ready for the reflow step.
• the solder bumps 208 are heated to a temperature above the melting point of the solder. When the solder melts, it forms a metallurgical bond with the bond pads 202.
• FIG. 2D shows the substrate/die module 210 after the reflow process has been completed.
• Flux residue areas one of which is indicated at 212, remain between the substrate 200 and the die 206.
• the flux residue areas 212 commonly contain residues from the carrier, the wetting agent, and reaction by-products of the reduction reaction.
• the flux residue areas 212 as shown in interfere with the flow of underfill material (to be discussed below).
• Figure 2E shows the substrate/die module 210 being subjected to a cleaning process, indicated to 214 in which a solvent material is utilized to remove the flux residue areas 212.
• the flux residue areas 212 are formed during the reflow processes and are polymerized residue. This is typical of all rosin based activated fluxes.
• a cleaning process has been developed that uses Ionox, a commercially available environmentally friendly solvent made by Kyzen Corporation.
• the developed cleaning process uses commercially available centrifugal cleaning equipment.
• the developed process has optimized process parameters such as time, temperature and pressure as well as rotation speed and reversals to effect efficient cleaning between the die 206 and substrate 200.
• the optimized process parameters are as follows: 1. time 10-30 minutes in Ionox, 2. temperature 70-90 °C
• Figure 2F shows the substrate/die module 210 with an underfill material
• the underfill material is typically an epoxy.
• the underfill provides two functions. The first function of the underfill material is to protect the chip and interconnects during subsequent processes. The second function of the underfill is to improve the reliability of the interconnect system.
• the results and advantages of using an environmentally friendly solvent can now be more fully realized.
• the use of a non-hazardous cleaning solvent allows the use commercially available cleaning equipment.

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• Wire Bonding (AREA)

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• 1998
  • 1998-03-17 US US09/040,651 patent/US5988485A/en not_active Expired - Lifetime
• 1999
  • 1999-03-17 EP EP99912667A patent/EP1064678A1/en not_active Ceased
  • 1999-03-17 JP JP2000537255A patent/JP2002507837A/ja active Pending
  • 1999-03-17 KR KR1020007010149A patent/KR100644420B1/ko not_active Expired - Lifetime
  • 1999-03-17 WO PCT/US1999/005927 patent/WO1999048142A1/en not_active Ceased

Non-Patent Citations (1)

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