EP0952509B1 - Circuit de tension de référence - Google Patents

Circuit de tension de référence Download PDF

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Publication number
EP0952509B1
EP0952509B1 EP99105492A EP99105492A EP0952509B1 EP 0952509 B1 EP0952509 B1 EP 0952509B1 EP 99105492 A EP99105492 A EP 99105492A EP 99105492 A EP99105492 A EP 99105492A EP 0952509 B1 EP0952509 B1 EP 0952509B1
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EP
European Patent Office
Prior art keywords
bipolar transistor
reference voltage
current
voltage
circuit
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EP99105492A
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German (de)
English (en)
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EP0952509A3 (fr
EP0952509A2 (fr
Inventor
Franz Dr. Wachter
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Infineon Technologies AG
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Infineon Technologies AG
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/267—Current mirrors using both bipolar and field-effect technology

Definitions

  • the present invention relates to a reference voltage circuit, in particular a reference voltage circuit according to the preamble of claim 1, which supplies a tunable reference voltage.
  • Integrated circuits that are not operated from a stabilized supply voltage internally require a reference voltage source. This applies in particular to voltage regulators whose output voltage serves as reference voltage for other integrated circuits or circuit blocks.
  • the forward or forward voltage of a diode or, in general, a pn junction e.g. As the base-emitter voltage of a bipolar transistor, are used as a reference voltage.
  • the forward voltage of a pn junction has a negative temperature coefficient, which has a negative effect on many applications. If, for example, by means of a voltage regulator whose output voltage serves as a reference voltage, sensors, A / D converter or similar components are supplied, the output voltage of the voltage regulator must be highly accurate and in particular extremely temperature stable.
  • bandgap or bandgap reference voltage circuits are preferably used as reference voltage sources that provide a temperature-stabilized reference voltage.
  • These known bandgap reference voltage sources are based on an addition of a forward voltage of a current-carrying pn junction and a differential voltage multiplied by a corresponding factor, which is formed from two voltages of two pn junctions through which different current densities flow.
  • the river voltage has a current-carrying pn junction - as has already been explained before - a negative temperature coefficient.
  • the difference between two forward voltages increases proportionally to the absolute temperature and is therefore subject to a positive temperature coefficient.
  • the factor by which the differential voltage explained above is multiplied is set so as to cancel the negative temperature coefficient of the forward voltage of the pn junction with the positive temperature coefficient of the differential voltage, a temperature-stabilized output voltage can be obtained.
  • the output voltage of such a reference voltage source which is obtained by adding the above-described forward voltage of a current-carrying pn junction with the differential voltage also explained above, about 1.25 V, which corresponds approximately to the band gap (bandgap) of silicon. Therefore, such reference voltage sources are referred to as bandgap reference voltage sources.
  • FIG. 2 shows a generalized circuit diagram of a known bandgap reference voltage source. Via a current source I 0 , which supplies an impressed current I bias , a current mirror circuit is connected to a positive supply voltage terminal V cc .
  • the current mirror circuit comprises two resistors R3 and bipolar transistors T16-T21.
  • the current mirror circuit generates output currents I C1 and I C2 , which are supplied to the npn bipolar transistors T1 and T2 connected according to FIG.
  • the base terminals of the two transistors T1 and T2 are connected to each other, wherein the base voltage U of the transistor T1 is highly multiplied by a voltage divider consisting of two resistors R5 and R4, so that at the resistor R4 a desired output or reference voltage U ref can be tapped.
  • a transistor T10 With the output terminal of this reference voltage circuit, a transistor T10 is coupled, whose task is to regulate the output voltage U ref to a constant value, if the output of the bandgap shown in Figure 2 - reference voltage source with an uneven load is loaded.
  • any desired actuator for example an operational amplifier or a MOS field-effect transistor, can be used, which can take over the previously described control task.
  • the currents flowing through the transistors T1 and T2 are adjusted, wherein the currents I c1 and I C2 are usually the same.
  • the current I C1 is often also set to a multiple value of the current IT2.
  • the transistors T1 and T2 have different emitter areas, the emitter area of the transistor T2 corresponding to a multiple of the emitter area of the transistor T1, so that correspondingly the emitter current density of the transistor T1 corresponds to a multiple of the emitter current density of the transistor T2.
  • the sum voltage from the base-emitter voltage of the transistor T1 and the voltage applied to a node between resistors R1 (consisting of the partial resistors R1a and R1b) and R2 voltage is tapped.
  • the first-mentioned base-emitter voltage of the transistor T1 corresponds to the forward voltage of a current-carrying pn junction and therefore has - as has been explained above - a negative temperature coefficient.
  • the voltage drop across the resistor R1 or to the resistors R1a and R1b depends on the difference between the base-emitter voltage of the transistor T1 and the base-emitter voltage of the transistor T2 and, as has also been explained above, a positive temperature coefficient.
  • the bandgap reference voltage source shown in FIG. 2 can be dimensioned such that the differential voltage applied to the resistor R1 is selected from the flux voltages of the two transistors T1 and T2 is subject to a negative temperature coefficient compensating positive temperature coefficient.
  • the desired temperature-stabilized bandgap reference voltage of approximately 1.25V is applied to the common base terminal of the transistors T1 and T2, which is highly multiplied by the divider with the resistors R4 and R5.
  • Bandgap reference voltage circuits of the type shown in Figure 2 are used, for example, in BICDMOS technology (bipolar, C and D-MOS technology) for precise voltage regulators. Such reference voltage circuits are specified for a relative error of at most ⁇ 1% in the temperature range of -40 ° C to 150 ° C, so that a corresponding calibration or an adjustment of the reference voltage circuit is provided. In order to keep manufacturing spreads as low as possible, each system is adjusted individually during manufacture to the desired voltage value.
  • Reference voltage circuits of the type shown in FIG. 2 are frequently used on chips which, in addition to normal switching regulators, also include circuit breakers. This applies, for example, especially for automotive applications. These power transistors are monitored by integrated temperature sensors, which in turn require a temperature-stable voltage reference to be able to safely switch dynamically in the desired high temperature range of 250 ° C (transistor core temperature). Taking into account the thermal gradient of the particular chip used, it can be assumed that the bandgap reference voltage circuit used must be as temperature stable as possible up to a temperature of 200 ° C or a relative error of ⁇ 2.5% in the extended temperature range must not exceed.
  • thermal barrier leakage currents which start at around 140 ° C and increase exponentially with increasing temperature. Therefore, there is a need to minimize the influence of the thermal junction leak currents on the reference voltage provided by the reference voltage circuit.
  • options for calibrating or balancing the output voltage of the reference voltage circuit are generally provided. In such adjustment circuits, however, leakage currents also occur, which usually exert a great influence on the temperature stability of the reference voltage circuit, especially at high temperatures. This will be explained in more detail below with reference to FIG.
  • FIG. 3 shows, by way of example, a corresponding matching circuit connected to the resistors R1a and R1b shown in FIG. 2, wherein so-called “zapping" diodes are used as adjustment switches, which break down when a high external voltage is applied and generate a low-resistance connection.
  • FIG. 3 shows such a "zapping" diode in the form of an npn bipolar transistor T22, which can be made to break through by applying a correspondingly high balancing voltage to the terminals Z 1N and Z GND .
  • the resistor R1a is short-circuited due to the breakdown of the diode formed in the bipolar transistor T22, and thus the total resistance value of the resistor R1 consisting of the resistors R1a and R1b in FIGS. 2 and 3 is changed.
  • the change in the divider ratio of the resistors R1 and R2 has a direct effect on the difference voltage of the base-emitter voltages of the bipolar transistors T1 and T2 applied to the junction between the resistors R1 and R2 (see FIG. out, so by a corresponding change this.
  • Divider ratio R1: R2 can be set or adjusted at the base of the transistor T1 voltage and thus the output from the reference voltage source reference voltage U ref .
  • collector-substrate leakage currents I.sub.sub22 (or, in the case of diodes not short-circuited) occur at high temperatures Collector-base leakage currents), which falsify the divider ratio R1: R2 and thus the output voltage U ref .
  • voltage clamping circuits are required for such shunt shunts to protect the circuit from the high voltages encountered during calibration at the balance terminals.
  • Such a voltage clamping circuit is shown in Figure 3 with a diode D3, a transistor T23 and a resistor R13.
  • the collector of the transistor T23 has a barrier layer to the substrate, indicated by a diode D2 in FIG. 3, so that collector-substrate leakage currents Isub23 also occur with respect to this transistor T23, in particular by the high balancing voltages for protecting the balancing circuit provided voltage clamping circuit, the leakage current effect described above is even enhanced.
  • No. 4,751,454 describes a temperature-independent reference voltage source, the current sources designed as transistors and a bipolar transistor comprising bandgap circuit.
  • the current sources control the bandgap circuit for generating a temperature-independent reference voltage.
  • An adjustment of the bandgap circuit is effected by adjusting the ratio of the emitter currents of the bipolar transistors of the bandgap circuit through the current source transistors, which are each connected in parallel with four identical further transistors.
  • US 4,325,018 describes a reference network for a reference voltage circuit.
  • an adjustment of a reference voltage provided by a bandgap circuit is made using extrapolated correction values provided by the correction network.
  • the present invention is therefore an object of the invention to provide a reference voltage circuit, although balanced can be; that is, at which the supplied reference voltage can be adjusted at least within certain limits, wherein nevertheless an operation of the reference voltage circuit is possible even at relatively high temperatures with sufficient accuracy.
  • the reference voltage circuit is adjusted by changing the collector current of at least one bipolar transistor of the reference voltage supplying circuit part. If the collector currents of the two bipolar transistors of the reference voltage supplying circuit part is changed, the output voltage of the reference voltage circuit can be adjusted from a preset value both up and down.
  • the adjustment is made by warping, ie distorting, the conversion ratio of the current mirror of the reference voltage circuit.
  • controllable switches in particular in the form of MOS field-effect transistors, can be activated, so that in the closed state of this switch a certain current is diverted from the collector current paths between the current mirror and the two bipolar transistors.
  • the reference voltage circuit comprises a plurality of balancing terminals which are connected to controllable switches such that upon application of a balancing voltage to the individual balancing terminals different currents from the previously mentioned collector current paths are branched off, so that different settings of the reference voltage are possible by activating different connections.
  • measurements on silicon performed on a test circuit according to the invention have a temperature response of the reference voltage of ⁇ 0.72% supplied by the reference voltage circuit in the temperature range of -40 ° C. to +225 ° C., with a comparison of the reference voltage within a range of ⁇ 3% as desired. could be performed. Assuming a basic accuracy after the adjustment of ⁇ 0.5%, the total error to be expected during manufacturing in the temperature range described above is less than ⁇ 1.5%.
  • the tunable reference voltage source of the present invention is thus particularly suitable for high temperature applications of integrated circuits such.
  • integrated circuits such as integrated voltage regulators, A / D converters or measuring circuits, which are produced by means of BICMOS processes. Since with the help of the present invention, all leakage currents can be compensated with the help of a low circuit complexity, the provision of the desired bandgap reference voltage with high accuracy and temperature stability even at working temperatures up to 250 ° C is possible.
  • the principle of reference voltage generation explained with reference to FIG. 2 is furthermore used, ie the reference voltage is obtained by adding a forward voltage of a current-carrying pn junction with a differential voltage of two different forward voltages from corresponding current-carrying pn junctions.
  • the reference voltage is obtained by adding a forward voltage of a current-carrying pn junction with a differential voltage of two different forward voltages from corresponding current-carrying pn junctions.
  • two bipolar transistors T1 and T2 are used in the voltage part generating the reference voltage, to the collectors of which certain collector currents I C1 and I C2 are supplied.
  • the base terminals of the two transistors are connected to each other, while the emitters of the two transistors are coupled to one another via a resistor circuit (see Figure 2).
  • a resistor circuit see Figure 2
  • the reference voltage is tapped at the common base terminal of the bipolar transistors T1 and T2 and optionally multiplied by a voltage divider.
  • the voltage applied to the base of the bipolar transistor T1 is composed of the base-emitter voltage of the bipolar transistor T1 and the voltage applied to the junction between the resistors R1 and R2. The latter voltage is dependent on the difference voltage between the base-emitter voltages of the two bipolar transistors T1 and T2.
  • the positive temperature coefficient of the differential voltage corresponds to the negative temperature coefficient of the base-emitter voltage of the bipolar transistor T1, so that at the common base of the bipolar transistors T1 and T2, the desired temperature-stabilized bandgap reference voltage with approx , 25V can be tapped.
  • the bipolar transistors T1 and T2 are operated with different current densities.
  • the emitter area A E2 of the bipolar transistor T2 corresponds to a multiple of the emitter area A E1 of the bipolar transistor T1.
  • the collector current I C1 of the bipolar transistor T1 generally corresponds to a multiple of the collector current I C2 of the bipolar transistor T2.
  • the voltage U tapped at the common base of the bipolar transistors T1 and T2 in the known reference voltage circuit shown in FIG. 2 can generally depend on the resistance ratio R1: R2, the collector current ratio I C1 : I C2, and the emitter area ratio A E2 :
  • U T denotes the temperature voltage and I s the reverse current of the bipolar transistors.
  • U U ' ⁇ 1 + k ⁇ U T U ' ⁇ 1 + R 1 R 2 ⁇ 1 + I C ⁇ 1 ⁇ ' I C ⁇ 2 ⁇ 1 - ln ⁇ I C ⁇ 1 ⁇ 'A e ⁇ 2 I C ⁇ 2 ⁇ A e ⁇ 1
  • U ' U T ⁇ R 1 R 2 ⁇ 1 + I C ⁇ 1 ⁇ ' I C ⁇ 2 ⁇ ln ⁇ I C ⁇ 1 ⁇ ' ⁇ A e ⁇ 2 I C ⁇ 2 ⁇ A e ⁇ 1 + U T ⁇ ln ⁇ I C ⁇ 1 ⁇ ' I S
  • FIG. 1 shows a detailed circuit diagram of a preferred exemplary embodiment of a reference voltage circuit according to the invention, in which the ratio of the current mirror used is distorted by external trimming measures in order to change the collector current ratio I C1 : I C2 .
  • a reference voltage circuit implemented in automotive applications eg airbag is shown in FIG.
  • a pair of transistors T1 and T2a coupled to one another is present, the emitter area of the transistor T2a being a multiple of the emitter area of the transistor T1.
  • the collectors of these transistors collector currents I C1 and I C2a are supplied.
  • the emitters of the two bipolar transistors are coupled to one another via a resistor circuit with resistors R1 and R2.
  • the voltage applied to the common base of the bipolar transistors T1 and T2a base voltage is tapped and highly multiplied by a voltage divider consisting of resistors R4 and R5, so that depending on the base voltage U, the desired output or reference voltage U ref can be output.
  • the voltage present at the common base of the bipolar transistors T1 and T2a operated with different current densities corresponds to the sum voltage from the base-emitter voltage of the transistor T1 and the voltage present at the junction between the resistors R1 and R2, which in turn is based on the difference between the base -Emitter voltage of the transistor T1 and the base-emitter voltage of the transistor T2a depends.
  • the operating currents of the reference voltage circuit can be adjusted via the resistors R1 and R2.
  • the reference voltage circuit By multiplying or increasing the base voltage U of the bipolar transistor T1 by means of the voltage divider R4, R5, the reference voltage circuit is able to feed itself and the supply voltage penetration is negligible.
  • the mode of operation of the reference voltage circuit shown in FIG. 1 corresponds to the mode of operation of the known reference voltage circuit shown in FIG.
  • At least one of the collector currents I C1 and I C2a is changed in order to be able to adjust the reference voltage U ref delivered by the reference voltage circuit as desired. This is done in particular by a change in the mirroring or conversion ratio of the current mirror used in the known reference voltage circuit of Figure 2.
  • the first current mirror comprises bipolar transistors T3-T5 and essentially corresponds to the current mirror used in FIG.
  • the second current mirror comprises bipolar transistors T6-T8.
  • a further bipolar transistor T2b is provided, which is designed, in particular, identically to the bipolar transistor T2a.
  • the current mirrors with the bipolar transistors T3-T5 and T6-T8 are arranged such that they are connected in parallel to each other via the multiple transistors T2a and T2b.
  • the emitter areas of the two transistors T2a and T2b are the same size, so that the base currents I C2a and I C2b supplied by the two current mirrors are identical.
  • the mirroring ratio of the second current mirror with the transistors T6-T8 remains constant even during the adjustment of the reference voltage circuit, ie, by means of a corresponding adjustment, only the mirroring ratio of the first Current mirror circuit with the bipolar transistors T3-T5 acted. This is done as follows.
  • the output voltage U ref applied to the output terminal of the reference voltage circuit can be calibrated or calibrated via balancing terminals Z P , Z 1N and Z 2N .
  • balancing terminals Z P , Z 1N and Z 2N are used, which are formed by the bipolar transistors shown in Figure 1 with short-circuited base-collector path and each one of the balancing terminals Zp, Z 1N and Z 2N with the balancing ground terminal Z Connect GND .
  • the corresponding "zapping" diode is breached, so that a low-resistance connection is produced between the base and the emitter of the corresponding "zapping" diode, which has a corresponding control of that shown in FIG shown controllable switches in the form of p-channel MOS field effect transistors result.
  • the MOS field-effect transistors M1-M3 and M8 are assigned to the matching terminal Z P.
  • MOS field effect transistors When applying the required high balancing voltage to a specific one of the balancing terminals associated with this balancing connection MOS field effect transistors are connected in such a way by the respective balancing connection corresponding low impedance connection of the respective "zapping" diode, which is assigned to the respective balancing connection current amount of the collector current Bipolar transistors T1 or T2a is branched off in the form of the branch currents IcalP and IcalN shown in Figure 1, which has a corresponding distortion of the mirror ratio of the current mirror with the bipolar transistors T3-T5 result, so that the reference voltage circuit can be calibrated within certain limits to a to achieve desired output voltage U ref .
  • the reference voltage circuit shown in Figure 1 is particularly dimensioned such that by applying a tuning voltage an increase in the output voltage U ref can be achieved at the balancing terminal Z P , while a reduction of the output voltage U ref by various amounts can be brought about by applying a balancing voltage to the balancing terminals Z 1N and Z 2N .
  • the reference voltage circuit shown in Figure 1 is dimensioned such that the output voltage can be varied within a maximum calibration range of ⁇ 3%. As can be seen from the formula for the constant C described above, such a change of the output voltage requires a change of 6% in the collector current IC1 of the bipolar transistor T1.
  • the reference voltage circuit shown in Figure 1 is dimensioned such that an increase of the reference voltage U ref by + 3% is achieved by applying a high tuning voltage between the terminals Z P and Z GND .
  • the compensation step achievable via the balancing connection Z 1N is -1% and the balancing step achievable via the balancing connection Z 2N is -2%.
  • an additive balancing of the output voltage U ref between -3% and + 3% in 1% steps is possible in this way.
  • the adjustment terminal Zp is connected via a control circuit consisting of a resistor R12, two p-channel MOS field effect transistors M15 and M16 and two inverters to the first controllable MOS field effect transistor M8.
  • This control circuit can be activated via a terminal I P and connects the gate terminal of the MOS field-effect transistor M8 in a predefined manner with the "zapping" diode Z1.
  • Corresponding control circuits are also provided for the further balancing connections Z 1N and Z 2N , but are not shown in FIG. 1 for the sake of clarity.
  • the MOS field effect transistor M8 Upon activation of the adjustment terminal Z P as a result of a breakthrough of the "zapping" diode Z1, the MOS field effect transistor M8 is turned on and a certain current I3a via a further bipolar transistor T9 from the second current mirror (bipolar transistors T6-T8) decoupled.
  • This decoupled current I3a is supplied to the MOS field-effect transistors M1-M3 and causes a certain adjustment current IcalP is branched off from the collector current path of the bipolar transistor T2a, which refers to the two MOS field-effect transistors M2 and M3 in the form of the currents shown in FIG Ical1P and Ical2P splits.
  • the mirroring ratio of the current mirror is defined with the bipolar transistors T3-T5 warped defined and the current density of the bipolar transistor T2a reduced, which accordingly has an increase in the node between the resistors R1 and R2 tapped differential voltage result, so that the desired 3% - Increase of the output voltage U ref can be achieved.
  • a predefined current I3b or I3c is coupled via the transistor T9 and fed to the MOS field effect transistors M4 and M5 or M6 and M7, so that a predefined However, in this case, trimming current IcalN is diverted from the collector current path of bipolar transistor T1.
  • This balancing current IcalN is dissipated in the form of the currents Ical1N and Ical2N shown in FIG.
  • the trimming currents IcalP and IcalN and the out-coupled currents I3a-I3c are switched off, if no trimming voltage is applied to one of the terminals Z P , Z 1N , Z 2N , so that the influence of the calibration circuit is zero in this case.
  • a dummy transistor T15 is connected to the collector and to the base of the bipolar transistor T1, although the connection of a plurality of dummy transistors T15 connected in accordance with FIG. 1 is also possible.
  • the collector well of the bipolar transistor T1 is designed to be the same size as that of the multiple transistor T2a / b, so that the increased collector-substrate or collector-base generation currents of the larger multiple transistor T2a / b are compensated by the transistors T1 and T15.
  • a structurally identical pnp bipolar transistor pair T13, T14 is provided, with the aid of which the thermal leakage currents of the pnp bipolar transistors T5 and T8 of the two current mirrors are canceled, the base of the pnp bipolar transistors T5 and T8 in each case corresponds to the Epiwanne.
  • all these bipolar transistors are advantageously operated via the currents I5a-I5c shown in Figure 1 with approximately the same current density.
  • these currents I5a-I5c are likewise derived from the current IC2b via a circuit with p-channel MOS field effect transistors M11-M14 via a current I4, which automatically effects a suitable adjustment of the base voltage of the bipolar transistors T13 and T14 with the voltage drops on the components T11, R11 and T12 shown in FIG.
  • the collector voltages of the bipolar transistors T4 and T7 are thus lower than the base voltages of a diode current voltage, which compensates for the early effects of the two current mirror circuits at the operating point of the reference voltage circuit. Furthermore, a possible saturation of the pnp bipolar transistors T4 and T7 and of the npn bipolar transistor T1 can be avoided in this way.
  • n-epi wells of the individual p-type diffusion resistors are preferably connected to the positive supply voltage V cc in order to prevent the influence of the well leakage currents at the base diffusion resistances, which is not negligible at high temperatures, on the function of the reference voltage circuit.
  • the resistors R6-R11 which are also shown in FIG. 1, serve in particular for presetting the two current mirrors, while the bipolar transistor T10 essentially corresponds to the transistor T10 already shown in FIG. 2 and is provided as an actuator for the output terminal of the reference voltage circuit, by itself the output voltage U ref To be controlled constantly under load with uneven load.

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Claims (20)

  1. Circuit de tension de référence, avec un circuit de transistors bipolaires (T1, T2a, T2b) qui fournit une tension de référence (Uref) dérivée d'une tension cumulée provenant d'une première tension et d'une deuxième tension, la première tension étant dérivée de la tension d'écoulement d'une jonction pn traversée par du courant et la deuxième tension étant dérivée de la tension différentielle de deux tensions d'écoulement de jonctions pn correspondantes traversées par du courant,
    caractérisé par
    des moyens d'équilibrage (Z1-Z3, M1-M10) pour l'équilibrage de la tension de référence (Uref) fournie par le circuit de transistors bipolaires (T1, T2a, T2b) qui pour l'équilibrage, modifient le rapport des courants de collecteur (IC1, IC2a) de transistors bipolaires (T1, T2a) du circuit de transistors bipolaires.
  2. Circuit de tension de référence selon la revendication 1,
    caractérisé en ce que
    le circuit de transistors bipolaires comprend un premier transistor bipolaire (T1) et un deuxième transistor bipolaire (T2a), un premier courant de collecteur (IC1) est amené au collecteur du premier transistor bipolaire (T1) et un deuxième courant de collecteur (IC2a) est amené au collecteur du deuxième transistor bipolaire (T2a),
    la surface d'émetteur du deuxième transistor bipolaire (T2a) étant un multiple de la surface d'émetteur du premier transistor bipolaire (T1), de sorte que le premier transistor bipolaire (T1) et le deuxième transistor bipolaire (T2a) sont traversés par des densités de courant différentes,
    la base du premier transistor bipolaire (T1) est reliée à la base du deuxième transistor bipolaire (T2a), et
    l'émetteur du premier transistor bipolaire (T1) est couplé à l'émetteur du deuxième transistor bipolaire (T2a) par un circuit de résistances (R1, R2) de telle sorte que la tension de référence (Uref) puisse être prélevée à la base du premier transistor bipolaire, la première tension correspondant à la tension base-émetteur du premier transistor bipolaire et la deuxième tension dépendant de la différence des tensions base-émetteur des premier et deuxième transistors bipolaires.
  3. Circuit de tension de référence selon la revendication 2,
    caractérisé en ce que
    les moyens d'équilibrage (Z1-Z3, M1-M10) dérivent un premier courant d'équilibrage (IcalN) du premier courant de collecteur (IC1) du premier transistor bipolaire (T1) et/ou un deuxième courant d'équilibrage (IcalP) du deuxième courant de collecteur (IC2a) du deuxième transistor bipolaire (T2a).
  4. Circuit de tension de référence selon la revendication 3,
    caractérisé en ce que
    les moyens d'équilibrage (Z1-23, M1-M10) comportent plusieurs raccordements couplés aux collecteurs des premier et deuxième transistors bipolaires (T1, T2a) par un circuit de commande présentant des interrupteurs pilotables (M1-M10), moyennant quoi à l'application d'un courant d'équilibrage correspondant sur les raccordements, respectivement un autre premier ou deuxième courant d'équilibrage (IcalN, IcalP) est dérivé du premier ou du deuxième courant de collecteur (Ica, IC2a).
  5. Circuit de tension de référence selon la revendication 4,
    caractérisé en ce que
    les moyens d'équilibrage (Z1-Z3, M1-M10) comportent trois raccordements.
  6. Circuit de tension de référence selon la revendication 4 ou 5,
    caractérisé en ce que
    les raccordements des moyens d'équilibrage (Z1-Z3, M1-M10) sont couplés à des diodes (Z1-Z3) qui se déchargent dans le sens de non conduction lors de l'application de la tension d'équilibrage correspondante et de ce fait, pilotent des interrupteurs correspondants pilotables (M1-M10) du circuit de commande des moyens d'équilibrage.
  7. Circuit de tension de référence selon la revendication 6,
    caractérisé en ce que
    les interrupteurs pilotables (M1-M10) sont réalisés par des transistors à effet de champ MOS.
  8. Circuit de tension de référence selon l'une quelconque des revendications précédentes,
    caractérisé en ce que
    pour produire les courants de collecteur (ICI, IC2a) des transistors bipolaires (T1, T2a), on prévoit un circuit de miroir de courant (T3-T5).
  9. Circuit de tension de référence selon la revendication 8 et selon l'une quelconque des revendications 2 à 7,
    caractérisé en ce que
    le circuit de transistors bipolaires comporte un troisième transistor bipolaire (T2b) identique au deuxième transistor bipolaire (T2a), et un autre circuit de miroir de courant (T6-T8) est couplé au troisième transistor bipolaire (T2b) de telle sorte que le circuit de miroir de courant (T3-T5) et l'autre circuit de miroir de courant (T6-T8) sont connectés en parallèle par le deuxième transistor bipolaire (T2a) et le troisième transistor bipolaire (T2b), la base ou l'émetteur du deuxième transistor bipolaire (T2à) étant relié(e) à la base ou l'émetteur du troisième transistor bipolaire (T2b).
  10. Circuit de tension de référence selon la revendication 9,
    caractérisé en ce que
    les surfaces d'émetteur des premier et deuxième transistors bipolaires (T2a, T2b) sont de taille semblable, de sorte que les courants de base (IC2a, IC2b) fournis par les deux circuits de miroir de courant (T3-T5 ; T6-T8) sont de même importance.
  11. Circuit de tension de référence selon la revendication 9 ou 10 et selon l'une quelconque des revendications 4 à 7,
    caractérisé en ce que
    les raccordements des moyens d'équilibrage (Z1-Z3, M1-M10) sont couplés à l'autre circuit de miroir de courant (T6-T9), au moyen d'interrupteurs pilotables (M8-M10), moyennant quoi lors de l'application d'une tension d'équilibrage sur l'un des raccordements, un interrupteur pilotable (M8-M10) associé à ce raccordement dérive un courant de commande (I3a-I3c) qui, de son côté, entraîne une activation d'un interrupteur pilotable (M2, M3, M5, M7), connecté en aval de l'interrupteur pilotable (M8-M10) correspondant, au moyen duquel le courant de équilibrage concerné (IcalN, IcalP) est dérivé du premier ou du deuxième courant de collecteur (IC1, IC2a).
  12. Circuit de tension de référence selon la revendication 11,
    caractérisé en ce que
    le premier courant de équilibrage (IcalN) est guidé par deux interrupteurs pilotables (M5, M7) connectés en parallèle, les interrupteurs pilotables (M5, M7) connectés en parallèle pouvant être activés par des courants de commande (I3b, I3c) différents dérivés du deuxième circuit de miroir de courant (T6-T8).
  13. Circuit de tension de référence selon la revendication 12,
    caractérisé en ce que
    le deuxième courant de équilibrage (IcalP) est guidé par deux interrupteurs pilotables (M2, M3) connectés en parallèle qui peuvent tous les deux être activés par le même courant de commande (I3a) dérivé de l'autre circuit de miroir de courant (T6-T8).
  14. Circuit de tension de référence selon la revendication 12 et 13,
    caractérisé en ce que
    les raccordements de drain des interrupteurs pilotables (M5, M7) prévus pour le premier courant de équilibrage (IcalN) et des interrupteurs pilotables (M2, M3) prévus pour le deuxième courant de équilibrage (IcalP) sont reliés entre eux.
  15. Circuit de tension de référence selon la revendication 13 ou 14,
    caractérisé en ce que
    respectivement l'un des interrupteurs pilotables (M5, M7) prévus pour le premier courant de équilibrage (IcalN) est identique à l'un des interrupteurs pilotables (M2, M3) prévus pour le deuxième courant de équilibrage (IcalP).
  16. Circuit de tension de référence selon l'une quelconque des revendications 9 à 15,
    caractérisé en ce qu'
    un quatrième transistor bipolaire (T5) est raccordé par sa base à la base du premier transistor bipolaire (T1) et par son émetteur ainsi que son collecteur au collecteur du premier transistor bipolaire (T1).
  17. Circuit de tension de référence selon l'une quelconque des revendications 9 à 16,
    caractérisé en ce que
    le premier transistor bipolaire (T1) possède un caisson de collecteur essentiellement exactement de la même taille que le caisson de collecteur des deuxième et troisième transistors bipolaires (T2a, T2b).
  18. Circuit de tension de référence selon l'une quelconque des revendications 9 à 17,
    caractérisé en ce que
    le circuit de miroir de courant (T3-T5) et l'autre circuit de miroir de courant (T6-T8) comportent respectivement deux transistors bipolaires (T3, T4 ; T6, T7) couplés à une sortie correspondante du circuit de miroir de courant respectif ainsi qu'un transistor bipolaire pnp (T5, T8) raccordé à un raccordement de base commun de ces deux transistors bipolaires (T3, T4 ; T6, T7), et au moins un autre transistor bipolaire pnp (T 13, T 14) est connecté en parallèle aux transistors bipolaires pnp (T5, T8), les circuits de miroir de courant ((T3, T5 ; T6-T8) étant réalisé de telle sorte que les transistors bipolaires pnp (T5, T8, T13, T14) sont exploités avec des densités de courant identiques.
  19. Circuit de tension de référence selon l'une quelconque des revendications précédentes,
    caractérisé en ce que
    des caissons épi n des transistors bipolaires du circuit de tension de référence sont reliés à un raccordement Vcc en tension d'alimentation positive.
  20. Circuit de tension de référence selon l'une quelconque des revendications précédentes,
    caractérisé en ce que
    les raccordements de base commun des premier et deuxième transistors (T1, T2a) sont reliés à un circuit de diviseurs de tension (R4, R5).
EP99105492A 1998-04-21 1999-03-17 Circuit de tension de référence Expired - Lifetime EP0952509B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19817791A DE19817791A1 (de) 1998-04-21 1998-04-21 Referenzspannungsschaltung
DE19817791 1998-04-21

Publications (3)

Publication Number Publication Date
EP0952509A2 EP0952509A2 (fr) 1999-10-27
EP0952509A3 EP0952509A3 (fr) 2000-03-29
EP0952509B1 true EP0952509B1 (fr) 2007-05-30

Family

ID=7865320

Family Applications (1)

Application Number Title Priority Date Filing Date
EP99105492A Expired - Lifetime EP0952509B1 (fr) 1998-04-21 1999-03-17 Circuit de tension de référence

Country Status (3)

Country Link
US (1) US6094041A (fr)
EP (1) EP0952509B1 (fr)
DE (2) DE19817791A1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1317567B1 (it) * 2000-05-25 2003-07-09 St Microelectronics Srl Circuito di calibrazione di una tensione di riferimento a band-gap.
US6211660B1 (en) * 2000-06-13 2001-04-03 Nortel Networks, Limited MOS transistor output circuits using PMOS transistors
JP2003150115A (ja) * 2001-08-29 2003-05-23 Seiko Epson Corp 電流生成回路、半導体集積回路、電気光学装置および電子機器
US7173406B2 (en) * 2004-06-24 2007-02-06 Anadigics, Inc. Method and apparatus for gain control
US7019508B2 (en) * 2004-06-24 2006-03-28 Anadigics Inc. Temperature compensated bias network
US7755419B2 (en) 2006-01-17 2010-07-13 Cypress Semiconductor Corporation Low power beta multiplier start-up circuit and method
US7830200B2 (en) * 2006-01-17 2010-11-09 Cypress Semiconductor Corporation High voltage tolerant bias circuit with low voltage transistors

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4100437A (en) * 1976-07-29 1978-07-11 Intel Corporation MOS reference voltage circuit
US4325018A (en) * 1980-08-14 1982-04-13 Rca Corporation Temperature-correction network with multiple corrections as for extrapolated band-gap voltage reference circuits
ATE66756T1 (de) * 1985-09-30 1991-09-15 Siemens Ag Trimmbare schaltungsanordnung zur erzeugung einer temperaturunabhaengigen referenzspannung.
IT1227488B (it) * 1988-11-23 1991-04-12 Sgs Thomson Microelectronics Circuito di riferimento di tensione ad andamento in temperatura linearizzato.
US5247241A (en) * 1991-10-21 1993-09-21 Silicon Systems, Inc. Frequency and capacitor based constant current source
US5241261A (en) * 1992-02-26 1993-08-31 Motorola, Inc. Thermally dependent self-modifying voltage source

Also Published As

Publication number Publication date
DE59914352D1 (de) 2007-07-12
US6094041A (en) 2000-07-25
EP0952509A3 (fr) 2000-03-29
DE19817791A1 (de) 1999-10-28
EP0952509A2 (fr) 1999-10-27

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