EP0647356A1 - Procede de fabrication d'un condensateur en cuvette - Google Patents

Procede de fabrication d'un condensateur en cuvette

Info

Publication number
EP0647356A1
EP0647356A1 EP93912618A EP93912618A EP0647356A1 EP 0647356 A1 EP0647356 A1 EP 0647356A1 EP 93912618 A EP93912618 A EP 93912618A EP 93912618 A EP93912618 A EP 93912618A EP 0647356 A1 EP0647356 A1 EP 0647356A1
Authority
EP
European Patent Office
Prior art keywords
bowl
capacitor
auxiliary layer
layer
lower capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP93912618A
Other languages
German (de)
English (en)
Inventor
Stefan Auer
Armin Kohlhase
Hanno Melzner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0647356A1 publication Critical patent/EP0647356A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

L'invention concerne un condensateur en cuvette, utilisé notamment dans les cellules de mémoire à condensateur multicouches au-dessus de la ligne de binaire, pour lequel il est prévu d'utiliser un procédé de polissage mécanique chimique (CMP) lors de la fabrication de l'électrode inférieure du condensateur (44, 46).
EP93912618A 1992-06-30 1993-06-24 Procede de fabrication d'un condensateur en cuvette Withdrawn EP0647356A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE4221431 1992-06-30
DE4221431A DE4221431A1 (de) 1992-06-30 1992-06-30 Herstellverfahren für einen Schlüsselkondensator
PCT/DE1993/000551 WO1994000874A1 (fr) 1992-06-30 1993-06-24 Procede de fabrication d'un condensateur en cuvette

Publications (1)

Publication Number Publication Date
EP0647356A1 true EP0647356A1 (fr) 1995-04-12

Family

ID=6462140

Family Applications (1)

Application Number Title Priority Date Filing Date
EP93912618A Withdrawn EP0647356A1 (fr) 1992-06-30 1993-06-24 Procede de fabrication d'un condensateur en cuvette

Country Status (6)

Country Link
EP (1) EP0647356A1 (fr)
JP (1) JPH07508136A (fr)
KR (1) KR950702339A (fr)
DE (1) DE4221431A1 (fr)
TW (1) TW230844B (fr)
WO (1) WO1994000874A1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5714779A (en) * 1992-06-30 1998-02-03 Siemens Aktiengesellschaft Semiconductor memory device having a transistor, a bit line, a word line and a stacked capacitor
DE4221432C2 (de) * 1992-06-30 1994-06-09 Siemens Ag Globales Planarisierungsverfahren für integrierte Halbleiterschaltungen oder mikromechanische Bauteile
KR950021710A (ko) * 1993-12-01 1995-07-26 김주용 반도체 장치의 캐패시터 제조방법
US5840623A (en) * 1995-10-04 1998-11-24 Advanced Micro Devices, Inc. Efficient and economical method of planarization of multilevel metallization structures in integrated circuits using CMP
JPH10144882A (ja) * 1996-11-13 1998-05-29 Oki Electric Ind Co Ltd 半導体記憶素子のキャパシタ及びその製造方法
WO1998028789A1 (fr) * 1996-12-20 1998-07-02 Hitachi, Ltd. Dispositif memoire a semi-conducteur et procede de fabrication associe
GB2322964B (en) * 1997-03-07 2001-10-17 United Microelectronics Corp Polysilicon CMP process for high-density DRAM cell structures

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2524862B2 (ja) * 1990-05-01 1996-08-14 三菱電機株式会社 半導体記憶装置およびその製造方法
US5162248A (en) * 1992-03-13 1992-11-10 Micron Technology, Inc. Optimized container stacked capacitor DRAM cell utilizing sacrificial oxide deposition and chemical mechanical polishing

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9400874A1 *

Also Published As

Publication number Publication date
DE4221431A1 (de) 1994-01-05
JPH07508136A (ja) 1995-09-07
TW230844B (fr) 1994-09-21
WO1994000874A1 (fr) 1994-01-06
KR950702339A (ko) 1995-06-19

Similar Documents

Publication Publication Date Title
DE4307725C2 (de) Verfahren zur Herstellung einer Stapelkondensator-DRAM-Zelle
EP0740347B1 (fr) Structure de mémoire à semi-conducteurs utilisant un diélectrique ferroélectrique et méthode de fabrication
DE10007018A1 (de) Halbleiterbauelemente mit Kondensator und Herstellungsverfahren hierfür
DE4113233A1 (de) Halbleiterspeichereinrichtung und verfahren zu deren herstellung
DE19935947A1 (de) Verfahren zum Ausbilden einer Mehrebenen-Zwischenverbindung in einem ferroelektrischen Speicherbauelement
DE10235986A1 (de) Nichtflüchtige Speichervorrichtung mit einer schwebenden Trap-Speicherzelle und Verfahren zur Herstellung derselben
DE102010003452B4 (de) Verfahren zur Herstellung eines Halbleiterbauelements mit einem Kondensator, der in der Kontaktebene ausgebildet ist
DE10236682A1 (de) Halbleitervorrichtung
DE19842704C2 (de) Herstellverfahren für einen Kondensator mit einem Hoch-epsilon-Dielektrikum oder einem Ferroelektrikum nach dem Fin-Stack-Prinzip unter Einsatz einer Negativform
DE4038114A1 (de) Halbleiterspeicher und verfahren zu seiner herstellung
DE4442432A1 (de) Verfahren zum Herstellen von Kondensatoren in Halbleiterspeichervorrichtungen
DE4210855A1 (de) Speicherelement fuer einen dram und herstellungsverfahren fuer einen dram
EP0648374B1 (fr) Procede planar pour circuits integres a semi-conducteurs
DE4441153C2 (de) Verfahren zur Herstellung eines Kondensators einer Halbleiterspeichervorrichtung
WO1994000874A1 (fr) Procede de fabrication d'un condensateur en cuvette
DE102005001904A1 (de) Halbleiterspeicher, Halbleiterbauteil und Verfahren zu deren Herstellung
DE4223878C2 (de) Herstellverfahren für eine Halbleiterspeicheranordnung
DE4102184C2 (de) Verfahren zum Herstellen einer DRAM-Zelle
DE19842684C1 (de) Auf einem Stützgerüst angeordneter Kondensator in einer Halbleiteranordnung und Herstellverfahren
DE102004004584A1 (de) Halbleiterspeicherzelle sowie zugehöriges Herstellungsverfahren
DE4208129C2 (de) Halbleiterspeicherbauelement und Verfahren zu seiner Herstellung
DE10057806B4 (de) Ferroelektrische Speicheranordnung und Verfahren zu ihrer Herstellung
DE4409718A1 (de) Kondensator für ein Halbleiterbauelement und Verfahren zu seiner Herstellung
DE10219841B4 (de) Kontaktplugausbildung für Bauelemente mit gestapelten Kondensatoren
DE10134101B4 (de) Integrierter Halbleiterspeicher und Herstellungsverfahren

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT DE FR GB IE IT NL

17P Request for examination filed

Effective date: 19941216

17Q First examination report despatched

Effective date: 19970502

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 19980717