EP0301284B1 - Schaltungsanordnung einer Spannungsquelle mit vorgebbaren Werten der Quellenspannung und des Innenwiderstandes - Google Patents

Schaltungsanordnung einer Spannungsquelle mit vorgebbaren Werten der Quellenspannung und des Innenwiderstandes Download PDF

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Publication number
EP0301284B1
EP0301284B1 EP88110804A EP88110804A EP0301284B1 EP 0301284 B1 EP0301284 B1 EP 0301284B1 EP 88110804 A EP88110804 A EP 88110804A EP 88110804 A EP88110804 A EP 88110804A EP 0301284 B1 EP0301284 B1 EP 0301284B1
Authority
EP
European Patent Office
Prior art keywords
voltage
source
circuit arrangement
output
variable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP88110804A
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German (de)
English (en)
French (fr)
Other versions
EP0301284A2 (de
EP0301284A3 (en
Inventor
Wolfgang Esser
Peter Jung
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wincor Nixdorf International GmbH
Original Assignee
Siemens Nixdorf Informationssysteme AG
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Publication of EP0301284A2 publication Critical patent/EP0301284A2/de
Publication of EP0301284A3 publication Critical patent/EP0301284A3/de
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current 
    • G05F1/46—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

Definitions

  • the invention relates to a circuit arrangement of a voltage source emitting an output current or an output voltage with predeterminable values of the source voltage and the internal resistance.
  • Voltage sources whose source voltage and internal resistance can be specified independently of one another, i.e. can be set, are e.g. to test electrical devices or circuit groups if their reaction to different types of wiring of their inputs can be determined.
  • the voltage source connected to the inputs is successively set to different source voltages and internal resistances.
  • a circuit arrangement which makes this possible contains an adjustable voltage source with which a resistance arrangement which can be switched between a plurality of resistance values is connected in series and which serves as a switchable internal resistance of the voltage source.
  • a manually operable changeover switch can be provided as the changeover device, but it is also possible to implement such switch devices by means of a relay arrangement.
  • the invention solves this problem for a circuit arrangement of the type mentioned above by a computing circuit for calculating a reference variable corresponding to the output current or the output voltage for a current or voltage regulator forming the output of the voltage source from a measured variable corresponding to the output voltage or the output current and the variable to be specified Input values corresponding to values.
  • a circuit arrangement according to the invention therefore does not contain the series connection of a voltage source with a resistor arrangement, but rather the current or voltage regulator serves to simulate the behavior of a voltage source with predeterminable values of the source voltage and the internal resistance at its output connections, in that its reference variable corresponds to the behavior to be simulated is calculated.
  • the switchable internal resistances and the switch device with the mechanical switch contacts are superfluous, and the input variables to be supplied to the circuit arrangement, which correspond to the values to be specified, can be set with analog switches, since they only have a controlling function.
  • the calculation of the reference variable for the current or voltage regulator to be carried out with the arithmetic circuit is very simple, because it is based on the fact that the behavior of a voltage source at predetermined values of the source voltage and the internal resistance can be completely described by the output voltage and the output current.
  • the output voltage and the output current of a voltage source can be represented by simple difference and product formation depending on the internal resistance and the source voltage. Accordingly, the circuit arrangement according to the invention is further developed such that the arithmetic circuit contains an adder and a multiplier in series connection, each of which is supplied with one of the two input variables.
  • the formation of the difference between output voltage and source voltage required to emulate the behavior of the voltage source can be done very simply in such an amplifier in that a control voltage proportional to the output voltage and a control voltage proportional to the source voltage is supplied with the opposite sign.
  • the summing amplifier has the advantage over a digital adder circuit that its gain can be set, for example, in a feedback branch, so that the difference between the output voltage and the source voltage can be changed very easily by a factor that corresponds to the behavior of the voltage source when simulating the Output voltage is proportional to the internal resistance and inversely proportional to the internal resistance when simulating the output current.
  • the summing amplifier has a feedback branch which can be set in accordance with different values of the internal resistance to be specified.
  • a normal multiplying digital-to-analog converter can be provided as the impedance network for setting different internal resistance values. It is known that converters of this type require a virtual measuring point for current summation, which is also present in summing amplifiers. The advantage of using such a multiplying converter is that a multi-stage setting of the internal resistance on the summing amplifier is possible with commercially available integrated circuits.
  • the measured variable corresponding to the output voltage is measured with a voltage follower circuit
  • its high input resistance particularly in the case of high internal resistance values or lower loads connected to the circuit arrangement, means that the output current of the circuit arrangement practically matches the output current of the current regulator supplying it , because the input current of the voltage measuring circuit is then negligibly small.
  • a circuit arrangement according to the invention is particularly suitable in the embodiment with a summing amplifier also for setting complex internal resistance values, since the impedance network located in the feedback branch of the summing amplifier then only has to be designed to be correspondingly inductive or capacitive.
  • FIG. 1 shows a voltage source 10 which supplies an output voltage U O and an output current I O at its output terminals 11 and 12. Any load can be connected to the voltage source 10, which is shown in FIG. 1 as a series connection of a further voltage source 13 with a load resistor 14.
  • the voltage source 10 contains an ideal voltage source 15, which supplies a source voltage U S and is connected in series with a resistor arrangement 16, the individual resistors of which can each be activated individually with a switching device 17. If, at the ideal voltage source 15, as shown in FIG. 1, the source voltage U S can be set to different values, then the source voltage U S and its internal resistance can be specified with different values.
  • This circuitry structure has voltage sources which are suitable for the measurement purposes mentioned at the outset.
  • FIG. 2 shows a circuit arrangement with a voltage regulator 20, which outputs an output voltage U O or an output current I Q at an output terminal 23 and is controlled by a reference variable S UO, which is generated by a computing circuit with a subtractor 26 and a multiplier 25 is formed.
  • An input variable S U is fed to the subtractor 26 via an input connection 21, said input quantity being proportional to the source voltage to be specified for the voltage source formed with the overall circuit.
  • An input variable S R which is proportional to the internal resistance to be specified, is fed to the multiplier 25 via an input connection 22.
  • a current measuring circuit 24 is provided, via which the output current I O is conducted and which outputs a measured variable M IO proportional to the multiplier 25.
  • the product is formed from the input variable S R , which is proportional to the internal resistance to be specified, and the measured variable M IO, which is proportional to the output current I O , and subtracted from the input variable S U , which is proportional to the source voltage to be specified, in the subtractor 26, because that with the Product formed by multiplier 25 is supplied as an input variable to subtractor 26.
  • This then provides the command variable S UO , the on the basis of the values to be specified for source voltage and internal resistance, controls the voltage regulator 20 such that it outputs the desired output voltage U O at the measured current I O.
  • the mode of operation of the circuit arrangement shown in FIG. 2 thus satisfies the above-mentioned relationship (1), so that it has the behavior of a voltage source of the type shown in FIG. 1, the respective internal resistance not being arranged in the output circuit but being proportional to it Value is supplied as an input variable S R , which is the factor of a multiplication process.
  • the circuit arrangement does not contain an ideal voltage source, but rather it is supplied with an input variable S U which is proportional to a source voltage value to be specified.
  • FIG. 3 shows an embodiment of the invention with a current regulator 30 which outputs the output voltage U O or the output current I O via an output connection 33. Its input is fed with a reference variable S IO , which is supplied by a multiplier 35. At its one input, the latter receives the output signal of a subtractor 36, to which the input variable S U is fed via an input connection 31 and which is proportional to the source voltage to be specified. At its second input, the subtractor 36 receives a measured variable M UO , which is proportional to the output voltage U O and is supplied by a voltmeter 34 connected to the output of the current regulator 30. The second input of the multiplier 35 receives an input variable S R via an input connection 32 which is inversely proportional to the internal resistance to be specified.
  • the circuit arrangement shown in FIG. 3 works accordingly in such a way that first the difference between the two of the source voltage to be specified and the output voltage U O proportional values is formed, after which this difference is multiplied by the reciprocal of the internal resistance to be specified to form the reference variable S IO .
  • the circuit arrangement shown in FIG. 3 thus clearly fulfills the above-mentioned relationship (2) for the output current I O of a voltage source.
  • the exemplary embodiment shown in FIG. 3 thus also works without a special, changeable ideal voltage source and without resistors in the output circuit for setting a predetermined internal resistance.
  • FIG. 4 shows a further exemplary embodiment of the invention.
  • This circuit arrangement works according to the principle explained above with reference to FIG. 3. It is supplied with the input variable S U at input terminals 41 and 45 as a voltage signal and the input variable S R at an input terminal 42 as a current signal.
  • the reference variable S IO for a current transformer 40 which outputs the output current I O or the output voltage U O and output connections 43 and 44 is generated by a computing circuit 47.
  • a load resistor 50 is connected to the output connections 43 and 44.
  • the arithmetic circuit 47 In addition to the input variables S U and S R , the arithmetic circuit 47 also receives the measured variable M UO , which is supplied to it by an operational amplifier 51 connected as a voltage follower, which operates as a voltage meter and measures the output voltage U O of the current regulator 40.
  • the input variable S U is fed via an input resistor 48 and the measured variable M UO via an input resistor 49 together with the input variable S R to the inverting input of an operational amplifier 46.
  • the operational amplifier 46 works as a summing amplifier and supplies at its output the command variable S IO for the current controller 40.
  • the signals supplied to the non-inverting input generate currents I1, I2 and I3 which, together with an input current I4 of the operational amplifier 46, are explained in more detail below .
  • the input variable S U which is proportional to the source voltage to be specified, has a direction in accordance with FIG. 4 such that it is subjected to a difference when it is routed to the inverting input of the operational amplifier 46 and the associated sign reversal with the measured variable M UO , so that the Operational amplifier 46 thus amplifies the difference between these two quantities.
  • the degree of amplification of the operational amplifier 46 can be changed so that the amplification of the said difference can thereby be provided with a factor which can be dimensioned in accordance with the input variable S R which is inversely proportional to the internal resistance to be specified.
  • the circuit shown in FIG. 4 is accordingly provided with a feedback branch for the operational amplifier 46, which contains an adjustable impedance network 52, which can be adjusted according to different input variables S R via an adjustment controller 53.
  • the circuit arrangement shown in FIG. 4 thus contains a very simple arithmetic circuit 47 which only contains the operational amplifier 46 and the input resistors 48 and 49.
  • the ratio R49 / R48 is a proportionality factor by which the source voltage simulated by the circuit arrangement according to FIG. 4 differs from the input value S U.
  • the quotient R52 / R49 corresponds to the quotient 1 / R I and can be set by changing the resistance value R52 according to different internal resistance values to be specified.
  • 5 shows a resistor network for this purpose, which is constructed in the manner of a multiplying digital-to-analog converter and contains in its longitudinal branch resistance values R, to which parallel branches with a resistance value 2R are connected in each case.
  • the circuit is completed by a further resistance value 2R, which is connected to ground potential.
  • Switch inputs 54 are controlled between two possible switch positions via control inputs 53. In the first switch position, they connect the respective parallel branch with a resistance value 2R with ground potential, in the second switch position with the input terminal 42 of the circuit arrangement shown in Fig. 4.
  • the longitudinal branch of the resistor network shown in FIG. 5 is connected to the output of the operational amplifier 46 shown in FIG. 4 via an input connection denoted by 55.
  • the resistance network is therefore in the feedback branch of the operational amplifier 46.
  • the digital-to-analog converter shown in FIG. 5 can be used to convert digital input variables supplied via the control inputs 53 into analog output variables at the connection 42.
  • the current I3, which is given when the voltage signal S IO is applied to the input terminal 46 as the input variable S R to the circuit arrangement shown in FIG. 4, has the respective value
  • n is the width of the digital data word which is fed to the control inputs 53
  • m is the value of this data word which can be set before 0 to 2 n-1 .

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
EP88110804A 1987-07-30 1988-07-06 Schaltungsanordnung einer Spannungsquelle mit vorgebbaren Werten der Quellenspannung und des Innenwiderstandes Expired - Lifetime EP0301284B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19873725348 DE3725348A1 (de) 1987-07-30 1987-07-30 Schaltungsanordnung einer spannungsquelle mit vorgebbaren werten der quellenspannung und des innenwiderstandes
DE3725348 1987-07-30

Publications (3)

Publication Number Publication Date
EP0301284A2 EP0301284A2 (de) 1989-02-01
EP0301284A3 EP0301284A3 (en) 1989-06-14
EP0301284B1 true EP0301284B1 (de) 1993-04-07

Family

ID=6332754

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Application Number Title Priority Date Filing Date
EP88110804A Expired - Lifetime EP0301284B1 (de) 1987-07-30 1988-07-06 Schaltungsanordnung einer Spannungsquelle mit vorgebbaren Werten der Quellenspannung und des Innenwiderstandes

Country Status (4)

Country Link
US (1) US4878009A (enrdf_load_stackoverflow)
EP (1) EP0301284B1 (enrdf_load_stackoverflow)
DE (2) DE3725348A1 (enrdf_load_stackoverflow)
ES (1) ES2041743T3 (enrdf_load_stackoverflow)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5552696A (en) * 1994-02-18 1996-09-03 Siemens Energy & Automation, Inc. Multiple setpoint configuration in a voltage regulator controller
DE59607176D1 (de) * 1996-10-21 2001-08-02 Siebe Appliance Controls Gmbh Vorrichtung zur Regelung einer Spannung
US6081100A (en) * 1999-05-20 2000-06-27 Guthrie; Dennis Lynn Method for simulating behavior of batteries
US8604765B2 (en) * 2011-06-06 2013-12-10 National Instruments Corporation Resistance simulation and common mode rejection for digital source-measure units
CN118092567A (zh) * 2024-04-18 2024-05-28 常州同惠电子股份有限公司 基于fpga实现可编程内阻方法及调节系统

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2144757A1 (de) * 1971-09-07 1973-03-15 Transtechnik Gmbh Konstruktion Programmierbarer stromgenerator
DE2232037A1 (de) * 1972-06-30 1974-01-10 Kernforschung Gmbh Ges Fuer Stabilisierte gleichspannungsquelle
DE3066074D1 (en) * 1979-04-09 1984-02-16 Org Europeene De Rech Current chopper for regulating the supply of a load
DE3301068C2 (de) * 1983-01-14 1986-11-27 ANT Nachrichtentechnik GmbH, 7150 Backnang Schaltregler mit Einrichtung zum Erfassen des Mittelwertes der Ausgangsspannung
US4536699A (en) * 1984-01-16 1985-08-20 Gould, Inc. Field effect regulator with stable feedback loop
FR2576722B1 (fr) * 1985-01-25 1987-04-30 Centre Nat Etd Spatiales Alimentation en courant continu a point de fonctionnement ajustable
DD235124B1 (de) * 1985-03-06 1987-09-23 Robotron Messelekt Bipolare programmierbare strom-spannungs-praezisionsquelle
DE3604716A1 (de) * 1986-02-14 1987-08-20 Nixdorf Computer Ag Schaltungsanordnung zur steuerung des laengsschaltgliedes eines getakteten stromversorgungsgeraets

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
DATA CONVERSION SEMINAR, Juli 1984, Analog Devices Inc., US *
HANDBOOK OF INTEGRATED-CIRCUIT OPERATIONAL AMPLIFIERS, G.B.RUTKOWSKI, Prentice-Hall, Englewood Cliffs, New Jersey, US, 1975 *

Also Published As

Publication number Publication date
EP0301284A2 (de) 1989-02-01
EP0301284A3 (en) 1989-06-14
DE3880036D1 (de) 1993-05-13
ES2041743T3 (es) 1993-12-01
DE3725348A1 (de) 1989-02-09
US4878009A (en) 1989-10-31
DE3725348C2 (enrdf_load_stackoverflow) 1991-03-14

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