EP0301284B1 - Voltage source circuit arrangement with predetermined values of the source voltage and the internal resistances - Google Patents

Description

The invention relates to a circuit arrangement of a voltage source emitting an output current or an output voltage with predeterminable values of the source voltage and the internal resistance.

Voltage sources whose source voltage and internal resistance can be specified independently of one another, i.e. can be set, are e.g. to test electrical devices or circuit groups if their reaction to different types of wiring of their inputs can be determined. The voltage source connected to the inputs is successively set to different source voltages and internal resistances. A circuit arrangement which makes this possible contains an adjustable voltage source with which a resistance arrangement which can be switched between a plurality of resistance values is connected in series and which serves as a switchable internal resistance of the voltage source. A manually operable changeover switch can be provided as the changeover device, but it is also possible to implement such switch devices by means of a relay arrangement.

If such an arrangement of a voltage source and variable internal resistance is not to be switched manually, but possibly also automatically by means of electrical control signals, by a predetermined sequence of source voltage and internal resistance values, then this can be achieved with a digitally adjustable voltage source in connection with a relay circuit. The use of electronic analog switches for switching the internal resistance values is not possible in many applications, since such switch elements do not have sufficient dielectric strength and their inherent resistance can cause measurement errors in the range of low internal resistance values.

For voltage sources of the type considered here, a mechanical switch contact is therefore required for each predeterminable internal resistance value. In order to achieve the highest possible operational reliability, the switchable internal resistances must also be able to withstand the high power consumed in the event of a short circuit. A large amount of space and costs are then required.

It is an object of the invention to realize the independent adjustment of the source voltage and the internal resistance of a voltage source in such a way that no mechanical switch contacts and no separate high-resistance resistors are required.

The invention solves this problem for a circuit arrangement of the type mentioned above by a computing circuit for calculating a reference variable corresponding to the output current or the output voltage for a current or voltage regulator forming the output of the voltage source from a measured variable corresponding to the output voltage or the output current and the variable to be specified Input values corresponding to values.

A circuit arrangement according to the invention therefore does not contain the series connection of a voltage source with a resistor arrangement, but rather the current or voltage regulator serves to simulate the behavior of a voltage source with predeterminable values of the source voltage and the internal resistance at its output connections, in that its reference variable corresponds to the behavior to be simulated is calculated. As a result, the switchable internal resistances and the switch device with the mechanical switch contacts are superfluous, and the input variables to be supplied to the circuit arrangement, which correspond to the values to be specified, can be set with analog switches, since they only have a controlling function.

The calculation of the reference variable for the current or voltage regulator to be carried out with the arithmetic circuit is very simple, because it is based on the fact that the behavior of a voltage source at predetermined values of the source voltage and the internal resistance can be completely described by the output voltage and the output current. As is known, the output voltage and the output current of a voltage source can be represented by simple difference and product formation depending on the internal resistance and the source voltage. Accordingly, the circuit arrangement according to the invention is further developed such that the arithmetic circuit contains an adder and a multiplier in series connection, each of which is supplied with one of the two input variables. The formation of the difference between output voltage and source voltage required to emulate the behavior of the voltage source can be done very simply in such an amplifier in that a control voltage proportional to the output voltage and a control voltage proportional to the source voltage is supplied with the opposite sign. Now the summing amplifier has the advantage over a digital adder circuit that its gain can be set, for example, in a feedback branch, so that the difference between the output voltage and the source voltage can be changed very easily by a factor that corresponds to the behavior of the voltage source when simulating the Output voltage is proportional to the internal resistance and inversely proportional to the internal resistance when simulating the output current. This results in a very simple circuit implementation, in which only a single amplifier is provided in the arithmetic circuit, on which the source voltage and the internal resistance can be set, and with which the difference formation and the multiplication for calculating the reference variable for the downstream current or voltage regulator can be carried out simultaneously.

An advantageous further development of the invention is then given in that the summing amplifier has a feedback branch which can be set in accordance with different values of the internal resistance to be specified. In such a feedback branch, a normal multiplying digital-to-analog converter can be provided as the impedance network for setting different internal resistance values. It is known that converters of this type require a virtual measuring point for current summation, which is also present in summing amplifiers. The advantage of using such a multiplying converter is that a multi-stage setting of the internal resistance on the summing amplifier is possible with commercially available integrated circuits.

If, when using a current regulator, the measured variable corresponding to the output voltage is measured with a voltage follower circuit, its high input resistance, particularly in the case of high internal resistance values or lower loads connected to the circuit arrangement, means that the output current of the circuit arrangement practically matches the output current of the current regulator supplying it , because the input current of the voltage measuring circuit is then negligibly small.

A circuit arrangement according to the invention is particularly suitable in the embodiment with a summing amplifier also for setting complex internal resistance values, since the impedance network located in the feedback branch of the summing amplifier then only has to be designed to be correspondingly inductive or capacitive.

Fig. 1

eine allgemeine Darstellung einer Spannungsquelle mit einstellbarer Quellenspannung und umschaltbarem Innenwiderstand zur Erläuterung der Verhaltensweise an ihren Ausgangsanschlüssen,

Fig. 2

eine Prinzipdarstellung einer Schaltungsanordnung nach der Erfindung mit Verwendung eines Spannungsreglers,

Fig. 3

eine Prinzipdarstellung einer Schaltungsanordnung nach der Erfindung mit Verwendung eines Stromreglers,

Fig. 4

ein Ausführungsbeispiel der Erfindung mit einem Stromregler und

Fig. 5

einen multiplizierenden Digital-Analog-Umsetzer zur Verwendung in der Schaltungsanordnung nach Fig. 4.

The invention is explained in more detail below with reference to the figures. Show it:

Fig. 1

a general representation of a voltage source with adjustable source voltage and switchable internal resistance to explain the behavior at its output connections,

Fig. 2

1 shows a schematic diagram of a circuit arrangement according to the invention using a voltage regulator,

Fig. 3

2 shows a schematic diagram of a circuit arrangement according to the invention using a current regulator,

Fig. 4

an embodiment of the invention with a current regulator and

Fig. 5

a multiplying digital-to-analog converter for use in the circuit arrangement according to FIG. 4.

1 shows a voltage source 10 which supplies an output voltage U _O and an output current I _O at its output terminals 11 and 12. Any load can be connected to the voltage source 10, which is shown in FIG. 1 as a series connection of a further voltage source 13 with a load resistor 14.

The voltage source 10 contains an ideal voltage source 15, which supplies a source voltage U _S and is connected in series with a resistor arrangement 16, the individual resistors of which can each be activated individually with a switching device 17. If, at the ideal voltage source 15, as shown in FIG. 1, the source voltage U _S can be set to different values, then the source voltage U _S and its internal resistance can be specified with different values. This circuitry structure has voltage sources which are suitable for the measurement purposes mentioned at the outset.

As is known, the behavior of the voltage source 10 shown in FIG. 1 at its output connections 11 and 12 can be completely described as a function of the source voltage U _S and its internal resistance R _I by the following two relationships:

${\text{U}}_{\text{O}}{\text{= U}}_{\text{S}}{\text{- R}}_{\text{I.}}{\text{· I}}_{\text{O}}\text{(1)}$

2 and 3 show circuit arrangements according to the invention which have this behavior, but do not require an adjustable ideal voltage source and no individually switchable resistors for this purpose.

2 shows a circuit arrangement with a voltage regulator 20, which outputs an output voltage U _O or an output current I _Q at an output terminal 23 and is controlled by a reference variable S _UO, which is generated by a computing circuit with a subtractor 26 and a multiplier 25 is formed. An input variable S _{U is} fed to the subtractor 26 via an input connection 21, said input quantity being proportional to the source voltage to be specified for the voltage source formed with the overall circuit. An input variable S _R , which is proportional to the internal resistance to be specified, is fed to the multiplier 25 via an input connection 22. At the output of the voltage regulator 20, a current measuring circuit 24 is provided, via which the output current I _{O is} conducted and which outputs a measured variable M _IO proportional to the multiplier 25.

In this way, the product is formed from the input variable S _R , which is proportional to the internal resistance to be specified, and the measured variable M _IO, which is proportional to the output current I _O , and subtracted from the input variable S _U , which is proportional to the source voltage to be specified, in the subtractor 26, because that with the Product formed by multiplier 25 is supplied as an input variable to subtractor 26. This then provides the command variable S _UO , the on the basis of the values to be specified for source voltage and internal resistance, controls the voltage regulator 20 such that it outputs the desired output voltage U _O at the measured current I _O.

The mode of operation of the circuit arrangement shown in FIG. 2 thus satisfies the above-mentioned relationship (1), so that it has the behavior of a voltage source of the type shown in FIG. 1, the respective internal resistance not being arranged in the output circuit but being proportional to it Value is supplied as an input variable S _R , which is the factor of a multiplication process. Likewise, the circuit arrangement does not contain an ideal voltage source, but rather it is supplied with an input variable S _U which is proportional to a source voltage value to be specified.

FIG. 3 shows an embodiment of the invention with a current regulator 30 which outputs the output voltage U _O or the output current I _O via an output connection 33. Its input is fed with a reference variable S _IO , which is supplied by a multiplier 35. At its one input, the latter receives the output signal of a subtractor 36, to which the input variable S _{U is} fed via an input connection 31 and which is proportional to the source voltage to be specified. At its second input, the subtractor 36 receives a measured variable M _UO , which is proportional to the output voltage U _O and is supplied by a voltmeter 34 connected to the output of the current regulator 30. The second input of the multiplier 35 receives an input variable S _R via an input connection 32 which is inversely proportional to the internal resistance to be specified.

The circuit arrangement shown in FIG. 3 works accordingly in such a way that first the difference between the two of the source voltage to be specified and the output voltage U _O proportional values is formed, after which this difference is multiplied by the reciprocal of the internal resistance to be specified to form the reference variable S _IO . The circuit arrangement shown in FIG. 3 thus clearly fulfills the above-mentioned relationship (2) for the output current I _{O of} a voltage source. The exemplary embodiment shown in FIG. 3 thus also works without a special, changeable ideal voltage source and without resistors in the output circuit for setting a predetermined internal resistance.

4 shows a further exemplary embodiment of the invention. This circuit arrangement works according to the principle explained above with reference to FIG. 3. It is supplied with the input variable S _U at input terminals 41 and 45 as a voltage signal and the input variable S _R at an input terminal 42 as a current signal. The reference variable S _IO for a current transformer 40 which outputs the output current I _O or the output voltage U _O and output connections 43 and 44 is generated by a computing circuit 47. A load resistor 50 is connected to the output connections 43 and 44.

In addition to the input variables S _U and S _R , the arithmetic circuit 47 also receives the measured variable M _UO , which is supplied to it by an operational amplifier 51 connected as a voltage follower, which operates as a voltage meter and measures the output voltage U _{O of} the current regulator 40.

In the arithmetic circuit 47, the input variable S _{U is} fed via an input resistor 48 and the measured variable M _UO via an input resistor 49 together with the input variable S _{R to} the inverting input of an operational amplifier 46. whose non-inverting input is connected to ground or to the connections 44 and 45 of the circuit arrangement. The operational amplifier 46 works as a summing amplifier and supplies at its output the command variable S _IO for the current controller 40. The signals supplied to the non-inverting input generate currents I₁, I₂ and I₃ which, together with an input current I₄ of the operational amplifier 46, are explained in more detail below .

The input variable S _U , which is proportional to the source voltage to be specified, has a direction in accordance with FIG. 4 such that it is subjected to a difference when it is routed to the inverting input of the operational amplifier 46 and the associated sign reversal with the measured variable M _UO , so that the Operational amplifier 46 thus amplifies the difference between these two quantities. The degree of amplification of the operational amplifier 46 can be changed so that the amplification of the said difference can thereby be provided with a factor which can be dimensioned in accordance with the input variable S _{R which is} inversely proportional to the internal resistance to be specified. The circuit shown in FIG. 4 is accordingly provided with a feedback branch for the operational amplifier 46, which contains an adjustable impedance network 52, which can be adjusted according to different input variables S _R via an adjustment controller 53.

Da die Ströme I₁ und I₂ durch die an den Widerständen 48 und 49 liegenden Spannungssignale S_U und M_UO erzeugt werden, kann gezeigt werden, daß die Führungsgröße S_IO für den Stromregler 40 folgender Beziehung entspricht:

Dabei sind R₅₂ der Widerstandswert des Impedanznetzwerks 52, R₄₈ und R₄₉ die Werte der Widerstände 48 und 49, S_U die der vorzugebenden Quellenspannung entsprechende Eingangsgröße und M_UO die der Ausgangsspannung U_O proportionale Meßgröße. Durch Vergleich mit der Beziehung (2) ist zu erkennen, daß das Verhältnis R₄₉/R₄₈ ein Proportionalitätsfaktor ist, durch den sich die von der Schaltungsanordnung nach Fig.4 nachgebildete Quellenspannung von dem Eingangswert S_U unterschiedet. Außerdem entspricht der Quotient R₅₂/R₄₉ dem Quotienten 1/R_I und kann durch Verändern des Widerstandswertes R₅₂ entsprechend unterschiedlichen vorzugebenden Innenwiderstandswerten eingestellt werden.The circuit arrangement shown in FIG. 4 thus contains a very simple arithmetic circuit 47 which only contains the operational amplifier 46 and the input resistors 48 and 49. In this arithmetic circuit 47 applies the relationship when applying the node rule for the currents I₁, I₂ and I₃ when the current I₄ is neglected

$\text{I₁ + I₂ + I₃ = 0 (3)}$

Since the currents I 1 and I 2 are generated by the voltage signals S _U and M _UO on the resistors 48 and 49, it can be shown that the reference variable S _IO for the current controller 40 corresponds to the following relationship:

R₅₂ are the resistance value of the impedance network 52, R₄₈ and R₄₉ the values of the resistors 48 and 49, S _U the input variable corresponding to the source voltage to be specified and M _UO the measured variable proportional to the output voltage U _O. By comparison with the relationship (2) it can be seen that the ratio R₄₉ / R₄₈ is a proportionality factor by which the source voltage simulated by the circuit arrangement according to FIG. 4 differs from the input value S _U. In addition, the quotient R₅₂ / R₄₉ corresponds to the quotient 1 / R _I and can be set by changing the resistance value R₅₂ according to different internal resistance values to be specified.

In the following a possibility of generating the input variable S _R inversely proportional to the internal resistance value to be specified or the current I 3 for the circuit arrangement shown in FIG. 4 is explained. 5 shows a resistor network for this purpose, which is constructed in the manner of a multiplying digital-to-analog converter and contains in its longitudinal branch resistance values R, to which parallel branches with a resistance value 2R are connected in each case. In addition, the circuit is completed by a further resistance value 2R, which is connected to ground potential. Switch inputs 54 are controlled between two possible switch positions via control inputs 53. In the first switch position, they connect the respective parallel branch with a resistance value 2R with ground potential, in the second switch position with the input terminal 42 of the circuit arrangement shown in Fig. 4. The longitudinal branch of the resistor network shown in FIG. 5 is connected to the output of the operational amplifier 46 shown in FIG. 4 via an input connection denoted by 55. The resistance network is therefore in the feedback branch of the operational amplifier 46.

Dabei ist n die Breite des digitalen Datenwortes, das den Steuereingängen 53 zugeführt wird, und m der vor 0 bis 2^n-1 einstellbare Wert dieses Datenwortes.The digital-to-analog converter shown in FIG. 5 can be used to convert digital input variables supplied via the control inputs 53 into analog output variables at the connection 42. The current I₃, which is given when the voltage signal S _{IO is applied to} the input terminal 46 as the input variable S _R to the circuit arrangement shown in FIG. 4, has the respective value

Here n is the width of the digital data word which is fed to the control inputs 53 and m is the value of this data word which can be set before 0 to 2 ^n-1 .

Durch Vergleich mit der Beziehung (2) ergibt sich für die dem vorzugebenden Innenwiderstand R_I umgekehrt proportionale Eingangsgröße.

Applying this current value to relationship (3) above then leads to a relationship analogous to relationship (4)

A comparison with the relationship (2) gives the input variable inversely proportional to the internal resistance R _I to be specified.

Due to the ratio R / R in contained in this relationship, when using a resistor network according to FIG. 5, the possible internal resistance range of a circuit arrangement according to FIG. 4 can be determined in a very simple manner.

Claims (7)

1. Circuit arrangement of a voltage source supplying an output current I_O and an output voltage U_O and having prescribable values of the source voltage U_S and of the internal impedance R_I, characterized by a computing circuit (25, 26) for computing and outputting the reference variable (S_UO) to a voltage regulator (20) outputting the output voltage U_O of the voltage source, the reference variable being computed from a measured variable (M_IO), specifying the output current I_O, as a first input variable and further input variables (S_U; S_R) specifying the prescribable values of the source voltage U_S and of the internal impedance R_I.
2. Circuit arrangement of a voltage source supplying an output current I_O and an output voltage U_O and having prescribable values of the source voltage U_S and of the internal impedance R_I, characterized by a computing circuit (35, 36; 47) for computing and outputting a reference variable (S_IO) to a current regulator (30, 40) outputting the output current I_O of the voltage source, the reference variable being computed from a measured variable (M_UO), specifying the output voltage U_O, as a first input variable and further input variables (S_U; S_R) specifying the prescribable values of the source voltage U_S and of the internal impedance R_I.
3. Circuit arrangement according to Claim 1, characterised in that the computing circuit contains a subtracter (26; 36) and a multiplier (25; 35) in series connection, to which one of the two input variables (S_U, S_R) is respectively led.
4. Circuit arrangement according to Claim 2, characterised in that the computing circuit (47) contains an inverting summing amplifier (46).
5. Circuit arrangement according to Claim 4, characterized in that the summing amplifier (46) has a feedback branch (52) adjustable in accordance with different values of the internal impedance that are to be specified.
6. Circuit arrangement according to Claim 5, characterised in that a multiplying digital/analogue converter (Figure 5) is arranged in the feedback branch (52).
7. Circuit arrangement according to one of Claims 2 to 6, characterised in that the measured variable (M_UO) corresponding to the output voltage (U_O) is generated by a voltage tracking circuit (51).

Images