DE69836654D1 - Halbleiterstruktur mit abruptem Dotierungsprofil - Google Patents
Halbleiterstruktur mit abruptem DotierungsprofilInfo
- Publication number
- DE69836654D1 DE69836654D1 DE69836654T DE69836654T DE69836654D1 DE 69836654 D1 DE69836654 D1 DE 69836654D1 DE 69836654 T DE69836654 T DE 69836654T DE 69836654 T DE69836654 T DE 69836654T DE 69836654 D1 DE69836654 D1 DE 69836654D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor structure
- doping profile
- abrupt doping
- abrupt
- profile
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
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- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H01L21/02573—Conductivity type
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- H01L29/1025—Channel region of field-effect devices
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- H01L29/41783—Raised source or drain electrodes self aligned with the gate
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66628—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US885611 | 1997-06-30 | ||
US08/885,611 US6723621B1 (en) | 1997-06-30 | 1997-06-30 | Abrupt delta-like doping in Si and SiGe films by UHV-CVD |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69836654D1 true DE69836654D1 (de) | 2007-02-01 |
DE69836654T2 DE69836654T2 (de) | 2007-09-27 |
Family
ID=25387309
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69836654T Expired - Lifetime DE69836654T2 (de) | 1997-06-30 | 1998-06-26 | Halbleiterstruktur mit abruptem Dotierungsprofil |
Country Status (6)
Country | Link |
---|---|
US (3) | US6723621B1 (de) |
EP (1) | EP0889502B1 (de) |
JP (1) | JP3083802B2 (de) |
KR (1) | KR100275397B1 (de) |
DE (1) | DE69836654T2 (de) |
TW (1) | TW376570B (de) |
Families Citing this family (107)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7145167B1 (en) * | 2000-03-11 | 2006-12-05 | International Business Machines Corporation | High speed Ge channel heterostructures for field effect devices |
KR100332106B1 (ko) * | 1999-06-29 | 2002-04-10 | 박종섭 | 반도체 소자의 트랜지스터 제조 방법 |
AU2001245388A1 (en) * | 2000-03-07 | 2001-09-17 | Asm America, Inc. | Graded thin films |
DE10025264A1 (de) * | 2000-05-22 | 2001-11-29 | Max Planck Gesellschaft | Feldeffekt-Transistor auf der Basis von eingebetteten Clusterstrukturen und Verfahren zu seiner Herstellung |
US6969875B2 (en) * | 2000-05-26 | 2005-11-29 | Amberwave Systems Corporation | Buried channel strained silicon FET using a supply layer created through ion implantation |
DE10034942B4 (de) | 2000-07-12 | 2004-08-05 | Infineon Technologies Ag | Verfahren zur Erzeugung eines Halbleitersubstrats mit vergrabener Dotierung |
US6495402B1 (en) * | 2001-02-06 | 2002-12-17 | Advanced Micro Devices, Inc. | Semiconductor-on-insulator (SOI) device having source/drain silicon-germanium regions and method of manufacture |
JP2002237590A (ja) * | 2001-02-09 | 2002-08-23 | Univ Tohoku | Mos型電界効果トランジスタ |
US6830976B2 (en) | 2001-03-02 | 2004-12-14 | Amberwave Systems Corproation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6703688B1 (en) * | 2001-03-02 | 2004-03-09 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US7138650B2 (en) * | 2001-08-06 | 2006-11-21 | Sumitomo Mitsubishi Silicon Corporation | Semiconductor substrate, field-effect transistor, and their manufacturing method of the same |
AU2002349881A1 (en) | 2001-09-21 | 2003-04-01 | Amberwave Systems Corporation | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same |
WO2003028106A2 (en) | 2001-09-24 | 2003-04-03 | Amberwave Systems Corporation | Rf circuits including transistors having strained material layers |
US20030153157A1 (en) * | 2001-10-18 | 2003-08-14 | Foad Majeed A. | Low energy ion implantation into SiGe |
JP3873012B2 (ja) * | 2002-07-29 | 2007-01-24 | 株式会社東芝 | 半導体装置の製造方法 |
WO2005000735A2 (en) * | 2002-11-19 | 2005-01-06 | William Marsh Rice University | Method for creating a functional interface between a nanoparticle, nanotube or nanowire, and a biological molecule or system |
JP4306266B2 (ja) * | 2003-02-04 | 2009-07-29 | 株式会社Sumco | 半導体基板の製造方法 |
US6809016B1 (en) * | 2003-03-06 | 2004-10-26 | Advanced Micro Devices, Inc. | Diffusion stop implants to suppress as punch-through in SiGe |
US7598513B2 (en) * | 2003-06-13 | 2009-10-06 | Arizona Board Of Regents, Acting For And On Behalf Of Arizona State University, A Corporate Body Organized Under Arizona Law | SixSnyGe1-x-y and related alloy heterostructures based on Si, Ge and Sn |
WO2005015609A2 (en) * | 2003-06-13 | 2005-02-17 | Arizona Board Of Regents, Acting For And On Behalf Of Arizona State University | Sixsnyge1-x-y and related alloy heterostructures based on si, ge and sn |
US7589003B2 (en) * | 2003-06-13 | 2009-09-15 | Arizona Board Of Regents, Acting For And On Behalf Of Arizona State University, A Corporate Body Organized Under Arizona Law | GeSn alloys and ordered phases with direct tunable bandgaps grown directly on silicon |
US20050054164A1 (en) * | 2003-09-09 | 2005-03-10 | Advanced Micro Devices, Inc. | Strained silicon MOSFETs having reduced diffusion of n-type dopants |
US7202145B2 (en) * | 2004-06-03 | 2007-04-10 | Taiwan Semiconductor Manufacturing Company | Strained Si formed by anneal |
US7320931B2 (en) * | 2004-07-30 | 2008-01-22 | Freescale Semiconductor Inc. | Interfacial layer for use with high k dielectric materials |
US7923339B2 (en) | 2004-12-06 | 2011-04-12 | Nxp B.V. | Method of producing an epitaxial layer on semiconductor substrate and device produced with such a method |
KR101131418B1 (ko) * | 2004-12-07 | 2012-04-03 | 주성엔지니어링(주) | 반도체 소자 및 이의 제조 방법 |
KR100613355B1 (ko) * | 2004-12-30 | 2006-08-21 | 동부일렉트로닉스 주식회사 | 모스 전계 효과 트랜지스터 및 그 제조 방법 |
DE102005041225B3 (de) * | 2005-08-31 | 2007-04-26 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung vertiefter verformter Drain/Source-Gebiete in NMOS- und PMOS-Transistoren |
US7892915B1 (en) * | 2006-03-02 | 2011-02-22 | National Semiconductor Corporation | High performance SiGe:C HBT with phosphorous atomic layer doping |
US7485538B1 (en) * | 2006-03-27 | 2009-02-03 | National Semiconductor Corporation | High performance SiGe HBT with arsenic atomic layer doping |
KR100793607B1 (ko) * | 2006-06-27 | 2008-01-10 | 매그나칩 반도체 유한회사 | 에피텍셜 실리콘 웨이퍼 및 그 제조방법 |
US7504301B2 (en) * | 2006-09-28 | 2009-03-17 | Advanced Micro Devices, Inc. | Stressed field effect transistor and methods for its fabrication |
US20080086069A1 (en) * | 2006-10-10 | 2008-04-10 | Robert Busuttil | Wrist support brace |
US20090062707A1 (en) * | 2007-09-04 | 2009-03-05 | Robert Busuttil | Wrist support brace |
EP2267782A3 (de) * | 2009-06-24 | 2013-03-13 | Imec | Steuerung des Tunnelübergangs in einem Tunnel-Feldeffekt-Heterotransistor |
CN101673673B (zh) * | 2009-09-22 | 2013-02-27 | 上海宏力半导体制造有限公司 | 外延片形成方法及使用该方法形成的外延片 |
US20110079861A1 (en) * | 2009-09-30 | 2011-04-07 | Lucian Shifren | Advanced Transistors with Threshold Voltage Set Dopant Structures |
US8421162B2 (en) | 2009-09-30 | 2013-04-16 | Suvolta, Inc. | Advanced transistors with punch through suppression |
US8273617B2 (en) | 2009-09-30 | 2012-09-25 | Suvolta, Inc. | Electronic devices and systems, and methods for making and using the same |
US8283653B2 (en) | 2009-12-23 | 2012-10-09 | Intel Corporation | Non-planar germanium quantum well devices |
CN101777498A (zh) * | 2010-01-12 | 2010-07-14 | 上海宏力半导体制造有限公司 | 带浅表外延层的外延片形成方法及其外延片 |
US8530286B2 (en) | 2010-04-12 | 2013-09-10 | Suvolta, Inc. | Low power semiconductor transistor structure and method of fabrication thereof |
US8569128B2 (en) | 2010-06-21 | 2013-10-29 | Suvolta, Inc. | Semiconductor structure and method of fabrication thereof with mixed metal types |
US8759872B2 (en) | 2010-06-22 | 2014-06-24 | Suvolta, Inc. | Transistor with threshold voltage set notch and method of fabrication thereof |
JP5269010B2 (ja) * | 2010-08-17 | 2013-08-21 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US8377783B2 (en) | 2010-09-30 | 2013-02-19 | Suvolta, Inc. | Method for reducing punch-through in a transistor device |
CN102468303B (zh) * | 2010-11-10 | 2015-05-13 | 中国科学院微电子研究所 | 半导体存储单元、器件及其制备方法 |
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- 1998-06-16 JP JP10168309A patent/JP3083802B2/ja not_active Expired - Lifetime
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KR100275397B1 (ko) | 2000-12-15 |
JPH1167666A (ja) | 1999-03-09 |
US20060194422A1 (en) | 2006-08-31 |
EP0889502A2 (de) | 1999-01-07 |
US6723621B1 (en) | 2004-04-20 |
KR19990006451A (ko) | 1999-01-25 |
EP0889502A3 (de) | 2000-06-28 |
TW376570B (en) | 1999-12-11 |
DE69836654T2 (de) | 2007-09-27 |
JP3083802B2 (ja) | 2000-09-04 |
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