DE69818227D1 - Antisicherung gegrundet auf einem silicid-polysilicium-bipolartransistor - Google Patents

Antisicherung gegrundet auf einem silicid-polysilicium-bipolartransistor

Info

Publication number
DE69818227D1
DE69818227D1 DE69818227T DE69818227T DE69818227D1 DE 69818227 D1 DE69818227 D1 DE 69818227D1 DE 69818227 T DE69818227 T DE 69818227T DE 69818227 T DE69818227 T DE 69818227T DE 69818227 D1 DE69818227 D1 DE 69818227D1
Authority
DE
Germany
Prior art keywords
antifuse
bipolar transistor
resulting
polysilicium
silicide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69818227T
Other languages
English (en)
Other versions
DE69818227T2 (de
Inventor
V Cervin-Lawry
D Kendall
T Appelman
Efim Roubakha
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gennum Corp
Original Assignee
Gennum Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gennum Corp filed Critical Gennum Corp
Priority claimed from PCT/CA1998/000114 external-priority patent/WO1998036453A1/en
Publication of DE69818227D1 publication Critical patent/DE69818227D1/de
Application granted granted Critical
Publication of DE69818227T2 publication Critical patent/DE69818227T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/102Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
    • H01L27/1022Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Bipolar Transistors (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
DE69818227T 1997-02-14 1998-02-13 Antisicherung gegrundet auf einem silicid-polysilicium-bipolartransistor Expired - Fee Related DE69818227T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
CA002197627A CA2197627C (en) 1997-02-14 1997-02-14 Antifuse based on silicided single polysilicon bipolar transistor
CA2197627 1997-02-14
PCT/CA1998/000114 WO1998036453A1 (en) 1997-02-14 1998-02-13 Antifuse based on silicided polysilicon bipolar transistor

Publications (2)

Publication Number Publication Date
DE69818227D1 true DE69818227D1 (de) 2003-10-23
DE69818227T2 DE69818227T2 (de) 2004-04-08

Family

ID=4159940

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69818227T Expired - Fee Related DE69818227T2 (de) 1997-02-14 1998-02-13 Antisicherung gegrundet auf einem silicid-polysilicium-bipolartransistor

Country Status (6)

Country Link
EP (1) EP0960439B1 (de)
JP (1) JP2001511949A (de)
AT (1) ATE250281T1 (de)
AU (1) AU5979098A (de)
CA (1) CA2197627C (de)
DE (1) DE69818227T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7679426B2 (en) 2005-01-19 2010-03-16 Hewlett-Packard Development Company, L.P. Transistor antifuse device
JP5109235B2 (ja) * 2005-04-27 2012-12-26 株式会社日立製作所 半導体装置

Also Published As

Publication number Publication date
AU5979098A (en) 1998-09-08
JP2001511949A (ja) 2001-08-14
CA2197627C (en) 2006-01-03
EP0960439A1 (de) 1999-12-01
ATE250281T1 (de) 2003-10-15
EP0960439B1 (de) 2003-09-17
CA2197627A1 (en) 1998-08-14
DE69818227T2 (de) 2004-04-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee