DE69524312D1 - Verfahren zur herstellung eines vergossenen leiterrahmens - Google Patents

Verfahren zur herstellung eines vergossenen leiterrahmens

Info

Publication number
DE69524312D1
DE69524312D1 DE69524312T DE69524312T DE69524312D1 DE 69524312 D1 DE69524312 D1 DE 69524312D1 DE 69524312 T DE69524312 T DE 69524312T DE 69524312 T DE69524312 T DE 69524312T DE 69524312 D1 DE69524312 D1 DE 69524312D1
Authority
DE
Germany
Prior art keywords
producing
lead frame
pushed
pushed lead
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69524312T
Other languages
English (en)
Other versions
DE69524312T2 (de
Inventor
A Pruitt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of DE69524312D1 publication Critical patent/DE69524312D1/de
Application granted granted Critical
Publication of DE69524312T2 publication Critical patent/DE69524312T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
DE69524312T 1994-03-09 1995-01-20 Verfahren zur herstellung eines vergossenen leiterrahmens Expired - Fee Related DE69524312T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US20944694A 1994-03-09 1994-03-09
PCT/US1995/000797 WO1995024732A1 (en) 1994-03-09 1995-01-20 A molded lead frame and method of making same

Publications (2)

Publication Number Publication Date
DE69524312D1 true DE69524312D1 (de) 2002-01-17
DE69524312T2 DE69524312T2 (de) 2002-08-14

Family

ID=22778782

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69524312T Expired - Fee Related DE69524312T2 (de) 1994-03-09 1995-01-20 Verfahren zur herstellung eines vergossenen leiterrahmens

Country Status (5)

Country Link
US (1) US5518684A (de)
EP (1) EP0698292B1 (de)
KR (1) KR960702678A (de)
DE (1) DE69524312T2 (de)
WO (1) WO1995024732A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2210063A1 (en) * 1997-07-08 1999-01-08 Ibm Canada Limited-Ibm Canada Limitee Method of manufacturing wire segments of homogeneous composition
JP2000188366A (ja) * 1998-12-24 2000-07-04 Hitachi Ltd 半導体装置
KR100723211B1 (ko) * 2004-08-09 2007-05-29 옵티멈 케어 인터내셔널 테크 인코포레이티드 집적회로 칩 패키징 방법
TWI381507B (zh) * 2009-09-18 2013-01-01 I Chiun Precision Ind Co Ltd Manufacturing method of lead frame
KR101886715B1 (ko) * 2011-09-22 2018-08-08 엘지이노텍 주식회사 발광소자 패키지
US8829692B2 (en) 2012-09-04 2014-09-09 Rolls-Royce Corporation Multilayer packaged semiconductor device and method of packaging
JP6891904B2 (ja) * 2017-02-06 2021-06-18 富士電機株式会社 半導体モジュール、電気自動車およびパワーコントロールユニット

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5219971A (en) * 1975-08-08 1977-02-15 Kosei Hirohata Shaping of leads sealed in lsi chip etc.
JPS5339067A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Production of semiconductor device
JPS5382168A (en) * 1976-12-27 1978-07-20 Nec Corp Lead frame for semiconductor device
JPS5947461B2 (ja) * 1976-12-27 1984-11-19 株式会社日立製作所 リ−ドフレ−ム
JPS56122154A (en) * 1980-02-28 1981-09-25 Mitsubishi Electric Corp Semiconductor device
JPS5831565A (ja) * 1981-08-18 1983-02-24 Nippon Denso Co Ltd リ−ドフレ−ム
JPS5856449A (ja) * 1981-09-30 1983-04-04 Nec Corp 半導体装置
JPS5856359A (ja) * 1981-09-30 1983-04-04 Toshiba Corp 半導体装置
EP0086724A3 (de) * 1982-02-16 1985-04-24 FAIRCHILD CAMERA & INSTRUMENT CORPORATION Leiterrahmen für integrierte Schaltungen mit verbesserter Wärmeabfuhr
JPS59169161A (ja) * 1983-03-16 1984-09-25 Hitachi Ltd 半導体装置
JPH0773122B2 (ja) * 1983-12-27 1995-08-02 株式会社東芝 封止型半導体装置
JPS6153752A (ja) * 1984-08-24 1986-03-17 Hitachi Ltd リ−ドフレ−ム
JPH073848B2 (ja) * 1984-09-28 1995-01-18 株式会社日立製作所 半導体装置
JPS61149449A (ja) * 1984-12-24 1986-07-08 Sumitomo Electric Ind Ltd 半導体装置用リ−ドフレ−ム複合材料およびその製造方法
JPS61216454A (ja) * 1985-03-22 1986-09-26 Toshiba Corp 樹脂封止型半導体装置
JPS6364351A (ja) * 1986-09-04 1988-03-22 Toshiba Corp リ−ドフレ−ム
US5250130A (en) * 1988-01-27 1993-10-05 W. R. Grace & Co.-Conn. Replica hot pressing technique
JPH0220047A (ja) * 1988-07-07 1990-01-23 Nec Corp 樹脂封止型半導体装置
JPH046860A (ja) * 1990-04-24 1992-01-10 Mitsubishi Electric Corp 半導体装置
JPH06196603A (ja) * 1992-12-23 1994-07-15 Shinko Electric Ind Co Ltd リードフレームの製造方法
US5310520A (en) * 1993-01-29 1994-05-10 Texas Instruments Incorporated Circuit system, a composite material for use therein, and a method of making the material

Also Published As

Publication number Publication date
EP0698292B1 (de) 2001-12-05
DE69524312T2 (de) 2002-08-14
US5518684A (en) 1996-05-21
EP0698292A1 (de) 1996-02-28
WO1995024732A1 (en) 1995-09-14
KR960702678A (ko) 1996-04-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee