DE69522397D1 - Kontaktstruktur mit metallischer Sperrschicht und Herstellungsverfahren - Google Patents

Kontaktstruktur mit metallischer Sperrschicht und Herstellungsverfahren

Info

Publication number
DE69522397D1
DE69522397D1 DE69522397T DE69522397T DE69522397D1 DE 69522397 D1 DE69522397 D1 DE 69522397D1 DE 69522397 T DE69522397 T DE 69522397T DE 69522397 T DE69522397 T DE 69522397T DE 69522397 D1 DE69522397 D1 DE 69522397D1
Authority
DE
Germany
Prior art keywords
manufacturing process
barrier layer
contact structure
metallic barrier
metallic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69522397T
Other languages
English (en)
Other versions
DE69522397T2 (de
Inventor
Ryoichi Matsumoto
Yoshiyuki Kawazu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Application granted granted Critical
Publication of DE69522397D1 publication Critical patent/DE69522397D1/de
Publication of DE69522397T2 publication Critical patent/DE69522397T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/915—Active solid-state devices, e.g. transistors, solid-state diodes with titanium nitride portion or region
DE69522397T 1994-08-18 1995-06-23 Kontaktstruktur mit metallischer Sperrschicht und Herstellungsverfahren Expired - Fee Related DE69522397T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19401694A JP3280803B2 (ja) 1994-08-18 1994-08-18 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE69522397D1 true DE69522397D1 (de) 2001-10-04
DE69522397T2 DE69522397T2 (de) 2002-05-23

Family

ID=16317550

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69522397T Expired - Fee Related DE69522397T2 (de) 1994-08-18 1995-06-23 Kontaktstruktur mit metallischer Sperrschicht und Herstellungsverfahren

Country Status (5)

Country Link
US (2) US5654235A (de)
EP (1) EP0697729B1 (de)
JP (1) JP3280803B2 (de)
KR (1) KR100269439B1 (de)
DE (1) DE69522397T2 (de)

Families Citing this family (58)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5776831A (en) * 1995-12-27 1998-07-07 Lsi Logic Corporation Method of forming a high electromigration resistant metallization system
US6225222B1 (en) * 1995-12-29 2001-05-01 United Microelectronics Corporation Diffusion barrier enhancement for sub-micron aluminum-silicon contacts
KR100225946B1 (ko) * 1996-06-27 1999-10-15 김영환 반도체 소자의 금속 배선 형성방법
US6266110B1 (en) * 1996-07-30 2001-07-24 Kawasaki Steel Corporation Semiconductor device reeventing light from entering its substrate transistor and the same for driving reflection type liquid crystal
KR100198634B1 (ko) * 1996-09-07 1999-06-15 구본준 반도체 소자의 배선구조 및 제조방법
JPH10125627A (ja) * 1996-10-24 1998-05-15 Fujitsu Ltd 半導体装置の製造方法および高融点金属ナイトライド膜の形成方法
KR100241506B1 (ko) * 1997-06-23 2000-03-02 김영환 반도체 소자의 금속 배선 형성 방법
FR2765398B1 (fr) * 1997-06-25 1999-07-30 Commissariat Energie Atomique Structure a composant microelectronique en materiau semi-conducteur difficile a graver et a trous metallises
KR100268803B1 (ko) * 1997-06-30 2000-10-16 김영환 반도체 소자의 도전층 제조방법
US5895267A (en) * 1997-07-09 1999-04-20 Lsi Logic Corporation Method to obtain a low resistivity and conformity chemical vapor deposition titanium film
US6054768A (en) * 1997-10-02 2000-04-25 Micron Technology, Inc. Metal fill by treatment of mobility layers
KR19990030794A (ko) * 1997-10-06 1999-05-06 윤종용 반도체장치의 제조방법 및 이에 따라 제조되는 반도체장치
JP3248570B2 (ja) * 1997-10-09 2002-01-21 日本電気株式会社 半導体装置の製造方法
KR100457409B1 (ko) * 1997-12-30 2005-02-23 주식회사 하이닉스반도체 반도체소자의금속배선형성방법
KR100290467B1 (ko) * 1997-12-31 2001-08-07 박종섭 반도체소자의확산방지막형성방법
US6215186B1 (en) * 1998-01-12 2001-04-10 Texas Instruments Incorporated System and method of forming a tungstein plug
US6136690A (en) 1998-02-13 2000-10-24 Micron Technology, Inc. In situ plasma pre-deposition wafer treatment in chemical vapor deposition technology for semiconductor integrated circuit applications
KR20000007410A (ko) * 1998-07-03 2000-02-07 김영환 반도체 소자의 금속배선 형성방법
KR100331545B1 (ko) 1998-07-22 2002-04-06 윤종용 다단계 화학 기상 증착 방법에 의한 다층 질화티타늄막 형성방법및 이를 이용한 반도체 소자의 제조방법
US6100185A (en) * 1998-08-14 2000-08-08 Micron Technology, Inc. Semiconductor processing method of forming a high purity <200> grain orientation tin layer and semiconductor processing method of forming a conductive interconnect line
US6117793A (en) * 1998-09-03 2000-09-12 Micron Technology, Inc. Using silicide cap as an etch stop for multilayer metal process and structures so formed
US6187673B1 (en) * 1998-09-03 2001-02-13 Micron Technology, Inc. Small grain size, conformal aluminum interconnects and method for their formation
US6093642A (en) * 1998-09-23 2000-07-25 Texas Instruments Incorporated Tungsten-nitride for contact barrier application
US5998873A (en) * 1998-12-16 1999-12-07 National Semiconductor Corporation Low contact resistance and low junction leakage metal interconnect contact structure
KR100607305B1 (ko) * 1998-12-28 2006-10-24 주식회사 하이닉스반도체 반도체 소자의 금속 배선 형성 방법
US6177338B1 (en) * 1999-02-08 2001-01-23 Taiwan Semiconductor Manufacturing Company Two step barrier process
US6365507B1 (en) 1999-03-01 2002-04-02 Micron Technology, Inc. Method of forming integrated circuitry
US6524951B2 (en) * 1999-03-01 2003-02-25 Micron Technology, Inc. Method of forming a silicide interconnect over a silicon comprising substrate and method of forming a stack of refractory metal nitride over refractory metal silicide over silicon
KR100326253B1 (ko) * 1999-12-28 2002-03-08 박종섭 반도체 소자의 캐패시터 형성방법
US6688584B2 (en) * 2001-05-16 2004-02-10 Micron Technology, Inc. Compound structure for reduced contact resistance
US6670267B2 (en) * 2001-06-13 2003-12-30 Mosel Vitelic Inc. Formation of tungstein-based interconnect using thin physically vapor deposited titanium nitride layer
US6503824B1 (en) 2001-10-12 2003-01-07 Mosel Vitelic, Inc. Forming conductive layers on insulators by physical vapor deposition
US6780086B2 (en) 2001-10-12 2004-08-24 Mosel Vitelic, Inc. Determining an endpoint in a polishing process
US7169704B2 (en) * 2002-06-21 2007-01-30 Samsung Electronics Co., Ltd. Method of cleaning a surface of a water in connection with forming a barrier layer of a semiconductor device
US7311946B2 (en) * 2003-05-02 2007-12-25 Air Products And Chemicals, Inc. Methods for depositing metal films on diffusion barrier layers by CVD or ALD processes
US7114403B2 (en) * 2003-05-30 2006-10-03 Oakville Hong Kong Co., Ltd Fluid collection and application device and methods of use of same
US20050106753A1 (en) * 2003-07-11 2005-05-19 Oakville Trading Hong Kong Limited Sanitary fluid collection, application and storage device and methods of use of same
WO2005050167A2 (en) * 2003-11-14 2005-06-02 Oakville Hong Kong Co., Limited Rapid sample collection and analysis device
KR100519642B1 (ko) * 2003-12-31 2005-10-07 동부아남반도체 주식회사 반도체 소자 형성 방법
US20050221612A1 (en) * 2004-04-05 2005-10-06 International Business Machines Corporation A low thermal budget (mol) liner, a semiconductor device comprising said liner and method of forming said semiconductor device
KR100621630B1 (ko) * 2004-08-25 2006-09-19 삼성전자주식회사 이종 금속을 이용하는 다마신 공정
US8871155B2 (en) * 2005-11-30 2014-10-28 Alere Switzerland Gmbh Devices for detecting analytes in fluid sample
JP2008016538A (ja) * 2006-07-04 2008-01-24 Renesas Technology Corp Ｍｏｓ構造を有する半導体装置及びその製造方法
US7684227B2 (en) 2007-05-31 2010-03-23 Micron Technology, Inc. Resistive memory architectures with multiple memory cells per access device
US20090130466A1 (en) * 2007-11-16 2009-05-21 Air Products And Chemicals, Inc. Deposition Of Metal Films On Diffusion Layers By Atomic Layer Deposition And Organometallic Precursor Complexes Therefor
JP2011146507A (ja) * 2010-01-14 2011-07-28 Renesas Electronics Corp 半導体装置および半導体装置の製造方法
US8530875B1 (en) 2010-05-06 2013-09-10 Micron Technology, Inc. Phase change memory including ovonic threshold switch with layered electrode and methods for forming same
JP2013021012A (ja) 2011-07-07 2013-01-31 Renesas Electronics Corp 半導体装置の製造方法
US9166158B2 (en) 2013-02-25 2015-10-20 Micron Technology, Inc. Apparatuses including electrodes having a conductive barrier material and methods of forming same
US9263281B2 (en) * 2013-08-30 2016-02-16 Vanguard International Semiconductor Corporation Contact plug and method for manufacturing the same
JP6690333B2 (ja) * 2016-03-16 2020-04-28 富士電機株式会社 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
CN106684034B (zh) * 2016-08-22 2019-08-20 上海华力微电子有限公司 一种在接触孔中制备薄膜的方法
US20180331118A1 (en) 2017-05-12 2018-11-15 Sandisk Technologies Llc Multi-layer barrier for cmos under array type memory device and method of making thereof
US10453747B2 (en) * 2017-08-28 2019-10-22 Globalfoundries Inc. Double barrier layer sets for contacts in semiconductor device
CN111029358A (zh) * 2019-12-26 2020-04-17 华虹半导体(无锡)有限公司 Cmos图像传感器及其制造方法
US20210327881A1 (en) * 2020-04-17 2021-10-21 Micron Technology, Inc. Methods of Utilizing Etch-Stop Material During Fabrication of Capacitors, Integrated Assemblies Comprising Capacitors
KR20220055526A (ko) * 2020-10-26 2022-05-04 삼성디스플레이 주식회사 반도체 구조물을 포함하는 적층 구조물 및 이의 제조 방법
US11688601B2 (en) * 2020-11-30 2023-06-27 International Business Machines Corporation Obtaining a clean nitride surface by annealing

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63160328A (ja) * 1986-12-24 1988-07-04 Mitsubishi Electric Corp 半導体装置の製造方法
US4937657A (en) * 1987-08-27 1990-06-26 Signetics Corporation Self-aligned metallization for semiconductor device and process using selectively deposited tungsten
JPH02119129A (ja) * 1988-10-28 1990-05-07 Seiko Epson Corp 半導体装置の製造方法
US5231055A (en) * 1989-01-13 1993-07-27 Texas Instruments Incorporated Method of forming composite interconnect system
JPH02235372A (ja) * 1989-03-08 1990-09-18 Mitsubishi Electric Corp 半導体装置とその製造方法
JP2537413B2 (ja) * 1989-03-14 1996-09-25 三菱電機株式会社 半導体装置およびその製造方法
US5162262A (en) * 1989-03-14 1992-11-10 Mitsubishi Denki Kabushiki Kaisha Multi-layered interconnection structure for a semiconductor device and manufactured method thereof
US5000818A (en) * 1989-08-14 1991-03-19 Fairchild Semiconductor Corporation Method of fabricating a high performance interconnect system for an integrated circuit
JP3109091B2 (ja) * 1990-08-31 2000-11-13 日本電気株式会社 半導体装置の製造方法
DE69102851T2 (de) * 1990-10-09 1995-02-16 Nec Corp Verfahren zur Herstellung eines Ti/TiN/Al Kontaktes unter Benutzung eines reaktiven Zerstäubungsprozesses.
JP2737470B2 (ja) * 1990-10-09 1998-04-08 日本電気株式会社 半導体装置の製造方法
JPH05160070A (ja) * 1991-05-31 1993-06-25 Texas Instr Inc <Ti> 半導体装置の接点とその製法
US5242860A (en) * 1991-07-24 1993-09-07 Applied Materials, Inc. Method for the formation of tin barrier layer with preferential (111) crystallographic orientation
JPH0536843A (ja) * 1991-07-30 1993-02-12 Nec Corp 半導体装置
JPH06151815A (ja) * 1992-11-13 1994-05-31 Ricoh Co Ltd 半導体装置とその製造方法
JPH06204170A (ja) * 1993-01-07 1994-07-22 Seiko Epson Corp 半導体装置およびその製造方法
US5455197A (en) * 1993-07-16 1995-10-03 Materials Research Corporation Control of the crystal orientation dependent properties of a film deposited on a semiconductor wafer
US5514908A (en) * 1994-04-29 1996-05-07 Sgs-Thomson Microelectronics, Inc. Integrated circuit with a titanium nitride contact barrier having oxygen stuffed grain boundaries

Also Published As

Publication number Publication date
KR960009110A (ko) 1996-03-22
EP0697729B1 (de) 2001-08-29
DE69522397T2 (de) 2002-05-23
US5920122A (en) 1999-07-06
EP0697729A2 (de) 1996-02-21
JPH0864555A (ja) 1996-03-08
US5654235A (en) 1997-08-05
KR100269439B1 (ko) 2000-10-16
EP0697729A3 (de) 1996-11-13
JP3280803B2 (ja) 2002-05-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee