DE69428418T2 - Halbleiterspeichergerät mit einem Ersatzspeicherzellfeld - Google Patents

Halbleiterspeichergerät mit einem Ersatzspeicherzellfeld

Info

Publication number
DE69428418T2
DE69428418T2 DE69428418T DE69428418T DE69428418T2 DE 69428418 T2 DE69428418 T2 DE 69428418T2 DE 69428418 T DE69428418 T DE 69428418T DE 69428418 T DE69428418 T DE 69428418T DE 69428418 T2 DE69428418 T2 DE 69428418T2
Authority
DE
Germany
Prior art keywords
cell array
memory cell
memory device
semiconductor memory
spare
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69428418T
Other languages
English (en)
Other versions
DE69428418D1 (de
Inventor
Toshio Sasaki
Toshihiro Tanaka
Atsushi Nozoe
Hitoshi Kume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE69428418D1 publication Critical patent/DE69428418D1/de
Application granted granted Critical
Publication of DE69428418T2 publication Critical patent/DE69428418T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/804—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout to prevent clustered faults
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/806—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout by reducing size of decoders
DE69428418T 1993-12-22 1994-12-02 Halbleiterspeichergerät mit einem Ersatzspeicherzellfeld Expired - Fee Related DE69428418T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32482693A JP3351595B2 (ja) 1993-12-22 1993-12-22 半導体メモリ装置

Publications (2)

Publication Number Publication Date
DE69428418D1 DE69428418D1 (de) 2001-10-31
DE69428418T2 true DE69428418T2 (de) 2002-06-06

Family

ID=18170116

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69428418T Expired - Fee Related DE69428418T2 (de) 1993-12-22 1994-12-02 Halbleiterspeichergerät mit einem Ersatzspeicherzellfeld

Country Status (7)

Country Link
US (1) US5581508A (de)
EP (1) EP0660237B1 (de)
JP (1) JP3351595B2 (de)
KR (1) KR100315265B1 (de)
CN (1) CN1045133C (de)
DE (1) DE69428418T2 (de)
TW (1) TW272290B (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5805512A (en) * 1995-02-09 1998-09-08 Kabushiki Kaisha Toshiba Semiconductor memory device
WO1996041264A1 (en) * 1995-06-07 1996-12-19 International Business Machines Corporation Static wordline redundancy memory device
JP3102302B2 (ja) * 1995-06-07 2000-10-23 日本電気株式会社 半導体記憶装置
JPH0955482A (ja) 1995-06-08 1997-02-25 Mitsubishi Electric Corp 半導体記憶装置
JP3710002B2 (ja) * 1995-08-23 2005-10-26 株式会社日立製作所 半導体記憶装置
US5848006A (en) * 1995-12-06 1998-12-08 Nec Corporation Redundant semiconductor memory device using a single now address decoder for driving both sub-wordlines and redundant sub-wordlines
US6191999B1 (en) * 1997-06-20 2001-02-20 Fujitsu Limited Semiconductor memory device with reduced power consumption
US5881003A (en) * 1997-07-16 1999-03-09 International Business Machines Corporation Method of making a memory device fault tolerant using a variable domain redundancy replacement configuration
US5978931A (en) * 1997-07-16 1999-11-02 International Business Machines Corporation Variable domain redundancy replacement configuration for a memory device
US5970000A (en) * 1998-02-02 1999-10-19 International Business Machines Corporation Repairable semiconductor integrated circuit memory by selective assignment of groups of redundancy elements to domains
JP2000100195A (ja) * 1998-09-22 2000-04-07 Nec Corp 冗長回路を有する半導体記憶装置
KR100361862B1 (ko) * 1998-12-30 2003-02-20 주식회사 하이닉스반도체 반도체 메모리장치 및 이의 센싱전류 감소방법
KR100297193B1 (ko) 1999-04-27 2001-10-29 윤종용 리던던트 로우 대체 구조를 가지는 반도체 메모리 장치 및 그것의 로우 구동 방법
KR100364791B1 (ko) * 1999-09-15 2002-12-16 주식회사 하이닉스반도체 로우 리던던시 회로를 구비한 비휘발성 강유전체 메모리 장치 및 그의 페일 어드레스 구제방법
US6249464B1 (en) 1999-12-15 2001-06-19 Cypress Semiconductor Corp. Block redundancy in ultra low power memory circuits
JP3376998B2 (ja) * 2000-03-08 2003-02-17 日本電気株式会社 半導体記憶装置
JP2011040161A (ja) * 2000-03-24 2011-02-24 Renesas Electronics Corp 半導体記憶装置
JP3555859B2 (ja) * 2000-03-27 2004-08-18 広島日本電気株式会社 半導体生産システム及び半導体装置の生産方法
JP4707244B2 (ja) * 2000-03-30 2011-06-22 ルネサスエレクトロニクス株式会社 半導体記憶装置および半導体装置
FR2811464B1 (fr) * 2000-07-05 2005-03-25 St Microelectronics Sa Circuit memoire comportant des cellules de secours
JP5034149B2 (ja) * 2000-10-05 2012-09-26 富士通セミコンダクター株式会社 半導体メモリおよびその制御方法
US6584034B1 (en) * 2001-04-23 2003-06-24 Aplus Flash Technology Inc. Flash memory array structure suitable for multiple simultaneous operations
KR100414207B1 (ko) 2001-09-11 2004-01-13 삼성전자주식회사 반도체 메모리 장치
CN1322514C (zh) * 2002-04-28 2007-06-20 华邦电子股份有限公司 半导体存储器的改进结构
JP2004006479A (ja) * 2002-05-31 2004-01-08 Elpida Memory Inc 半導体記憶装置
US20040224864A1 (en) * 2003-02-26 2004-11-11 Patterson William R. Sterilized embolic compositions
US20050025707A1 (en) * 2003-02-27 2005-02-03 Patterson William R. Fumed silica embolic compositions
US6687157B1 (en) 2003-06-11 2004-02-03 Xilinx, Inc. Circuits and methods for identifying a defective memory cell via first, second and third wordline voltages
CN100349138C (zh) * 2003-08-08 2007-11-14 倚天资讯股份有限公司 非挥发性存储器存取系统及其循环使用存取空间方法
US7054219B1 (en) * 2005-03-31 2006-05-30 Matrix Semiconductor, Inc. Transistor layout configuration for tight-pitched memory array lines
JP4670458B2 (ja) * 2005-04-27 2011-04-13 株式会社日立製作所 半導体装置
US7401270B2 (en) * 2005-10-20 2008-07-15 Infineon Technologies Ag Repair of semiconductor memory device via external command
US8189396B2 (en) 2006-12-14 2012-05-29 Mosaid Technologies Incorporated Word line driver in a hierarchical NOR flash memory
JP2010146665A (ja) * 2008-12-19 2010-07-01 Toshiba Corp 抵抗変化型不揮発性半導体メモリ
US20110041016A1 (en) * 2009-08-12 2011-02-17 Taiwan Semiconductor Manufacturing Company, Ltd. Memory errors and redundancy
US9442799B2 (en) 2014-06-26 2016-09-13 Microsoft Technology Licensing, Llc Extended lifetime memory

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58199496A (ja) * 1982-05-14 1983-11-19 Hitachi Ltd 欠陥救済回路を有する半導体メモリ
JP2629697B2 (ja) * 1987-03-27 1997-07-09 日本電気株式会社 半導体記憶装置
NL8900026A (nl) * 1989-01-06 1990-08-01 Philips Nv Matrixgeheugen, bevattende standaardblokken, standaardsubblokken, een redundant blok, en redundante subblokken, alsmede geintegreerde schakeling bevattende meerdere van zulke matrixgeheugens.
US5255228A (en) * 1989-01-10 1993-10-19 Matsushita Electronics Corporation Semiconductor memory device with redundancy circuits
JP2547633B2 (ja) * 1989-05-09 1996-10-23 三菱電機株式会社 半導体記憶装置
JP2837433B2 (ja) * 1989-06-05 1998-12-16 三菱電機株式会社 半導体記憶装置における不良ビット救済回路
KR920010347B1 (ko) * 1989-12-30 1992-11-27 삼성전자주식회사 분할된 워드라인을 가지는 메모리장치의 리던던시 구조
KR920009059B1 (ko) * 1989-12-29 1992-10-13 삼성전자 주식회사 반도체 메모리 장치의 병렬 테스트 방법
JP2863619B2 (ja) * 1990-10-03 1999-03-03 株式会社東芝 半導体メモリ
JPH05189996A (ja) * 1991-09-05 1993-07-30 Hitachi Ltd 半導体記憶装置
JP3040625B2 (ja) * 1992-02-07 2000-05-15 松下電器産業株式会社 半導体記憶装置

Also Published As

Publication number Publication date
EP0660237A3 (de) 1997-02-19
KR100315265B1 (ko) 2002-02-19
JP3351595B2 (ja) 2002-11-25
JPH07182892A (ja) 1995-07-21
DE69428418D1 (de) 2001-10-31
KR950020756A (ko) 1995-07-24
EP0660237A2 (de) 1995-06-28
EP0660237B1 (de) 2001-09-26
CN1112276A (zh) 1995-11-22
US5581508A (en) 1996-12-03
TW272290B (de) 1996-03-11
CN1045133C (zh) 1999-09-15

Similar Documents

Publication Publication Date Title
DE69428418T2 (de) Halbleiterspeichergerät mit einem Ersatzspeicherzellfeld
DE69024123D1 (de) Halbleiterspeichergerät mit einem Ersatzspeicherzellfeld
DE69328639D1 (de) Halbleiterspeicheranordnung mit Ersatzspeicherzellen
GB2248518B (en) A method for fabricating a non-volatile semiconductor memory device having storage cell array and peripheral circuit,and a structure thereof
US4636986B1 (en) Separately addressable memory arrays in a multiple array semiconductor chip
DE69428652T2 (de) Halbleiterspeicher mit mehreren Banken
DE69021419D1 (de) Halbleiterspeicheranordnung mit einem ferroelektrischen Material.
DE69328342T2 (de) Halbleiterspeicherzelle
AU7475196A (en) Semiconductor non-volatile memory device having a nand cell structure
DE69430683T2 (de) Halbleiterspeicheranordnung
DE69326310D1 (de) Halbleiterspeichervorrichtung mit geteilter Wortleitungsstruktur
DE69614787D1 (de) Speichermatrix mit mehrzustandsspeicherzellen
DE69215707D1 (de) Halbleiter-Speicherzelle
DE69422463T2 (de) Halbleiteranordnung mit einem Halbleiterchip mit Rückseitenelektrode
DE69625755D1 (de) Nichtflüchtige zwei-Transistor Speicherzelle mit einem einzigen Polysiliziumgate
DE3883865D1 (de) Halbleiterspeicheranordnung mit einem Register.
DE69433288D1 (de) Halbleiterspeicheranordnung
DE69422481T2 (de) Multibit-Halbleiterspeicheranordnung
DE69414459T2 (de) Dynamischer Speicher mit Referenzzellen
DE69220465T2 (de) Halbleiteranordnung mit Speicherzelle
DE3883935D1 (de) Halbleiterspeicheranordnung mit einem seriellen Zugriffsspeicher.
DE69626472D1 (de) Halbleiterspeicher mit redundanten Speicherzellen
DE69314964D1 (de) Nichtflüchtige Speicherzelle mit zwei Polysiliziumebenen
NL193547B (nl) Halfgeleider-geheugenmatrix met reservegeheugenelementen.
EP0573046A3 (en) Semiconductor memory device with single data line pair shared between memory cell arrays

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee