DE69428284D1 - Verfahren zur herstellung von verbundenen wafern unter verwendung von diamant als isolator - Google Patents

Verfahren zur herstellung von verbundenen wafern unter verwendung von diamant als isolator

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Publication number
DE69428284D1
DE69428284D1 DE69428284T DE69428284T DE69428284D1 DE 69428284 D1 DE69428284 D1 DE 69428284D1 DE 69428284 T DE69428284 T DE 69428284T DE 69428284 T DE69428284 T DE 69428284T DE 69428284 D1 DE69428284 D1 DE 69428284D1
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DE
Germany
Prior art keywords
diamond
insulator
connected wafers
producing connected
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69428284T
Other languages
English (en)
Other versions
DE69428284T2 (de
Inventor
Gregory A Schrantz
H Linn
W Belcher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harris Corp
Original Assignee
Harris Corp
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Filing date
Publication date
Application filed by Harris Corp filed Critical Harris Corp
Application granted granted Critical
Publication of DE69428284D1 publication Critical patent/DE69428284D1/de
Publication of DE69428284T2 publication Critical patent/DE69428284T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • Y10S148/00—Metal treatment
    • Y10S148/012—Bonding, e.g. electrostatic for strain gauges
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/135—Removal of substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/973—Substrate orientation

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  • Engineering & Computer Science (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
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DE69428284T 1993-03-11 1994-03-09 Verfahren zur herstellung von verbundenen wafern unter verwendung von diamant als isolator Expired - Fee Related DE69428284T2 (de)

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US08/029,860 US5272104A (en) 1993-03-11 1993-03-11 Bonded wafer process incorporating diamond insulator
PCT/US1994/002569 WO1994020985A1 (en) 1993-03-11 1994-03-09 Bonded wafer process incorporating diamond insulator

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JP (1) JPH09500493A (de)
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Families Citing this family (87)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5276338A (en) * 1992-05-15 1994-01-04 International Business Machines Corporation Bonded wafer structure having a buried insulation layer
US5376579A (en) * 1993-07-02 1994-12-27 The United States Of America As Represented By The Secretary Of The Air Force Schemes to form silicon-on-diamond structure
JP3313840B2 (ja) * 1993-09-14 2002-08-12 富士通株式会社 半導体装置の製造方法
US5488232A (en) * 1993-09-28 1996-01-30 North Carolina State University Oriented diamond film structures on non-diamond substrates
US5423475A (en) * 1993-10-06 1995-06-13 Westinghouse Electric Corporation Diamond coatings for aluminum alloys
US5514242A (en) * 1993-12-30 1996-05-07 Saint Gobain/Norton Industrial Ceramics Corporation Method of forming a heat-sinked electronic component
JP3353987B2 (ja) * 1994-01-10 2002-12-09 株式会社半導体エネルギー研究所 素子作製方法
US5526768A (en) * 1994-02-03 1996-06-18 Harris Corporation Method for providing a silicon and diamond substrate having a carbon to silicon transition layer and apparatus thereof
US5507987A (en) * 1994-04-28 1996-04-16 Saint Gobain/Norton Industrial Ceramics Corp. Method of making a free-standing diamond film with reduced bowing
EP0707741A4 (de) * 1994-05-05 1997-07-02 Siliconix Inc Oberflächenmontage und flip-chip-technologie
US5753529A (en) * 1994-05-05 1998-05-19 Siliconix Incorporated Surface mount and flip chip technology for total integrated circuit isolation
US5478758A (en) * 1994-06-03 1995-12-26 At&T Corp. Method of making a getterer for multi-layer wafers
TW274628B (de) * 1994-06-03 1996-04-21 At & T Corp
DE4426420C1 (de) * 1994-07-26 1996-02-01 Daimler Benz Ag Substrat mit vergrabener Diamantschicht und Verfahren zu dessen Herstellung
DE69529712T2 (de) * 1994-08-03 2003-10-23 Sumitomo Electric Industries Kühlkörper aus synthetischer Diamantschicht
US5648678A (en) * 1994-09-21 1997-07-15 Harris Corporation Programmable element in barrier metal device
US5767578A (en) * 1994-10-12 1998-06-16 Siliconix Incorporated Surface mount and flip chip technology with diamond film passivation for total integated circuit isolation
US5563428A (en) * 1995-01-30 1996-10-08 Ek; Bruce A. Layered structure of a substrate, a dielectric layer and a single crystal layer
US5795810A (en) * 1995-03-29 1998-08-18 Texas Instruments Incorporated Deep mesa isolation in SOI
US5578529A (en) * 1995-06-02 1996-11-26 Motorola Inc. Method for using rinse spray bar in chemical mechanical polishing
US5652436A (en) * 1995-08-14 1997-07-29 Kobe Steel Usa Inc. Smooth diamond based mesa structures
US6114256A (en) * 1995-08-18 2000-09-05 California Institute Of Technology Stable metallization for diamond and other materials
US5643823A (en) * 1995-09-21 1997-07-01 Siemens Aktiengesellschaft Application of thin crystalline Si3 N4 liners in shallow trench isolation (STI) structures
US5620745A (en) * 1995-12-19 1997-04-15 Saint Gobain/Norton Industrial Ceramics Corp. Method for coating a substrate with diamond film
US5872415A (en) * 1996-08-16 1999-02-16 Kobe Steel Usa Inc. Microelectronic structures including semiconductor islands
US5907768A (en) * 1996-08-16 1999-05-25 Kobe Steel Usa Inc. Methods for fabricating microelectronic structures including semiconductor islands
US6222254B1 (en) * 1997-03-31 2001-04-24 Intel Corporation Thermal conducting trench in a semiconductor structure and method for forming the same
US7067406B2 (en) * 1997-03-31 2006-06-27 Intel Corporation Thermal conducting trench in a semiconductor structure and method for forming the same
JP3116085B2 (ja) * 1997-09-16 2000-12-11 東京農工大学長 半導体素子形成法
US5955781A (en) * 1998-01-13 1999-09-21 International Business Machines Corporation Embedded thermal conductors for semiconductor chips
JP3199114B2 (ja) * 1998-11-06 2001-08-13 日本電気株式会社 半導体装置の製造方法
US6140208A (en) * 1999-02-05 2000-10-31 International Business Machines Corporation Shallow trench isolation (STI) with bilayer of oxide-nitride for VLSI applications
US6071794A (en) * 1999-06-01 2000-06-06 Mosel Vitelic, Inc. Method to prevent the formation of a thinner portion of insulating layer at the junction between the side walls and the bottom insulator
US6333202B1 (en) * 1999-08-26 2001-12-25 International Business Machines Corporation Flip FERAM cell and method to form same
US6500694B1 (en) 2000-03-22 2002-12-31 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6984571B1 (en) * 1999-10-01 2006-01-10 Ziptronix, Inc. Three dimensional device integration method and integrated device
US6337513B1 (en) * 1999-11-30 2002-01-08 International Business Machines Corporation Chip packaging system and method using deposited diamond film
US6902987B1 (en) 2000-02-16 2005-06-07 Ziptronix, Inc. Method for low temperature bonding and bonded structure
US6541861B2 (en) * 2000-06-30 2003-04-01 Kabushiki Kaisha Toshiba Semiconductor device manufacturing method including forming step of SOI structure and semiconductor device having SOI structure
US6563133B1 (en) 2000-08-09 2003-05-13 Ziptronix, Inc. Method of epitaxial-like wafer bonding at low temperature and bonded structure
US6774489B2 (en) * 2000-08-29 2004-08-10 Texas Instruments Incorporated Dielectric layer liner for an integrated circuit structure
GB2371922B (en) * 2000-09-21 2004-12-15 Cambridge Semiconductor Ltd Semiconductor device and method of forming a semiconductor device
US7132309B2 (en) * 2003-04-22 2006-11-07 Chien-Min Sung Semiconductor-on-diamond devices and methods of forming
US6444534B1 (en) 2001-01-30 2002-09-03 Advanced Micro Devices, Inc. SOI semiconductor device opening implantation gettering method
US6376336B1 (en) 2001-02-01 2002-04-23 Advanced Micro Devices, Inc. Frontside SOI gettering with phosphorus doping
US6670259B1 (en) 2001-02-21 2003-12-30 Advanced Micro Devices, Inc. Inert atom implantation method for SOI gettering
US6958264B1 (en) 2001-04-03 2005-10-25 Advanced Micro Devices, Inc. Scribe lane for gettering of contaminants on SOI wafers and gettering method
US6770966B2 (en) * 2001-07-31 2004-08-03 Intel Corporation Electronic assembly including a die having an integrated circuit and a layer of diamond to transfer heat
AU2002339592A1 (en) * 2001-10-29 2003-05-12 Analog Devices Inc. A method for bonding a pair of silicon wafers together and a semiconductor wafer
US6784071B2 (en) * 2003-01-31 2004-08-31 Taiwan Semiconductor Manufacturing Company, Ltd. Bonded SOI wafer with <100> device layer and <110> substrate for performance improvement
US20030151051A1 (en) * 2002-02-14 2003-08-14 Xemod, Inc. High performance active and passive structures based on silicon material grown epitaxially or bonded to silicon carbide substrate
EP1351288B1 (de) * 2002-04-05 2015-10-28 STMicroelectronics Srl Verfahren zur Herstellung einer isolierten Durchkontaktierung durch einen Halbleiterkörper und zugehöriges Halbleiterbauelement
DE10246949B4 (de) * 2002-10-08 2012-06-28 X-Fab Semiconductor Foundries Ag Verbesserte Trench-Isolation und Herstellungsverfahren
US7148079B1 (en) * 2002-11-01 2006-12-12 Advanced Micro Devices, Inc. Diamond like carbon silicon on insulator substrates and methods of fabrication thereof
US6936497B2 (en) * 2002-12-24 2005-08-30 Intel Corporation Method of forming electronic dies wherein each die has a layer of solid diamond
US7109092B2 (en) 2003-05-19 2006-09-19 Ziptronix, Inc. Method of room temperature covalent bonding
US6964880B2 (en) * 2003-06-27 2005-11-15 Intel Corporation Methods for the control of flatness and electron mobility of diamond coated silicon and structures formed thereby
US6987028B2 (en) * 2003-07-24 2006-01-17 Intel Corporation Method of fabricating a microelectronic die
US7772090B2 (en) * 2003-09-30 2010-08-10 Intel Corporation Methods for laser scribing wafers
GB2412010B (en) * 2004-03-10 2008-02-13 Dynex Semiconductor Ltd Method of processing diamond
JP2006041453A (ja) * 2004-06-22 2006-02-09 Ebara Corp 配線形成方法及び配線形成装置
US20060113545A1 (en) * 2004-10-14 2006-06-01 Weber Eicke R Wide bandgap semiconductor layers on SOD structures
TWI262853B (en) * 2005-04-27 2006-10-01 Kinik Co Diamond substrate and method for fabricating the same
US8030132B2 (en) * 2005-05-31 2011-10-04 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device including peeling step
JP4916680B2 (ja) * 2005-06-30 2012-04-18 株式会社半導体エネルギー研究所 半導体装置の作製方法、剥離方法
KR100731075B1 (ko) * 2005-12-29 2007-06-22 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조방법
WO2007084501A2 (en) * 2006-01-13 2007-07-26 Group4 Labs, Llc Method for manufacturing smooth diamond heat sinks
US20070232074A1 (en) * 2006-03-31 2007-10-04 Kramadhati Ravi Techniques for the synthesis of dense, high-quality diamond films using a dual seeding approach
US20090115052A1 (en) * 2007-05-25 2009-05-07 Astralux, Inc. Hybrid silicon/non-silicon electronic device with heat spreader
US7632736B2 (en) * 2007-12-18 2009-12-15 Intel Corporation Self-aligned contact formation utilizing sacrificial polysilicon
US8227350B2 (en) * 2008-01-04 2012-07-24 Advanced Diamond Technologies, Inc. Controlling diamond film surfaces and layering
US20110140232A1 (en) * 2009-12-15 2011-06-16 Intersil Americas Inc. Methods of forming a thermal conduction region in a semiconductor structure and structures resulting therefrom
US8841777B2 (en) 2010-01-12 2014-09-23 International Business Machines Corporation Bonded structure employing metal semiconductor alloy bonding
JP5588856B2 (ja) * 2010-12-27 2014-09-10 東京エレクトロン株式会社 カーボン膜上への酸化物膜の成膜方法及び成膜装置
CN104285001A (zh) 2012-02-29 2015-01-14 六号元素技术美国公司 金刚石载氮化镓晶片以及制造设备和制造方法
WO2014066740A1 (en) 2012-10-26 2014-05-01 Element Six Technologies Us Corporation Semiconductor devices with improved reliability and operating life and methods of manufacturing the same
WO2014095373A1 (en) 2012-12-18 2014-06-26 Element Six Limited Substrates for semiconductor devices
CN106653676B (zh) 2015-11-03 2019-12-24 中芯国际集成电路制造(上海)有限公司 衬底结构、半导体器件以及制造方法
US9806025B2 (en) * 2015-12-29 2017-10-31 Globalfoundries Inc. SOI wafers with buried dielectric layers to prevent Cu diffusion
US10584412B2 (en) 2016-03-08 2020-03-10 Ii-Vi Delaware, Inc. Substrate comprising a layer of silicon and a layer of diamond having an optically finished (or a dense) silicon-diamond interface
US9640514B1 (en) 2016-03-29 2017-05-02 Globalfoundries Inc. Wafer bonding using boron and nitrogen based bonding stack
JP2019153603A (ja) * 2016-07-19 2019-09-12 三菱電機株式会社 半導体基板及びその製造方法
US10725214B2 (en) * 2017-02-08 2020-07-28 Akhan Semiconductor, Inc. Diamond broad band mirror system and method
CN108807153B (zh) * 2018-04-08 2021-03-23 中国电子科技集团公司第五十五研究所 基于表面活化键合工艺的金刚石基氮化镓晶体管及制备法
CN111653473B (zh) * 2020-04-26 2023-10-13 西安电子科技大学 一种散热增强的硅基氮化镓微波器件材料结构
CN112967923B (zh) * 2021-02-05 2022-06-10 中国电子科技集团公司第十三研究所 大尺寸晶圆上制备金刚石衬底太赫兹二极管的方法
CN114695133B (zh) * 2022-03-25 2023-04-28 哈尔滨工业大学 一种带通孔金刚石集成三维芯片的制备方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5131963A (en) * 1987-11-16 1992-07-21 Crystallume Silicon on insulator semiconductor composition containing thin synthetic diamone films
JPH026118A (ja) * 1988-06-27 1990-01-10 Japan Steel Works Ltd:The 押出成形装置の樹脂圧力制御方法及び装置
JP2689986B2 (ja) * 1988-07-13 1997-12-10 富士通株式会社 電子装置
JP2597018B2 (ja) * 1989-12-26 1997-04-02 日本原子力研究所 絶縁用部材及びそれを用いた電気部品
SE465492B (sv) * 1990-01-24 1991-09-16 Asea Brown Boveri Halvledarkomponent innehaallande ett diamantskikt som aer anordnat mellan ett substrat och ett aktivt skikt och foerfarande foer dess framstaellning
US5362667A (en) * 1992-07-28 1994-11-08 Harris Corporation Bonded wafer processing
US5387555A (en) * 1992-09-03 1995-02-07 Harris Corporation Bonded wafer processing with metal silicidation
US4981818A (en) * 1990-02-13 1991-01-01 General Electric Company Polycrystalline CVD diamond substrate for single crystal epitaxial growth of semiconductors
US5073230A (en) * 1990-04-17 1991-12-17 Arizona Board Of Regents Acting On Behalf Of Arizona State University Means and methods of lifting and relocating an epitaxial device layer
US5173761A (en) * 1991-01-28 1992-12-22 Kobe Steel Usa Inc., Electronic Materials Center Semiconducting polycrystalline diamond electronic devices employing an insulating diamond layer
US5186785A (en) * 1991-04-05 1993-02-16 The United States Of America As Represented By The Secretary Of The Air Force Zone melted recrystallized silicon on diamond
WO1993001617A1 (en) * 1991-07-08 1993-01-21 Asea Brown Boveri Ab Method for the manufacture of a semiconductor component

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WO1994020985A1 (en) 1994-09-15
DE69428284T2 (de) 2002-06-27
JPH09500493A (ja) 1997-01-14
EP0719452A1 (de) 1996-07-03
EP0719452B1 (de) 2001-09-12
US5272104A (en) 1993-12-21
US5650639A (en) 1997-07-22

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