JP4916680B2 - 半導体装置の作製方法、剥離方法 - Google Patents
半導体装置の作製方法、剥離方法 Download PDFInfo
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- JP4916680B2 JP4916680B2 JP2005192520A JP2005192520A JP4916680B2 JP 4916680 B2 JP4916680 B2 JP 4916680B2 JP 2005192520 A JP2005192520 A JP 2005192520A JP 2005192520 A JP2005192520 A JP 2005192520A JP 4916680 B2 JP4916680 B2 JP 4916680B2
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
- H01L27/1266—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/13—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/94—Laser ablative material removal
Description
透光性を有する基板上に金属層を形成し、前記金属層上に絶縁層を形成し、
前記絶縁層上に素子を含む層を形成し、前記素子を含む層上に樹脂材料を塗布し、前記樹脂材料を硬化し、基板の裏面側から強光を選択的に照射し、強光を選択的に照射した領域における前記金属層をアブレーションさせることを特徴とする半導体装置の作製方法である。
透光性を有する基板上に金属層を形成し、前記金属層上に絶縁層を形成し、前記絶縁層上に複数の素子を含む層を形成し、前記複数の素子を含む層上に樹脂材料を塗布し、前記樹脂材料を硬化し、基板の裏面側から強光を選択的に照射して前記金属層の一部を除去し、剥離を行って前記基板と前記複数の素子を含む層とを分離することを特徴とする半導体装置の作製方法である。
透光性を有する基板上に金属層を形成し、前記金属層上に絶縁層を形成し、前記絶縁層上に複数の素子を含み、且つ、少なくとも1層の有機樹脂層を含む層を形成し、基板の裏面側から強光を選択的に照射して前記金属層の一部を除去し、剥離を行って前記基板と前記複数の素子を含む層とを分離することを特徴とする半導体装置の作製方法である。
図1(A)に示すように、基板100を用意し、その上に剥離層101を設ける。具体的に基板100は、例えばバリウムホウケイ酸ガラスや、アルミノホウケイ酸ガラスなどのガラス基板、石英基板、セラミック基板等を用いることができる。また、ステンレスを含む金属基板または半導体基板の表面に絶縁膜を形成したものを用いても良い。基板100を、機械的研磨、CMP(Chemical Mechanical Polishing)、などの研磨法により薄くし、又は平坦化しておいても良い。プラスチック等の可撓性を有する合成樹脂からなる基板は、一般的に上記ガラス基板、石英基板、セラミック基板と比較して耐熱温度が低い傾向にあるが、作製工程における処理温度に耐え得るのであれば、基板100として用いることが可能である。
図3に示す積層をガラス基板上に形成した実験試料を作製し、レーザを照射して剥離のきっかけを形成する実験を行った。
実施の形態1では、薄膜トランジスタを有する層103上に樹脂層105形成して裏面からレーザ光を照射する例を示したが、本実施の形態では、薄膜トランジスタを含む層の少なくとも一層に樹脂層を設けて裏面からレーザ光を照射する例を示す。
本実施の形態では、薄膜トランジスタを有する層103上に、アンテナ501を設ける例を図8(A)および図8(B)に示す。なお、実施の形態1と同じ箇所には同じ符号を用いる。
101:剥離層
102:絶縁層
103:薄膜トランジスタを有する層
104a:薄膜トランジスタを有する回路
104b:薄膜トランジスタを有する回路
104c:薄膜トランジスタを有する回路
104d:薄膜トランジスタを有する回路
104e:薄膜トランジスタを有する回路
105:樹脂層
106:空間
Claims (10)
- 透光性を有する第1の基板の表面上に金属層を形成し、
前記金属層上に絶縁層を形成し、
前記絶縁層上に薄膜トランジスタを有する回路を複数形成し、
複数の前記回路と、複数の前記回路のうち隣接する回路の間の領域と、を覆う樹脂層を形成し、
複数の前記回路と重ならない領域であって、且つ複数の前記回路のうち隣接する回路の間の領域に対して、前記第1の基板の裏面側から強光を照射して、前記金属層の一部をアブレーションさせることによって、前記金属層と前記絶縁層の間に空間を形成し、
力学的手段又は機械的手段を用いて前記空間から剥離を行うことによって、前記第1の基板と前記回路とを分離し、
前記回路を、可撓性を有する第2の基板に貼り付けることを特徴とする半導体装置の作製方法。 - 透光性を有する第1の基板の表面上に金属層を形成し、
前記金属層上に絶縁層を形成し、
前記絶縁層上に薄膜トランジスタを有する回路を複数形成し、
複数の前記回路と、複数の前記回路のうち隣接する回路の間の領域と、を覆う樹脂層を形成し、
複数の前記回路と重ならない領域であって、且つ複数の前記回路のうち隣接する回路の間の領域に対して、前記第1の基板の裏面側からレーザ光を照射して、前記金属層の一部をアブレーションさせることによって、前記金属層と前記絶縁層の間に空間を形成し、
力学的手段又は機械的手段を用いて前記空間から剥離を行うことによって、前記第1の基板と前記回路とを分離し、
前記回路を、可撓性を有する第2の基板に貼り付けることを特徴とする半導体装置の作製方法。 - 請求項1において、
前記強光が照射される領域は、格子状であることを特徴とする半導体装置の作製方法。 - 請求項2において、
前記レーザ光が照射される領域は、格子状であることを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項4のいずれか一において、
前記回路は、アンテナを有することを特徴とする半導体装置の作製方法。 - 透光性を有する基板の表面上に金属層を形成し、
前記金属層上に絶縁層を形成し、
前記絶縁層上に薄膜トランジスタを有する回路を複数形成し、
複数の前記回路と、複数の前記回路のうち隣接する回路の間の領域と、を覆う樹脂層を形成し、
複数の前記回路と重ならない領域であって、且つ複数の前記回路のうち隣接する回路の間の領域に対して、前記基板の裏面側から強光を照射して、前記金属層の一部をアブレーションさせることによって、前記金属層と前記絶縁層の間に空間を形成し、
力学的手段又は機械的手段を用いて前記空間から剥離を行うことを特徴とする剥離方法。 - 透光性を有する基板の表面上に金属層を形成し、
前記金属層上に絶縁層を形成し、
前記絶縁層上に薄膜トランジスタを有する回路を複数形成し、
複数の前記回路と、複数の前記回路のうち隣接する回路の間の領域と、を覆う樹脂層を形成し、
複数の前記回路と重ならない領域であって、且つ複数の前記回路のうち隣接する回路の間の領域に対して、前記基板の裏面側からレーザ光を照射して、前記金属層の一部をアブレーションさせることによって、前記金属層と前記絶縁層の間に空間を形成し、
力学的手段又は機械的手段を用いて前記空間から剥離を行うことを特徴とする剥離方法。 - 請求項6において、
前記強光が照射される領域は、格子状であることを特徴とする剥離方法。 - 請求項7において、
前記レーザ光が照射される領域は、格子状であることを特徴とする剥離方法。 - 請求項6乃至請求項9のいずれか一において、
前記回路は、アンテナを有することを特徴とする剥離方法。
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