DE69426817D1 - Fertigungprüfungsverfahren von Flash-EEPROM-Vorrichtungen - Google Patents
Fertigungprüfungsverfahren von Flash-EEPROM-VorrichtungenInfo
- Publication number
- DE69426817D1 DE69426817D1 DE69426817T DE69426817T DE69426817D1 DE 69426817 D1 DE69426817 D1 DE 69426817D1 DE 69426817 T DE69426817 T DE 69426817T DE 69426817 T DE69426817 T DE 69426817T DE 69426817 D1 DE69426817 D1 DE 69426817D1
- Authority
- DE
- Germany
- Prior art keywords
- memory cells
- memory
- flash eeprom
- defective
- redundancy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000010998 test method Methods 0.000 title 1
- 230000002950 deficient Effects 0.000 abstract 4
- 239000011159 matrix material Substances 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/816—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout
- G11C29/82—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for an application-specific layout for EEPROMs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/10—Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Read Only Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP94830276A EP0686978B1 (de) | 1994-06-07 | 1994-06-07 | Fertigungprüfungsverfahren von Flash-EEPROM-Vorrichtungen |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69426817D1 true DE69426817D1 (de) | 2001-04-12 |
DE69426817T2 DE69426817T2 (de) | 2001-08-02 |
Family
ID=8218462
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69426817T Expired - Fee Related DE69426817T2 (de) | 1994-06-07 | 1994-06-07 | Fertigungprüfungsverfahren von Flash-EEPROM-Vorrichtungen |
Country Status (4)
Country | Link |
---|---|
US (1) | US5590075A (de) |
EP (1) | EP0686978B1 (de) |
JP (1) | JPH0855499A (de) |
DE (1) | DE69426817T2 (de) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5965902A (en) * | 1995-09-19 | 1999-10-12 | Micron Technology | Method and apparatus for testing of dielectric defects in a packaged semiconductor memory device |
US5657284A (en) | 1995-09-19 | 1997-08-12 | Micron Technology, Inc. | Apparatus and method for testing for defects between memory cells in packaged semiconductor memory devices |
JPH0997500A (ja) * | 1995-09-29 | 1997-04-08 | Toshiba Corp | 不揮発性半導体記憶装置 |
US5781486A (en) * | 1996-04-16 | 1998-07-14 | Micron Technology Corporation | Apparatus for testing redundant elements in a packaged semiconductor memory device |
US5793943A (en) * | 1996-07-29 | 1998-08-11 | Micron Electronics, Inc. | System for a primary BIOS ROM recovery in a dual BIOS ROM computer system |
US5841712A (en) * | 1996-09-30 | 1998-11-24 | Advanced Micro Devices, Inc. | Dual comparator circuit and method for selecting between normal and redundant decode logic in a semiconductor memory device |
KR100250756B1 (ko) | 1996-12-04 | 2000-05-01 | 김영환 | 플래쉬 이이피롬 셀의 특성 분석을 위한 테스트 셀 및 이를 이용한 플래쉬 이이피롬 셀의 특성 분석 방법 |
US5883904A (en) * | 1997-04-14 | 1999-03-16 | International Business Machines Corporation | Method for recoverability via redundant cache arrays |
US6031772A (en) * | 1997-06-20 | 2000-02-29 | Oki Electric Industry Co., Ltd. | Semiconductor memory device having floating gate transistors |
US5986950A (en) * | 1997-10-15 | 1999-11-16 | International Business Machines Corporation | Use of redundant circuits to improve the reliability of an integrated circuit |
DE19808525A1 (de) * | 1998-02-27 | 1999-09-02 | Siemens Ag | Integrierte Schaltung |
US6091652A (en) * | 1998-12-11 | 2000-07-18 | Lsi Logic Corporation | Testing semiconductor devices for data retention |
US6452845B1 (en) | 1999-01-07 | 2002-09-17 | Micron Technology, Inc. | Apparatus for testing redundant elements in a packaged semiconductor memory device |
US6147904A (en) * | 1999-02-04 | 2000-11-14 | Tower Semiconductor Ltd. | Redundancy method and structure for 2-bit non-volatile memory cells |
DE19963689A1 (de) * | 1999-12-29 | 2001-07-12 | Infineon Technologies Ag | Schaltungsanordnung eines integrierten Halbleiterspeichers zum Speichern von Adressen fehlerhafter Speicherzellen |
JP3893005B2 (ja) * | 2000-01-06 | 2007-03-14 | 富士通株式会社 | 不揮発性半導体記憶装置 |
JP4413406B2 (ja) * | 2000-10-03 | 2010-02-10 | 株式会社東芝 | 不揮発性半導体メモリ及びそのテスト方法 |
US6704236B2 (en) * | 2002-01-03 | 2004-03-09 | Broadcom Corporation | Method and apparatus for verification of a gate oxide fuse element |
US7053647B2 (en) * | 2004-05-07 | 2006-05-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of detecting potential bridging effects between conducting lines in an integrated circuit |
US7768847B2 (en) | 2008-04-09 | 2010-08-03 | Rambus Inc. | Programmable memory repair scheme |
JP2012234591A (ja) * | 2011-04-28 | 2012-11-29 | Toshiba Corp | 不揮発性半導体記憶装置 |
EP3367385B1 (de) | 2017-02-28 | 2020-07-08 | ams AG | Speicheranordnung und verfahren zum betrieb einer speicheranordnung |
US20190013387A1 (en) * | 2017-07-05 | 2019-01-10 | Micron Technology, Inc. | Memory cell structures |
CN113409857B (zh) * | 2021-05-11 | 2024-04-05 | 珠海博雅科技股份有限公司 | 参考单元替换方法、装置及存储介质 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS525491A (en) * | 1975-07-03 | 1977-01-17 | Nippon Steel Corp | Leading-in process of conduit tube |
JPS59227095A (ja) * | 1983-06-07 | 1984-12-20 | Hitachi Ltd | 半導体記憶素子のスクリ−ニング方法 |
JPS605087A (ja) * | 1983-06-21 | 1985-01-11 | ティーディーケイ株式会社 | 導電性ペ−スト組成物 |
EP0198935A1 (de) * | 1985-04-23 | 1986-10-29 | Deutsche ITT Industries GmbH | Elektrisch umprogrammierbarer Halbleiterspeicher mit Redundanz |
JP2631651B2 (ja) * | 1986-12-10 | 1997-07-16 | 株式会社 アドバンテスト | 自己診断機能を具備した記憶装置 |
US5053990A (en) * | 1988-02-17 | 1991-10-01 | Intel Corporation | Program/erase selection for flash memory |
US5023874A (en) * | 1989-02-23 | 1991-06-11 | Texas Instruments Incorporated | Screening logic circuits for preferred states |
EP0392895B1 (de) * | 1989-04-13 | 1995-12-13 | Sundisk Corporation | EEprom-System mit Blocklöschung |
US4963825A (en) | 1989-12-21 | 1990-10-16 | Intel Corporation | Method of screening EPROM-related devices for endurance failure |
EP0944094B1 (de) * | 1991-12-09 | 2001-10-24 | Fujitsu Limited | Versorgungsspannungsschalter |
JP2738195B2 (ja) * | 1991-12-27 | 1998-04-08 | 日本電気株式会社 | 不揮発性半導体記憶装置 |
JPH05205491A (ja) * | 1992-01-28 | 1993-08-13 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
JPH065087A (ja) * | 1992-06-24 | 1994-01-14 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
JPH06251593A (ja) * | 1993-02-24 | 1994-09-09 | Matsushita Electron Corp | フラッシュメモリの消去あるいは書き込み制御方法 |
US5400286A (en) * | 1993-08-17 | 1995-03-21 | Catalyst Semiconductor Corp. | Self-recovering erase scheme to enhance flash memory endurance |
-
1994
- 1994-06-07 EP EP94830276A patent/EP0686978B1/de not_active Expired - Lifetime
- 1994-06-07 DE DE69426817T patent/DE69426817T2/de not_active Expired - Fee Related
-
1995
- 1995-06-06 JP JP13943595A patent/JPH0855499A/ja active Pending
- 1995-06-07 US US08/479,081 patent/US5590075A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0686978A1 (de) | 1995-12-13 |
DE69426817T2 (de) | 2001-08-02 |
JPH0855499A (ja) | 1996-02-27 |
US5590075A (en) | 1996-12-31 |
EP0686978B1 (de) | 2001-03-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |